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107 条记录 (耗时 0.043 秒)

    System-in-package optical transceiver in optical communication with a plurality of other system-in-package optical transceivers via an optical transmission line
    5.
    发明授权
    System-in-package optical transceiver in optical communication with a plurality of other system-in-package optical transceivers via an optical transmission line 有权
    通过光传输线与多个其它系统级封装光收发器进行光通信的系统级封装光收发器

    公开(公告)号：US07689129B2

    公开(公告)日：2010-03-30

    申请号：US11201234

    申请日：2005-08-10

    申请人： Seiji Karashima ,  Seiichi Nakatani ,  Yoshiyuki Saito

    发明人： Seiji Karashima ,  Seiichi Nakatani ,  Yoshiyuki Saito

    IPC分类号： H04B10/00

    CPC分类号： G06F15/16 ,  H04L12/00

    摘要： A parallel computation apparatus as a multiprocessor includes functional modules as a plurality of processors having an optical communication function and capable of mutually cooperating, and an optical transmission line interconnecting the plurality of processors. Among the plurality of functional modules, the first functional module having a first information processing capacity has a function of determining whether information processing of a first information processing amount can be completed based on the first information processing capacity, and outputting a second information processing amount obtained by subtracting an information processing amount based on the first information processing capacity from the first information processing amount to at least one of the other functional modules.

    摘要翻译： 作为多处理器的并行计算装置包括具有光通信功能并且能够相互配合的多个处理器的功能模块以及互连多个处理器的光传输线。 在多个功能模块中，具有第一信息处理能力的第一功能模块具有根据第一信息处理能力确定是否能够完成第一信息处理量的信息处理的功能，并且输出获得的第二信息处理量 通过从第一信息处理量减去基于第一信息处理能力的信息处理量到至少一个其他功能模块。

    Multiprocessor
    6.
    发明申请
    Multiprocessor 有权
    多处理器

    公开(公告)号：US20060036831A1

    公开(公告)日：2006-02-16

    申请号：US11201234

    申请日：2005-08-10

    申请人： Seiji Karashima ,  Seiichi Nakatani ,  Yoshiyuki Saito

    发明人： Seiji Karashima ,  Seiichi Nakatani ,  Yoshiyuki Saito

    IPC分类号： G06F12/10 ,  G06F9/34

    CPC分类号： G06F15/16 ,  H04L12/00

    摘要： A parallel computation apparatus as a multiprocessor includes functional modules as a plurality of processors having an optical communication function and capable of mutually cooperating, and an optical transmission line interconnecting the plurality of processors. Among the plurality of functional modules, the first functional module having a first information processing capacity has a function of determining whether information processing of a first information processing amount can be completed based on the first information processing capacity, and outputting a second information processing amount obtained by subtracting an information processing amount based on the first information processing capacity from the first information processing amount to at least one of the other functional modules.

    摘要翻译： 作为多处理器的并行计算装置包括具有光通信功能并且能够相互配合的多个处理器的功能模块以及互连多个处理器的光传输线。 在多个功能模块中，具有第一信息处理能力的第一功能模块具有根据第一信息处理能力确定是否能够完成第一信息处理量的信息处理的功能，并且输出获得的第二信息处理量 通过从第一信息处理量减去基于第一信息处理能力的信息处理量到至少一个其他功能模块。

    Mobile terminal, circuit board, circuit board design aiding apparatus and method, design aiding program, and storage medium having stored therein design aiding program
    7.
    发明授权
    Mobile terminal, circuit board, circuit board design aiding apparatus and method, design aiding program, and storage medium having stored therein design aiding program 失效
    移动终端，电路板，电路板设计辅助设备和方法，设计辅助程序，以及存储在其中的存储介质设计辅助程序

    公开(公告)号：US07418603B2

    公开(公告)日：2008-08-26

    申请号：US10959987

    申请日：2004-10-08

    申请人： Takeshi Nakayama ,  Yoshiyuki Saito ,  Toshiyuki Asahi

    发明人： Takeshi Nakayama ,  Yoshiyuki Saito ,  Toshiyuki Asahi

    IPC分类号： G06F12/14

    CPC分类号： G06F21/87 ,  G06F17/5068 ,  H01L2224/16225 ,  H05K1/0275 ,  H05K1/186 ,  H05K3/0005 ,  H05K2201/10151

    摘要： The present invention provides a tamper resistant circuit board, an apparatus and method for aiding the design of the circuit board, a computer readable storage medium having stored therein a program for performing the method, and a mobile terminal containing the circuit board. The tamper resistant circuit board has a multilayer structure, including outermost substrates and an internal layer between the outermost substrates, and a signal line through which a confidential signal flows. The signal line is wired such as the confidential signal does not appear on the outer surfaces of the outermost substrates of the multilayer structure of the circuit board.

    摘要翻译： 本发明提供一种用于辅助电路板设计的防篡改电路板，装置和方法，其中存储有用于执行该方法的程序的计算机可读存储介质和包含电路板的移动终端。 防篡改电路板具有包括最外层基板和最外层基板之间的内层的多层结构以及机密信号通过其的信号线。 信号线被布线，例如机密信号不出现在电路板的多层结构的最外面的基板的外表面上。

    Mobile terminal, circuit board, circuit board design aiding apparatus and method, design aiding program, and storage medium having stored therein design aiding program
    8.
    发明申请
    Mobile terminal, circuit board, circuit board design aiding apparatus and method, design aiding program, and storage medium having stored therein design aiding program 失效
    移动终端，电路板，电路板设计辅助设备和方法，设计辅助程序，以及存储在其中的存储介质设计辅助程序

    公开(公告)号：US20050081049A1

    公开(公告)日：2005-04-14

    申请号：US10959987

    申请日：2004-10-08

    申请人： Takeshi Nakayama ,  Yoshiyuki Saito ,  Toshiyuki Asahi

    发明人： Takeshi Nakayama ,  Yoshiyuki Saito ,  Toshiyuki Asahi

    IPC分类号： G06F17/50 ,  G06F21/87 ,  H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H04L9/00

    CPC分类号： G06F21/87 ,  G06F17/5068 ,  H01L2224/16225 ,  H05K1/0275 ,  H05K1/186 ,  H05K3/0005 ,  H05K2201/10151

    摘要： A circuit board is provided in which tamper resistance is improved by making probing by third parties difficult, while solving problems associated with the current techniques and manufacturing costs. A signal line through which a confidential signal requiring tamper resistance flows and components 32 and 33 connected to the signal line 21 by the terminals thereof, are laid out in a component-containing layer 13 of a circuit board 10. Only a confidential signal having been encrypted through a predetermined component 31 is outputted to an observation point 34 provided on a surface of the circuit board 10. External observation and control of the confidential signal is performed by decoding a cipher provided by the component 31 to the signal which appears at the observation point 34.

    摘要翻译： 提供了一种电路板，其中通过使第三方的探测困难，同时解决与当前技术和制造成本相关的问题，提高了防篡改性。 要求篡改电阻的机密信号流过的信号线和其端子与信号线21连接的部件32和33布置在电路板10的部件含有层13中。只有机密信号已被 通过预定部件31加密的信号被输出到设置在电路板10的表面上的观察点34.机密信号的外部观察和控制是通过将由部件31提供的密码解码为在观察时出现的信号 点34。

    Flexible printed-circuit board
    9.
    发明申请
    Flexible printed-circuit board 审中-公开
    柔性印刷电路板

    公开(公告)号：US20090008131A1

    公开(公告)日：2009-01-08

    申请号：US11659131

    申请日：2005-07-28

    申请人： Osamu Shibata ,  Takeshi Nakayama ,  Yoshiyuki Saito

    发明人： Osamu Shibata ,  Takeshi Nakayama ,  Yoshiyuki Saito

    IPC分类号： H05K1/02

    CPC分类号： H05K1/0219 ,  H05K1/0237 ,  H05K1/118 ,  H05K2201/055 ,  H05K2201/09236 ,  H05K2201/09445 ,  H05K2201/09727

    摘要： A flexible printed board that is adapted to high-speed transmission and can mount a plurality of connectors at low cost is provided. The board comprises a flexible printed board body 100 that has a first side 100a and a second side 100b opposed to each other, and an overlap portion 105 formed by bending its one end; a plurality of wiring lines 101 that are arranged on the first side 100a of the body substantially in parallel to each other; first pads 103 that are connected to respective ends of wiring lines, wider than the wiring lines and formed on the first-side surface 105a of the overlap potion; and second pads 104 that are located at respective ends of wiring lines, wider than the wiring lines and formed on the second-side surface 105b of the overlap potion. The wiring lines 101a with the first pads connected thereto and the wiring lines 101b with the second pads 104 connected thereto are alternatively arranged on the first side.

    摘要翻译： 提供了适用于高速传输并可以以低成本安装多个连接器的柔性印刷电路板。 板包括具有彼此相对的第一侧100a和第二侧面100b的柔性印刷电路板主体100和通过使其一端弯曲形成的重叠部分105; 布置在主体的第一侧100a上的多个布线101基本上彼此平行; 第一焊盘103，其连接到布线的相应端部，比布线宽，并形成在重叠部分的第一侧表面105a上; 以及第二焊盘104，其位于布线的相应端部，比布线宽，并且形成在重叠部分的第二侧表面105b上。 具有与其连接的第一焊盘的布线101a和与其连接的第二焊盘104的布线101b交替布置在第一侧上。