公开(公告)号：US6146966A

公开(公告)日：2000-11-14

申请号：US859210

申请日：1997-05-20

申请人： Toshiyuki Hirota ,  Hirohito Watanabe ,  Fumiki Aiso ,  Shuji Fujiwara ,  Masanobu Zenke

发明人： Toshiyuki Hirota ,  Hirohito Watanabe ,  Fumiki Aiso ,  Shuji Fujiwara ,  Masanobu Zenke

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108

CPC分类号： H01L28/84 ,  H01L27/10852

摘要： In a process of forming hemi-spherical silicon grains on an amorphous silicon film in accordance with the "crystal nucleation" process, in order to form crystal nuclei on a top surface and a side surface of the amorphous silicon film, SiH.sub.4 is irradiated onto the top and side surfaces of the amorphous silicon film at a stabilized temperature which is lower than, by at least 5.degree. C., an annealing temperature for growing the hemi-spherical silicon grains from the crystal nuclei, with the result that it is possible to suppress or retard the growth of the crystals growing into the amorphous silicon film from a boundary between the amorphous silicon film and an interlayer insulator film. Thereafter, the amorphous silicon film having the crystal nuclei thus formed on the surface thereof is annealed at the annealing temperature so that the hemi-spherical silicon grains are formed on the whole surface of the top and side surfaces of the amorphous silicon film.

摘要翻译： 在根据“晶体成核”法在非晶硅膜上形成半球形硅晶粒的过程中，为了在非晶硅膜的顶表面和侧表面上形成晶核，将SiH 4照射到 该非晶硅膜的顶表面和侧表面在稳定的温度下低于至少5℃的用于从晶核生长半球形硅晶粒的退火温度，结果是可以 从非晶硅膜和层间绝缘膜之间的边界抑制或延缓从非晶硅膜生长的晶体的生长。 此后，在其表面上形成具有晶核的非晶硅膜在退火温度下退火，使得半球形硅晶粒形成在非晶硅膜的顶表面和侧表面的整个表面上。

公开(公告)号：US5959326A

公开(公告)日：1999-09-28

申请号：US852530

申请日：1997-05-07

申请人： Fumiki Aiso ,  Hirohito Watanabe ,  Toshiyuki Hirota ,  Masanobu Zenke ,  Shuji Fujiwara

发明人： Fumiki Aiso ,  Hirohito Watanabe ,  Toshiyuki Hirota ,  Masanobu Zenke ,  Shuji Fujiwara

IPC分类号： H01L21/28 ,  H01L21/02 ,  H01L21/205 ,  H01L21/283 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/108 ,  H01G4/06

CPC分类号： H01L28/84

摘要： In a capacitor incorporated in a semiconductor device, a capacitor lower plate is formed of a first amorphous silicon film on an interlayer insulator film and a second amorphous silicon film stacked on the first amorphous silicon film. A crystallization preventing film is formed between the first and second amorphous silicon films, or alternatively, the first amorphous silicon film is formed to have an impurity concentration lower than that of the second amorphous silicon film. A stacked structure formed of the first and second amorphous silicon films is patterned into a capacitor lower plate having a top surface and a side surface, and hemispherical grains are formed on not only the top surface but also the side surface of the patterned stacked structure. In this process, crystalline growth from the interlayer insulator film is prevented by the crystallization preventing film or by the fact that the first amorphous silicon film is formed to have an impurity concentration lower than that of the second amorphous silicon film. Thus, concaves and convexes in the form of hemispherical grains are uniformly formed on not only the top surface but also the side surface of the patterned stacked structure, so that a remarkably increased capacitance can be obtained.

摘要翻译： 在并入半导体装置的电容器中，电容器下板由层叠绝缘膜上的第一非晶硅膜和层叠在第一非晶硅膜上的第二非晶硅膜形成。 在第一和第二非晶硅膜之间形成结晶防止膜，或者，形成第一非晶硅膜的杂质浓度低于第二非晶硅膜的杂质浓度。 由第一和第二非晶硅膜形成的堆叠结构被图案化成具有顶表面和侧表面的电容器底板，并且半球形晶粒不仅形成在图案化堆叠结构的顶表面而且形成在侧表面上。 在该方法中，通过防止结晶化膜或者形成第一非晶硅膜的杂质浓度低于第二非晶硅膜的杂质浓度来防止来自层间绝缘膜的晶体生长。 因此，半球状晶粒形式的凹凸不仅在图案化叠层结构的顶表面，而且均匀地形成，从而可以获得显着增加的电容。

公开(公告)号：US5372962A

公开(公告)日：1994-12-13

申请号：US11855

申请日：1993-02-01

申请人： Toshiyuki Hirota ,  Ichirou Honma ,  Hirohito Watanabe ,  Masanobu Zenke

发明人： Toshiyuki Hirota ,  Ichirou Honma ,  Hirohito Watanabe ,  Masanobu Zenke

IPC分类号： H01L21/8242 ,  H01L27/108 ,  H01L21/70

CPC分类号： H01L27/10852 ,  H01L27/10808 ,  Y10S148/138 ,  Y10S438/964

摘要： A capacitor incorporated in a semiconductor integrated circuit device is expected to have a large amount of capacitance without increase of the occupation area, and has a lower electrode increased in surface area by using a roughening technique selected from the group consisting of an anodizing technique, an anodic oxidation, a wet etching and a dry etching so that a surface of the lower electrode becomes porous, thereby increasing the capacitance.

摘要翻译： 期望并入半导体集成电路器件中的电容器具有大量的电容而不增加占用面积，并且通过使用选自以下的粗糙化技术，具有增加表面积的下电极，所述粗糙化技术包括阳极氧化技术， 阳极氧化，湿蚀刻和干蚀刻，使得下电极的表面变多孔，从而增加电容。

公开(公告)号：US5897983A

公开(公告)日：1999-04-27

申请号：US655568

申请日：1996-05-30

申请人： Toshiyuki Hirota ,  Tomomi Kurokawa ,  Masanobu Zenke ,  Kazuki Yokota

发明人： Toshiyuki Hirota ,  Tomomi Kurokawa ,  Masanobu Zenke ,  Kazuki Yokota

IPC分类号： G03F7/20 ,  H01L21/02 ,  H01L21/027 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/108 ,  G03C5/00

CPC分类号： H01L28/92 ,  H01L27/10852

摘要： In a method for forming an annular-shaped and vertically extending bottom electrode of a memory cell capacitor, a conductive film is formed on an inter-layer insulator. A photo-resist material is applied on the conductive film to form a photo-resist film thereon. The photo-resist film is patterned by a photo-lithography using a mask which includes a transparent plate-like body and a phase shifting film selectively provided on a predetermined region of the transparent plate-like body to form an annular-shaped and vertically extending photo-resist pattern over the conductive film. The conductive film is subjected to an anisotropic etching, in which the annular-shaped and vertically extending photo-resist pattern is used as a mask, to form an annular-shaped and vertically extending bottom electrode under the annular-shaped and vertically extending photo-resist pattern. The annular-shaped and vertically extending photo-resist pattern is removed.

摘要翻译： 在形成存储单元电容器的环状且垂直延伸的底部电极的方法中，在层间绝缘体上形成导电膜。 在导电膜上涂布光致抗蚀剂材料以在其上形成光致抗蚀剂膜。 通过使用包括透明板状体的掩模和选择性地设置在透明板状体的规定区域上的相移膜的光刻法对光致抗蚀剂膜进行图案化，以形成环状且垂直延伸 导电膜上的光刻胶图案。 对导电膜进行各向异性蚀刻，其中使用环形和垂直延伸的光致抗蚀剂图案作为掩模，以在环形和垂直延伸的光致抗蚀剂图案下形成环形且垂直延伸的底部电极， 抗蚀图案 去除环形和垂直延伸的光刻胶图案。

公开(公告)号：US06258690B1

公开(公告)日：2001-07-10

申请号：US08826224

申请日：1997-03-27

申请人： Masanobu Zenke

发明人： Masanobu Zenke

IPC分类号： H01L2120

CPC分类号： H01L28/40 ,  H01L21/3185 ,  H01L27/1085 ,  Y10S438/908

摘要： In a method of manufacturing a semiconductor device having a capacitor portion consisting of a lower electrode, a dielectric film, and an upper electrode on a semiconductor substrate, a silicon film is formed on a surface of the lower electrode and a surface of an insulating film adjacent to the lower electrode. Annealing is preformed in an atmosphere containing nitrogen or ammonia to nitride the silicon film. A silicon nitride film is formed by LP-CVD.

摘要翻译： 在制造半导体器件的方法中，在半导体衬底上具有由下电极，电介质膜和上电极组成的电容器部分，在下电极的表面和绝缘膜的表面上形成硅膜 邻近下电极。 在含有氮或氨的气氛中进行退火以氮化硅膜。 通过LP-CVD形成氮化硅膜。

公开(公告)号：US5851581A

公开(公告)日：1998-12-22

申请号：US899722

申请日：1997-07-24

申请人： Masanobu Zenke

发明人： Masanobu Zenke

IPC分类号： H01L21/285 ,  C23C16/14 ,  C23C16/54 ,  H01L21/28 ,  H01L21/768 ,  H01L29/40 ,  B05D5/12

CPC分类号： C23C16/14 ,  C23C16/54 ,  H01L21/76843 ,  H01L21/76876 ,  H01L21/76877 ,  Y10S438/913

摘要： A contact is formed in an insulating film covering on a silicon substrate and thereafter an amorphous silicon film is deposited thereon at 400.degree. to 500.degree. C. by using disilane. A tungsten film is then formed and etched back to form a tungsten plug through etch-back.

摘要翻译： 在覆盖在硅衬底上的绝缘膜上形成接触，然后通过使用乙硅烷在400℃至500℃下沉积非晶硅膜。 然后形成钨膜并回蚀刻以通过蚀刻回形成钨塞。

公开(公告)号：US5811333A

公开(公告)日：1998-09-22

申请号：US585717

申请日：1996-01-11

申请人： Masanobu Zenke

发明人： Masanobu Zenke

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108

CPC分类号： H01L28/84 ,  Y10S438/964

摘要： On a semiconductor substrate (1), a polysilicon layer (3) of a random crystal structure is formed. The polysilicon layer (3) is treated by an etchant to provide a roughened surface (3a) of the polysilicon layer (3). The roughened surface (3a) is formed along grains of a random crystal structure and extends over all of top and side surfaces of the polysilicon layer (3). Thus, the polysilicon layer (3) serves as a lower electrode (4) having an increased surface area. A capacitor insulator layer (5) is deposited on the lower electrode (4). An upper electrode (6) is deposited on the capacitor insulator layer (5).

摘要翻译： 在半导体衬底（1）上形成随机晶体结构的多晶硅层（3）。 通过蚀刻剂处理多晶硅层（3）以提供多晶硅层（3）的粗糙化表面（3a）。 粗糙表面（3a）沿着随机晶体结构的晶粒形成并且在多晶硅层（3）的所有顶表面和侧表面上延伸。 因此，多晶硅层（3）用作具有增加的表面积的下电极（4）。 电容器绝缘体层（5）沉积在下电极（4）上。 上电极（6）沉积在电容器绝缘体层（5）上。

公开(公告)号：US5441594A

公开(公告)日：1995-08-15

申请号：US22722

申请日：1993-02-24

申请人： Masanobu Zenke

发明人： Masanobu Zenke

IPC分类号： H01L21/3213 ,  H01L21/285 ,  H01L21/311 ,  H01L21/768 ,  H01L21/306 ,  B44C1/22 ,  C03C15/00 ,  C23F1/00

CPC分类号： H01L21/02063 ,  H01L21/28525 ,  H01L21/31116 ,  Y10S438/908 ,  Y10S438/913

摘要： A contact hole reaching a diffusion layer 2 provided on the surface of a silicon substrate 1 is formed by etching an insulating film 3. At this time, a surface layer 2a formed on the surface of the diffusion layer 2 is removed within a film forming unit by utilizing chlorine trifluoride gas. Next, a polycrystalline silicon film 4 is formed within tile same film forming equipment. Thus, the surface of an electrically conductive layer (including a semiconductor layer) covered with the insulating film is selectively exposed by the etching process and, prior to the formation of the film (including oxidized layer), connected to the exposed surface of the electrically conductive layer, the surface layer formed on the surface of the electrically conductive layer, which includes a naturally oxidized film, damage, contaminated substances or the like, can be completely removed.

摘要翻译： 通过蚀刻绝缘膜3形成到硅衬底1的表面上的到达扩散层2的接触孔。此时，形成在扩散层2的表面上的表面层2a在成膜单元 通过利用三氟化氯气体。 接下来，在瓦片相同的成膜设备内形成多晶硅膜4。 因此，通过蚀刻工艺选择性地暴露由绝缘膜覆盖的导电层（包括半导体层）的表面，并且在形成膜（包括氧化层）之前，连接到电气的暴露表面 导电层，可以完全除去形成在导电层的表面上的表面层，其包括天然氧化膜，损伤，污染物质等。

公开(公告)号：US5187557A

公开(公告)日：1993-02-16

申请号：US613070

申请日：1990-11-15

申请人： Masanobu Zenke

发明人： Masanobu Zenke

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

CPC分类号： H01L28/60

摘要： A semiconductor device having a capacitor part which is composed of the first electrode including a first titanium nitride film, a dielectric layer and a second electrode including a second titanium nitride film, the titanium nitride film being sandwiched between the dielectric layer and the first and second electrodes, whereby it is possible to obtain a capacitor having a high capacitance value and which can inhibit the reaction between the dielectric layer and the electrode and which does not result in an increase in a leakage current of the dielectric layer and a deterioration of isolation voltage.

摘要翻译： 一种具有电容器部分的半导体器件，其由包括第一氮化钛膜，电介质层的第一电极和包括第二氮化钛膜的第二电极组成，所述氮化钛膜夹在所述电介质层和所述第一和第二电极之间 电极，由此可以获得具有高电容值并且可以抑制电介质层和电极之间的反应的电容器，并且不会导致电介质层的漏电流的增加和隔离电压的劣化 。

公开(公告)号：US5956595A

公开(公告)日：1999-09-21

申请号：US892999

申请日：1997-07-15

申请人： Masanobu Zenke

发明人： Masanobu Zenke

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108

CPC分类号： H01L27/10852

摘要： In order to fabricate a semiconductor device having a stacked capacitor cell, a silicon substrate is first prepared. A lower capacitor electrode having a porous surface is then formed on the silicon substrate. Following this, the lower capacitor electrode is selectively covered with a titanium nitride film. Further, a dielectric film of a material, exhibiting high permittivity or feroelectricity, is deposited on said titanium nitride film, and an upper capacitor electrode is deposited on the dielectric film.

摘要翻译： 为了制造具有层叠电容器单元的半导体器件，首先准备硅衬底。 然后在硅衬底上形成具有多孔表面的下电容器电极。 接下来，下电极电极被氮化钛膜选择性地覆盖。 此外，在所述氮化钛膜上沉积显示高介电常数或feroelectricity的材料的电介质膜，并且在电介质膜上沉积上电容器电极。