Method and apparatus for electroplating on SOI and bulk semiconductor wafers
    3.
    发明授权
    Method and apparatus for electroplating on SOI and bulk semiconductor wafers 有权
    在SOI和体半导体晶片上电镀的方法和装置

    公开(公告)号:US08926805B2

    公开(公告)日:2015-01-06

    申请号:US13561599

    申请日:2012-07-30

    摘要: An electroplating apparatus and method for depositing a metallic layer on the surface of a wafer is provided wherein said apparatus and method do not require physical attachment of an electrode to the wafer. The surface of the wafer to be plated is positioned to face the anode and a plating fluid is provided between the wafer and the electrodes to create localized metallic plating. The wafer may be positioned to physically separate and lie between the anode and cathode so that one side of the wafer facing the anode contains a catholyte solution and the other side of the wafer facing the cathode contains an anolyte solution. Alternatively, the anode and cathode may exist on the same side of the wafer in the same plating fluid. In one example, the anode and cathode are separated by a semi permeable membrane.

    摘要翻译: 提供了一种用于在晶片的表面上沉积金属层的电镀设备和方法,其中所述设备和方法不需要将电极物理附接到晶片。 要镀覆的晶片的表面被定位成面对阳极,并且在晶片和电极之间设置电镀液以产生局部金属电镀。 晶片可以被定位成物理分离并且位于阳极和阴极之间,使得面向阳极的晶片的一侧包含阴极电解液,并且晶片的面向阴极的另一侧包含阳极电解液。 或者,阳极和阴极可以存在于同一电镀液中晶片的同一侧。 在一个实例中,阳极和阴极被半透膜隔开。

    METHOD AND APPARATUS FOR ELECTROPLATING ON SOI AND BULK SEMICONDUCTOR WAFERS
    4.
    发明申请
    METHOD AND APPARATUS FOR ELECTROPLATING ON SOI AND BULK SEMICONDUCTOR WAFERS 有权
    在SOI和大块半导体波导上电镀的方法和装置

    公开(公告)号:US20090127121A1

    公开(公告)日:2009-05-21

    申请号:US11940720

    申请日:2007-11-15

    IPC分类号: C25D5/00 C25D17/00

    摘要: An electroplating apparatus and method for depositing a metallic layer on the surface of a wafer is provided wherein said apparatus and method do not require physical attachment of an electrode to the wafer. The surface of the wafer to be plated is positioned to face the anode and a plating fluid is provided between the wafer and the electrodes to create localized metallic plating. The wafer may be positioned to physically separate and lie between the anode and cathode so that one side of the wafer facing the anode contains a catholyte solution and the other side of the wafer facing the cathode contains an anolyte solution. Alternatively, the anode and cathode may exist on the same side of the wafer in the same plating fluid. In one example, the anode and cathode are separated by a semi permeable membrane.

    摘要翻译: 提供了一种用于在晶片的表面上沉积金属层的电镀设备和方法,其中所述设备和方法不需要将电极物理附接到晶片。 要镀覆的晶片的表面被定位成面对阳极,并且在晶片和电极之间设置电镀液以产生局部金属电镀。 晶片可以被定位成物理分离并且位于阳极和阴极之间,使得面向阳极的晶片的一侧包含阴极电解液,并且晶片的面向阴极的另一侧包含阳极电解液。 或者,阳极和阴极可以存在于同一电镀液中晶片的同一侧。 在一个实例中,阳极和阴极被半透膜隔开。

    METHOD AND APPARATUS FOR ELECTROPLATING ON SOI AND BULK SEMICONDUCTOR WAFERS
    5.
    发明申请
    METHOD AND APPARATUS FOR ELECTROPLATING ON SOI AND BULK SEMICONDUCTOR WAFERS 有权
    在SOI和大块半导体波导上电镀的方法和装置

    公开(公告)号:US20120318666A1

    公开(公告)日:2012-12-20

    申请号:US13561599

    申请日:2012-07-30

    IPC分类号: C25D19/00

    摘要: An electroplating apparatus and method for depositing a metallic layer on the surface of a wafer is provided wherein said apparatus and method do not require physical attachment of an electrode to the wafer. The surface of the wafer to be plated is positioned to face the anode and a plating fluid is provided between the wafer and the electrodes to create localized metallic plating. The wafer may be positioned to physically separate and lie between the anode and cathode so that one side of the wafer facing the anode contains a catholyte solution and the other side of the wafer facing the cathode contains an anolyte solution. Alternatively, the anode and cathode may exist on the same side of the wafer in the same plating fluid. In one example, the anode and cathode are separated by a semi permeable membrane.

    摘要翻译: 提供了一种用于在晶片的表面上沉积金属层的电镀设备和方法,其中所述设备和方法不需要将电极物理附接到晶片。 要镀覆的晶片的表面被定位成面对阳极,并且在晶片和电极之间设置电镀液以产生局部金属电镀。 晶片可以被定位成物理分离并且位于阳极和阴极之间,使得面向阳极的晶片的一侧包含阴极电解液,并且晶片的面向阴极的另一侧包含阳极电解液。 或者,阳极和阴极可以存在于同一电镀液中晶片的同一侧。 在一个实例中,阳极和阴极被半透膜隔开。

    Method and apparatus for electroplating on soi and bulk semiconductor wafers
    6.
    发明授权
    Method and apparatus for electroplating on soi and bulk semiconductor wafers 有权
    用于电镀在硅和体半导体晶片上的方法和装置

    公开(公告)号:US08551313B2

    公开(公告)日:2013-10-08

    申请号:US11940720

    申请日:2007-11-15

    IPC分类号: C25D5/02

    摘要: An electroplating apparatus and method for depositing a metallic layer on the surface of a wafer is provided wherein said apparatus and method do not require physical attachment of an electrode to the wafer. The surface of the wafer to be plated is positioned to face the anode and a plating fluid is provided between the wafer and the electrodes to create localized metallic plating. The wafer may be positioned to physically separate and lie between the anode and cathode so that one side of the wafer facing the anode contains a catholyte solution and the other side of the wafer facing the cathode contains an anolyte solution. Alternatively, the anode and cathode may exist on the same side of the wafer in the same plating fluid. In one example, the anode and cathode are separated by a semi permeable membrane.

    摘要翻译: 提供了一种用于在晶片的表面上沉积金属层的电镀设备和方法,其中所述设备和方法不需要将电极物理附接到晶片。 要镀覆的晶片的表面被定位成面对阳极,并且在晶片和电极之间设置电镀液以产生局部金属电镀。 晶片可以被定位成物理分离并且位于阳极和阴极之间,使得面向阳极的晶片的一侧包含阴极电解液,并且晶片的面向阴极的另一侧包含阳极电解液。 或者,阳极和阴极可以存在于同一电镀液中晶片的同一侧。 在一个实例中,阳极和阴极被半透膜隔开。

    Complementary metal oxide semiconductor device with an electroplated metal replacement gate
    7.
    发明授权
    Complementary metal oxide semiconductor device with an electroplated metal replacement gate 失效
    具有电镀金属置换栅的互补金属氧化物半导体器件

    公开(公告)号:US07776680B2

    公开(公告)日:2010-08-17

    申请号:US11968885

    申请日:2008-01-03

    IPC分类号: H01L21/8238

    摘要: Disclosed herein are embodiments of a method of forming a complementary metal oxide semiconductor (CMOS) device that has at least one high aspect ratio gate structure with a void-free and seam-free metal gate conductor layer positioned on top of a relatively thin high-k gate dielectric layer. These method embodiments incorporate a gate replacement strategy that uses an electroplating process to fill, from the bottom upward, a high-aspect ratio gate stack opening with a metal gate conductor layer. The source of electrons for the electroplating process is a current passed directly through the back side of the substrate. This eliminates the need for a seed layer and ensures that the metal gate conductor layer will be formed without voids or seams. Furthermore, depending upon the embodiment, the electroplating process is performed under illumination to enhance electron flow to a given area (i.e., to enhance plating) or in darkness to prevent electron flow to a given area (i.e., to prevent plating).

    摘要翻译: 本文公开了一种形成互补金属氧化物半导体(CMOS)器件的方法的实施例,该器件具有至少一个高纵横比栅极结构,其中无空隙和无缝的金属栅极导体层位于相对薄的高压 k栅介质层。 这些方法实施例包括栅极替换策略,其使用电镀工艺从底部向上填充具有金属栅极导体层的高纵横比栅极堆叠开口。 用于电镀工艺的电子源是直接通过衬底背面的电流。 这消除了对种子层的需要,并且确保金属栅极导体层将形成为没有空隙或接缝。 此外,根据实施例,电镀工艺在照明下进行,以增强电子流向给定区域(即,为了增强电镀)或在黑暗中以防止电子流向给定区域(即防止电镀)。

    COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICE WITH AN ELECTROPLATED METAL REPLACEMENT GATE
    8.
    发明申请
    COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICE WITH AN ELECTROPLATED METAL REPLACEMENT GATE 失效
    具有电镀金属替代门的补充金属氧化物半导体器件

    公开(公告)号:US20090275179A1

    公开(公告)日:2009-11-05

    申请号:US11968885

    申请日:2008-01-03

    IPC分类号: H01L21/8238 H01L21/8234

    摘要: Disclosed herein are embodiments of a method of forming a complementary metal oxide semiconductor (CMOS) device that has at least one high aspect ratio gate structure with a void-free and seam-free metal gate conductor layer positioned on top of a relatively thin high-k gate dielectric layer. These method embodiments incorporate a gate replacement strategy that uses an electroplating process to fill, from the bottom upward, a high-aspect ratio gate stack opening with a metal gate conductor layer. The source of electrons for the electroplating process is a current passed directly through the back side of the substrate. This eliminates the need for a seed layer and ensures that the metal gate conductor layer will be formed without voids or seams. Furthermore, depending upon the embodiment, the electroplating process is performed under illumination to enhance electron flow to a given area (i.e., to enhance plating) or in darkness to prevent electron flow to a given area (i.e., to prevent plating).

    摘要翻译: 本文公开了一种形成互补金属氧化物半导体(CMOS)器件的方法的实施例,该器件具有至少一个高纵横比栅极结构,其中无空隙和无缝的金属栅极导体层位于相对薄的高压 k栅介质层。 这些方法实施例包括栅极替换策略,其使用电镀工艺从底部向上填充具有金属栅极导体层的高纵横比栅极堆叠开口。 用于电镀工艺的电子源是直接通过衬底背面的电流。 这消除了对种子层的需要,并且确保金属栅极导体层将形成为没有空隙或接缝。 此外,根据实施例,电镀工艺在照明下进行,以增强电子流向给定区域(即,为了增强电镀)或在黑暗中以防止电子流向给定区域(即防止电镀)。