Systems and methods for auto scaling in a data processing system
    1.
    发明授权
    Systems and methods for auto scaling in a data processing system 有权
    用于数据处理系统中自动缩放的系统和方法

    公开(公告)号:US08854753B2

    公开(公告)日:2014-10-07

    申请号:US13050129

    申请日:2011-03-17

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit having a data detection circuit is disclosed that includes: a scaling circuit, a soft output calculation circuit, and a factor calculation circuit. The scaling circuit is operable to scale a branch metric value by a scaling factor to yield a scaled output. The soft output calculation circuit is operable to calculate a soft output based at least in part on the scaled output. The factor calculation circuit operable to modify the scaling factor based at least in part on the soft output.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了具有数据检测电路的数据处理电路,其包括:缩放电路,软输出计算电路和因子计算电路。 缩放电路可操作以通过缩放因子缩放分支度量值以产生缩放的输出。 软输出计算电路可操作以至少部分地基于缩放的输出来计算软输出。 因子计算电路可操作以至少部分地基于软输出来修改缩放因子。

    Systems and Methods for Auto Scaling in a Data Processing System
    2.
    发明申请
    Systems and Methods for Auto Scaling in a Data Processing System 有权
    数据处理系统中自动缩放的系统和方法

    公开(公告)号:US20120236430A1

    公开(公告)日:2012-09-20

    申请号:US13050129

    申请日:2011-03-17

    IPC分类号: G11B5/09

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit having a data detection circuit is disclosed that includes: a scaling circuit, a soft output calculation circuit, and a factor calculation circuit. The scaling circuit is operable to scale a branch metric value by a scaling factor to yield a scaled output. The soft output calculation circuit is operable to calculate a soft output based at least in part on the scaled output. The factor calculation circuit operable to modify the scaling factor based at least in part on the soft output.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了具有数据检测电路的数据处理电路,其包括:缩放电路,软输出计算电路和因子计算电路。 缩放电路可操作以通过缩放因子缩放分支度量值以产生缩放的输出。 软输出计算电路可操作以至少部分地基于缩放的输出来计算软输出。 因子计算电路可操作以至少部分地基于软输出来修改缩放因子。

    Systems and methods for enhanced media defect detection
    3.
    发明授权
    Systems and methods for enhanced media defect detection 有权
    增强介质缺陷检测的系统和方法

    公开(公告)号:US08219892B2

    公开(公告)日:2012-07-10

    申请号:US12399713

    申请日:2009-03-06

    IPC分类号: G06F11/00

    摘要: Various embodiments of the present invention provide systems and methods for detecting storage medium defects. As one example, a media defect detection system is disclosed that includes a data detector circuit that applies a detection algorithm to the data input and provides a hard output and a soft output. A first circuit combines a first derivative of the hard output with a derivative of the data input to yield a first combined signal. A second circuit combines a second derivative of the hard output with a derivative of the first combined signal to yield a second combined signal. A third circuit combines a derivative of the soft output with the second combined signal and a threshold value to yield a defect signal.

    摘要翻译: 本发明的各种实施例提供了用于检测存储介质缺陷的系统和方法。 作为一个示例,公开了一种媒体缺陷检测系统,其包括将检测算法应用于数据输入并提供硬输出和软输出的数据检测器电路。 第一电路将硬输出的一阶导数与数据输入的导数组合以产生第一组合信号。 第二电路将硬输出的二阶导数与第一组合信号的导数组合以产生第二组合信号。 第三电路将软输出的导数与第二组合信号和阈值组合以产生缺陷信号。

    Method for detecting short burst errors in LDPC system
    4.
    发明授权
    Method for detecting short burst errors in LDPC system 有权
    用于检测LDPC系统中短脉冲串错误的方法

    公开(公告)号:US08201051B2

    公开(公告)日:2012-06-12

    申请号:US12287959

    申请日:2008-10-15

    IPC分类号: H03M13/00

    CPC分类号: H03M13/1128 H03M13/17

    摘要: The present invention is a device for detecting short burst errors. The device includes a first signal input, wherein the first signal input is configured to receive a first signal. The device includes a second signal input, wherein the second signal input is configured to receive a second signal. The device includes a logic gate, wherein the logic gate is operable for receiving the first signal vial the first signal input, receiving the second signal via the second signal input, and generating a logic output gate signal based on the received first signal and the second signal. Furthermore, the device includes a filter, wherein the filter is configured for receiving the logic output gate signal from the logic gate and generates a filter output signal based upon the received logic output gate signal, wherein the filter output signal is operable for flagging errors.

    摘要翻译: 本发明是用于检测短脉冲串错误的装置。 该设备包括第一信号输入,其中第一信号输入被配置为接收第一信号。 该设备包括第二信号输入,其中第二信号输入被配置为接收第二信号。 该装置包括逻辑门,其中逻辑门可操作用于接收第一信号输入端,第一信号输入端,经由第二信号输入端接收第二信号,并根据接收到的第一信号和第二信号产生逻辑输出门信号 信号。 此外,该器件包括滤波器,其中滤波器被配置为从逻辑门接收逻辑输出门信号,并且基于接收的逻辑输出门信号产生滤波器输出信号,其中滤波器输出信号可用于标记误差。

    Using short burst error detector in a queue-based system
    5.
    发明申请
    Using short burst error detector in a queue-based system 有权
    在基于队列的系统中使用短脉冲串错误检测器

    公开(公告)号:US20090276689A1

    公开(公告)日:2009-11-05

    申请号:US12380237

    申请日:2009-02-25

    IPC分类号: G06F11/07

    摘要: A system, method, and device for detecting short burst errors in a queue-based system is disclosed. A first detector performs a data detection on a first input data set at a first time and on a second input data set at a second time. A second detector performs a data re-detection on input data sets. A decoder decodes derivations of the outputs of the first and second detector. A short burst error detector may perform a short burst error detection on decoded data and erase any detected errors. An output data buffer stores and orders the decoded data for output.

    摘要翻译: 公开了一种用于检测基于队列的系统中的短脉冲串错误的系统,方法和装置。 第一检测器在第一时间对第一输入数据集合和第二输入数据集进行数据检测。 第二检测器对输入数据集执行数据重新检测。 解码器解码第一和第二检测器的输出的导数。 短脉冲串错误检测器可对解码数据执行短脉冲串错误检测,并擦除任何检测到的错误。 输出数据缓冲器存储并排序解码数据进行输出。

    Systems and methods for error reduction associated with information transfer
    6.
    发明申请
    Systems and methods for error reduction associated with information transfer 有权
    与信息传输相关的错误减少的系统和方法

    公开(公告)号:US20070192666A1

    公开(公告)日:2007-08-16

    申请号:US11341963

    申请日:2006-01-26

    IPC分类号: H03M13/00

    摘要: Various systems and methods for error reduction in a digital information system are disclosed herein. As one example, a digital storage system is provided that includes a storage medium that with an encoded data set accessible via a buffer. The systems further include a soft output Viterbi algorithm channel detector operable to receive the encoded data set, and to provide a hard and a soft output representing the encoded data set. The hard and the soft output from the soft output Viterbi algorithm channel detector are provided to a single parity row decoder that provides another hard output that is an error reduced representation of the encoded data set. The encoded data set is additionally provided from the buffer to another channel detector via a delay element. The delay element time shifts the encoded data set to create a time shifted encoded data set. The hard output from the single parity row decoder and the time shifted encoded data set are provided to coincident with each other to another channel detector. This other channel detector provides a recovered output that exhibits a reduction in errors compared with the encoded data set.

    摘要翻译: 本文公开了用于数字信息系统中的差错减少的各种系统和方法。 作为一个示例,提供数字存储系统,其包括具有经由缓冲器可访问的编码数据集的存储介质。 所述系统还包括软输出维特比算法信道检测器,其可操作以接收编码数据集,并提供表示编码数据集的硬和软输出。 来自软输出维特比算法信道检测器的硬和软输出被提供给单个奇偶校验行解码器,其提供作为编码数据集的错误减少表示的另一硬输出。 编码数据集通过延迟元件从缓冲器附加地提供给另一个通道检测器。 延迟元件时间移动编码数据集以创建时移编码数据集。 提供来自单个奇偶校验行解码器和时移编码数据组的硬输出以彼此重合到另一个通道检测器。 该另一通道检测器提供了与编码数据集相比显示出差错的恢复输出。

    Method for detecting short burst errors in LDPC system
    7.
    发明授权
    Method for detecting short burst errors in LDPC system 有权
    用于检测LDPC系统中短脉冲串错误的方法

    公开(公告)号:US08341495B2

    公开(公告)日:2012-12-25

    申请号:US13469746

    申请日:2012-05-11

    IPC分类号: H03M13/00 H03M13/03

    CPC分类号: H03M13/1128 H03M13/17

    摘要: The present invention is a device for detecting short burst errors. The device includes a first signal input, wherein the first signal input is configured to receive a first signal. The device includes a second signal input, wherein the second signal input is configured to receive a second signal. The device includes a logic gate, wherein the logic gate is operable for receiving the first signal via the first signal input, receiving the second signal via the second signal input, and generating a logic output gate signal based on the received first signal and the second signal. Furthermore, the device includes a filter, wherein the filter is configured for receiving the logic output gate signal from the logic gate and generates a filter output signal based upon the received logic output gate signal, wherein the filter output signal is operable for flagging errors.

    摘要翻译: 本发明是用于检测短脉冲串错误的装置。 该设备包括第一信号输入,其中第一信号输入被配置为接收第一信号。 该设备包括第二信号输入,其中第二信号输入被配置为接收第二信号。 该器件包括逻辑门,其中逻辑门可操作用于经由第一信号输入接收第一信号,经由第二信号输入接收第二信号,并且基于接收到的第一信号和第二信号产生逻辑输出门信号 信号。 此外,该器件包括滤波器,其中滤波器被配置为从逻辑门接收逻辑输出门信号,并且基于接收的逻辑输出门信号产生滤波器输出信号,其中滤波器输出信号可用于标记误差。

    Using short burst error detector in a queue-based system
    8.
    发明授权
    Using short burst error detector in a queue-based system 有权
    在基于队列的系统中使用短脉冲串错误检测器

    公开(公告)号:US08176399B2

    公开(公告)日:2012-05-08

    申请号:US12380237

    申请日:2009-02-25

    IPC分类号: H03M13/03

    摘要: A system, method, and device for detecting short burst errors in a queue-based system is disclosed. A first detector performs a data detection on a first input data set at a first time and on a second input data set at a second time. A second detector performs a data re-detection on input data sets. A decoder decodes derivations of the outputs of the first and second detector. A short burst error detector may perform a short burst error detection on decoded data and erase any detected errors. An output data buffer stores and orders the decoded data for output.

    摘要翻译: 公开了一种用于检测基于队列的系统中的短脉冲串错误的系统,方法和装置。 第一检测器在第一时间对第一输入数据集合和第二输入数据集进行数据检测。 第二检测器对输入数据集执行数据重新检测。 解码器解码第一和第二检测器的输出的导数。 短脉冲串错误检测器可对解码数据执行短脉冲串错误检测,并擦除任何检测到的错误。 输出数据缓冲器存储并排序解码数据进行输出。

    Systems and methods for media defect detection utilizing correlated DFIR and LLR data
    9.
    发明授权
    Systems and methods for media defect detection utilizing correlated DFIR and LLR data 有权
    使用相关的DFIR和LLR数据进行媒体缺陷检测的系统和方法

    公开(公告)号:US07849385B2

    公开(公告)日:2010-12-07

    申请号:US12111255

    申请日:2008-04-29

    IPC分类号: H03M13/00

    CPC分类号: G11B20/1816

    摘要: The present invention provides systems and methods for detecting a media defect. A circuit providing a hard output and a soft output is used with the hard output and the soft output being combined and the product compared with a threshold. Based at least in part on the comparison, a media defect may be identified.

    摘要翻译: 本发明提供了用于检测介质缺陷的系统和方法。 提供硬输出和软输出的电路与硬输出和软输出组合使用,并将产品与阈值进行比较。 至少部分地基于比较,可以识别媒体缺陷。

    Systems and Methods for Media Defect Detection Utilizing Correlated DFIR and LLR Data
    10.
    发明申请
    Systems and Methods for Media Defect Detection Utilizing Correlated DFIR and LLR Data 有权
    使用相关DFIR和LLR数据的介质缺陷检测系统和方法

    公开(公告)号:US20090271670A1

    公开(公告)日:2009-10-29

    申请号:US12111255

    申请日:2008-04-29

    IPC分类号: G11C29/08 G06F11/263

    CPC分类号: G11B20/1816

    摘要: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a method for detecting a media defect is disclosed. The method includes deriving a data input from a medium and performing a MAP detection on the data input. The MAP detection provides an NRZ output and an LLR output corresponding to the data input. A product of the NRZ output is correlated with a product of the LLR output to produce a correlated output. The correlated output is compared with a threshold value, and a media defect output is asserted based at least in part on the result of the comparison of the correlated output with the threshold value.

    摘要翻译: 本发明的各种实施例提供了用于介质缺陷检测的系统和方法。 例如,公开了一种用于检测介质缺陷的方法。 该方法包括从介质导出数据输入并对数据输入执行MAP检测。 MAP检测提供与数据输入相对应的NRZ输出和LLR输出。 NRZ输出的乘积与LLR输出的乘积相关,以产生相关输出。 将相关输出与阈值进行比较,并且至少部分地基于相关输出与阈值的比较的结果来确定介质缺陷输出。