公开(公告)号：US20090243099A1

公开(公告)日：2009-10-01

申请号：US12056797

申请日：2008-03-27

申请人： Wen-Jeng FAN ,  Yi-Ling Liu ,  Shin-Hui Huang ,  Tsai-Chuan Yu

发明人： Wen-Jeng FAN ,  Yi-Ling Liu ,  Shin-Hui Huang ,  Tsai-Chuan Yu

IPC分类号： H01L23/49

CPC分类号： H01L24/49 ,  H01L23/13 ,  H01L23/49838 ,  H01L24/48 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/242 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A window-type BGA semiconductor package is revealed, primarily comprising a substrate with a wire-bonding slot, a chip disposed on a top surface of the substrate, and a plurality of bonding wires passing through the wire-bonding slot. A plurality of plating line stubs are formed on a bottom surface of the substrate, connect the bonding fingers on the substrate and extend to the wire-bonding slot. The bonding wires electrically connect the bonding pads of the chip to the corresponding bonding fingers of the substrate. The plating line stubs are compliant to the wire-bonding paths of the bonding wires correspondingly connected at the bonding fingers, such as parallel to the overlapped arrangement, to avoid electrical short between the plating line stubs and the bonding wires with no corresponding relationship of electrical connections.

摘要翻译： 揭示了一种窗型BGA半导体封装，主要包括具有引线键合槽的衬底，设置在衬底顶表面上的芯片以及穿过引线接合槽的多个接合线。 在基板的底面上形成有多个电镀线短截线，将基板上的接合爪连接到引线接合槽。 接合线将芯片的接合焊盘电连接到衬底的相应接合指状物。 电镀线短截线与在接合指状物处相对应地连接的接合线的引线接合路径（例如平行于重叠布置），以避免电镀线短截线和接合线之间的电短路，没有相应的电气关系 连接。

公开(公告)号：US07732921B2

公开(公告)日：2010-06-08

申请号：US12056797

申请日：2008-03-27

申请人： Wen-Jeng Fan ,  Yi-Ling Liu ,  Shin-Hui Huang ,  Tsai-Chuan Yu

发明人： Wen-Jeng Fan ,  Yi-Ling Liu ,  Shin-Hui Huang ,  Tsai-Chuan Yu

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/49 ,  H01L23/13 ,  H01L23/49838 ,  H01L24/48 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/242 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A window-type BGA semiconductor package is revealed, primarily comprising a substrate with a wire-bonding slot, a chip disposed on a top surface of the substrate, and a plurality of bonding wires passing through the wire-bonding slot. A plurality of plating line stubs are formed on a bottom surface of the substrate, connect the bonding fingers on the substrate and extend to the wire-bonding slot. The bonding wires electrically connect the bonding pads of the chip to the corresponding bonding fingers of the substrate. The plating line stubs are compliant to the wire-bonding paths of the bonding wires correspondingly connected at the bonding fingers, such as parallel to the overlapped arrangement, to avoid electrical short between the plating line stubs and the bonding wires with no corresponding relationship of electrical connections.

摘要翻译： 揭示了一种窗型BGA半导体封装，主要包括具有引线键合槽的衬底，设置在衬底顶表面上的芯片以及穿过引线接合槽的多个接合线。 在基板的底面上形成有多个电镀线短截线，将基板上的接合爪连接到引线接合槽。 接合线将芯片的接合焊盘电连接到衬底的相应接合指状物。 电镀线短截线与在接合指状物处相对应地连接的接合线的引线接合路径（例如平行于重叠布置），以避免电镀线短截线和接合线之间的电短路，没有相应的电气关系 连接。

公开(公告)号：US20110113183A1

公开(公告)日：2011-05-12

申请号：US12614544

申请日：2009-11-09

申请人： Tsung-Hsi Lee ,  Wen-Jun Zeng ,  Chung-Ning Huang ,  Shin-Hui Huang

发明人： Tsung-Hsi Lee ,  Wen-Jun Zeng ,  Chung-Ning Huang ,  Shin-Hui Huang

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/7201

摘要： A method for managing a non-violate memory is provided. The non-violate memory has a number of blocks, and each block has a number of sub-blocks. The method includes a number of steps. First, a last physical address is obtained. The last physical address corresponds to a sub-block which is close to another sub-block where data is newly stored. Next, it is determined, for each sub-block of at least one block, the validity of data being stored. The at least one block is at least one neighboring block of a block containing the corresponding sub-block of the last physical address. Then, a mapping table is produced according to the step of determining the validity of data.

摘要翻译： 提供了一种用于管理非违规存储器的方法。 非违规存储器具有多个块，并且每个块具有多个子块。 该方法包括多个步骤。 首先，获得最后一个物理地址。 最后一个物理地址对应于接近新存储数据的另一子块的子块。 接下来，对于至少一个块的每个子块确定正在存储的数据的有效性。 至少一个块是包含最后物理地址的对应子块的块的至少一个相邻块。 然后，根据确定数据的有效性的步骤产生映射表。

公开(公告)号：US08296506B2

公开(公告)日：2012-10-23

申请号：US12614544

申请日：2009-11-09

申请人： Tsung-Hsi Lee ,  Wen-Jun Zeng ,  Chung-Ning Huang ,  Shin-Hui Huang

发明人： Tsung-Hsi Lee ,  Wen-Jun Zeng ,  Chung-Ning Huang ,  Shin-Hui Huang

IPC分类号： G06F12/10

CPC分类号： G06F12/0246 ,  G06F2212/7201

摘要： A method for managing a non-volatile memory is provided. The non-volatile memory has a number of blocks, and each block has a number of sub-blocks. The method includes a number of steps. First, a last physical address is obtained. The last physical address corresponds to a sub-block which is close to another sub-block where data is newly stored. Next, it is determined, for each sub-block of at least one block, the validity of data being stored. The at least one block is at least one neighboring block of a block containing the corresponding sub-block of the last physical address. Then, a mapping table is produced according to the step of determining the validity of data.

摘要翻译： 提供了一种用于管理非易失性存储器的方法。 非易失性存储器具有多个块，并且每个块具有多个子块。 该方法包括多个步骤。 首先，获得最后一个物理地址。 最后一个物理地址对应于接近新存储数据的另一子块的子块。 接下来，对于至少一个块的每个子块确定正在存储的数据的有效性。 至少一个块是包含最后物理地址的对应子块的块的至少一个相邻块。 然后，根据确定数据的有效性的步骤产生映射表。

公开(公告)号：US08156278B2

公开(公告)日：2012-04-10

申请号：US12466381

申请日：2009-05-14

申请人： Guo-Zua Wu ,  Shin-Hui Huang

发明人： Guo-Zua Wu ,  Shin-Hui Huang

IPC分类号： G06F13/00 ,  G06F9/26 ,  G06F9/00

CPC分类号： G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7202 ,  G06F2212/7208 ,  Y02D10/13

摘要： A non-volatile data storage system including a first non-volatile storage medium, a second non-volatile storage medium, and a microprocessor is provided. The first non-volatile storage medium includes a popular data address recording area for recording logic addresses of popular data in the first non-volatile storage medium. The microprocessor is coupled to the first non-volatile storage medium and the second non-volatile storage medium. When the non-volatile data storage system boots up, the microprocessor copies the popular data from the first non-volatile storage medium to the second non-volatile storage medium according to the popular data address recording area. The popular data is accessed in the second non-volatile storage medium instead of the first non-volatile storage medium.

摘要翻译： 提供了包括第一非易失性存储介质，第二非易失性存储介质和微处理器的非易失性数据存储系统。 第一非易失性存储介质包括用于记录第一非易失性存储介质中流行数据的逻辑地址的通用数据地址记录区域。 微处理器耦合到第一非易失性存储介质和第二非易失性存储介质。 当非易失性数据存储系统启动时，微处理器根据流行的数据地址记录区域将流行数据从第一非易失性存储介质复制到第二非易失性存储介质。 流行数据在第二非易失性存储介质中而不是第一非易失性存储介质被访问。

公开(公告)号：US20100115187A1

公开(公告)日：2010-05-06

申请号：US12466381

申请日：2009-05-14

申请人： Guo-Zua Wu ,  Shin-Hui Huang

发明人： Guo-Zua Wu ,  Shin-Hui Huang

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7202 ,  G06F2212/7208 ,  Y02D10/13

摘要： A non-volatile data storage system including a first non-volatile storage medium, a second non-volatile storage medium, and a microprocessor is provided. The first non-volatile storage medium includes a popular data address recording area for recording logic addresses of popular data in the first non-volatile storage medium. The microprocessor is coupled to the first non-volatile storage medium and the second non-volatile storage medium. When the non-volatile data storage system boots up, the microprocessor copies the popular data from the first non-volatile storage medium to the second non-volatile storage medium according to the popular data address recording area. The popular data is accessed in the second non-volatile storage medium instead of the first non-volatile storage medium.

摘要翻译： 提供了包括第一非易失性存储介质，第二非易失性存储介质和微处理器的非易失性数据存储系统。 第一非易失性存储介质包括用于记录第一非易失性存储介质中流行数据的逻辑地址的通用数据地址记录区域。 微处理器耦合到第一非易失性存储介质和第二非易失性存储介质。 当非易失性数据存储系统启动时，微处理器根据流行的数据地址记录区域将流行数据从第一非易失性存储介质复制到第二非易失性存储介质。 流行数据在第二非易失性存储介质中而不是第一非易失性存储介质被访问。