Modem with pilot symbol synchronization
    1.
    发明申请
    Modem with pilot symbol synchronization 审中-公开
    调制解调器与导频符号同步

    公开(公告)号:US20050047496A1

    公开(公告)日:2005-03-03

    申请号:US10640190

    申请日:2003-08-13

    摘要: A modem, or a communication system, in its transmission section, has signal-formatting circuitry followed by circuitry for insertion of a sequence of pilot symbols into a sequence of data symbols outputted by the formatting circuitry. Placement of the insertion circuitry after the formatting circuitry permits a variety of formatting options without effecting the sequence of pilot symbols that serves as a time reference useful in detection of a signal transmitted by the modem. The reception section of the modem is equipped correspondingly to process a received composite signal of data symbols having a prescribed format and a sequence of pilot symbols. The reception section extracts the sequence of pilot symbols from the composite signal, and employs the pilot symbols to develop a time base for operation of circuitry for decoding the format of the received composite signal to extract data from the composite signal.

    摘要翻译: 在其传输部分中的调制解调器或通信系统具有信号格式化电路,其后面是用于将导频符号序列插入由格式化电路输出的数据符号序列中的电路。 在格式化电路之后插入电路的放置允许各种格式化选项,而不影响用作检测由调制解调器发送的信号的有用的时间参考的导频符号序列。 调制解调器的接收部分相应地配备处理具有规定格式和导频符号序列的数据符号的接收复合信号。 接收部分从复合信号中提取导频符号序列,并且使用导频符号来形成用于解码接收的复合信号的格式的电路的操作时基,以从复合信号中提取数据。

    Parallel DSP demodulation for wideband software-defined radios
    2.
    发明申请
    Parallel DSP demodulation for wideband software-defined radios 有权
    用于宽带软件定义无线电的并行DSP解调

    公开(公告)号:US20050286619A1

    公开(公告)日:2005-12-29

    申请号:US10878902

    申请日:2004-06-28

    IPC分类号: H04B1/28 H04B1/38

    摘要: A demodulator, suitable for use in a communication system and in a modem, has a block polyphase circuit with circuit blocks for different signal processing functions, particularly filtering, delay, and frequency conversion. The circuit blocks are arranged for parallel processing of different portions of an input sequence of signals. Signals of the input sequence to be filtered are divided among the blocks by a demultiplexer for processing at a clock frequency lower than a clock frequency of the input signal sequence. Signals outputted by groups of the circuit blocks are summed to produce an output signal of the group. Frequency and timing reference signals, as well as fractional delay interpolation, are produced also by parallel-channel circuitry. Output signals of all of the groups are multiplexed to provide an output signal sequence such that the repetition frequency of the outputted signals may be higher, lower, or equal to that of the input signal sequence. This enables use of programmable circuitry operative at clock rates lower than rates required to process directly the input signal sequence.

    摘要翻译: 适用于通信系统和调制解调器的解调器具有块多相电路,具有用于不同信号处理功能的电路块,特别是滤波,延迟和频率转换。 电路块被布置用于对输入信号序列的不同部分进行并行处理。 要被滤波的输入序列的信号由解复用器在块之间划分,以在低于输入信号序列的时钟频率的时钟频率处理。 将由电路块的组输出的信号相加以产生该组的输出信号。 频率和定时参考信号以及分数延迟插值也由并行通道电路产生。 所有组的输出信号被复用以提供输出信号序列,使得输出信号的重复频率可以高于,低于或等于输入信号序列的重复频率。 这使得可以使用以低于直接处理输入信号序列所需的速率的时钟速率工作的可编程电路。

    Method and apparatus for switching between multiple waveforms
    3.
    发明授权
    Method and apparatus for switching between multiple waveforms 有权
    用于在多个波形之间切换的方法和装置

    公开(公告)号:US07440517B1

    公开(公告)日:2008-10-21

    申请号:US10944685

    申请日:2004-09-17

    IPC分类号: H04L27/00

    CPC分类号: H04L27/0008

    摘要: A method and system is disclosed for demodulating multiple waveforms, with different modulation formats, in the same hardware by providing a software-configurable demodulator that configures itself in response to varying input waveform types. The system reconfigures its logic to accommodate the format of the signals being received and further allows for reconfiguration of demodulator functional block interfaces to remove downtime during multiple waveform processing.

    摘要翻译: 公开了一种方法和系统,用于通过提供响应于变化的输入波形类型来配置自身的软件可配置解调器在相同的硬件中解调具有不同调制格式的多个波形。 该系统重新配置其逻辑以适应正在接收的信号的格式,并且还允许对解调器功能块接口进行重新配置,以消除多个波形处理期间的停机时间。

    Transmitter-directed security for wireless-communications
    4.
    发明授权
    Transmitter-directed security for wireless-communications 有权
    用于无线通信的发射机定向安全

    公开(公告)号:US08358613B1

    公开(公告)日:2013-01-22

    申请号:US12394429

    申请日:2009-02-27

    IPC分类号: H04Q7/00

    CPC分类号: H04W12/02

    摘要: Transmitter-directed transmission security is provided between a transmit node and a receive node. The transmit node selects transmission format for each data frame based on a transmission security scenario. Information related to the transmission format is communicated between the transmit node and the receive node, and the data frames are transmitted over a wireless communication link using the selected transmission formats.

    摘要翻译: 在发射节点和接收节点之间提供发射机定向的传输安全性。 发送节点基于传输安全场景选择每个数据帧的传输格式。 与发送格式相关的信息在发送节点和接收节点之间进行通信,并且使用所选择的发送格式通过无线通信链路发送数据帧。

    Finite impulse response filter with parallel input
    5.
    发明授权
    Finite impulse response filter with parallel input 有权
    具有并行输入的有限脉冲响应滤波器

    公开(公告)号:US09098435B1

    公开(公告)日:2015-08-04

    申请号:US11540142

    申请日:2006-09-28

    IPC分类号: G06F17/14 G06F7/53

    摘要: A filter and method for finite impulse response filtering an input signal is described. In one embodiment, the filter includes an input circuit configured to receive input samples in parallel, where the parallel input samples correspond to sequential samples of the input signal. In another embodiment, the filter includes a coefficient memory configured to store filter response coefficients and output a subset of those coefficients corresponding to a selected decimation factor.

    摘要翻译: 描述了一种用于对输入信号进行有限脉冲响应滤波的滤波器和方法。 在一个实施例中,滤波器包括被配置为并行地接收输入采样的输入电路,其中并行输入样本对应于输入信号的顺序采样。 在另一个实施例中,滤波器包括被配置为存储滤波器响应系数并输出对应于所选抽取因子的那些系数的子集的系数存储器。

    Parallel filter realization for wideband programmable digital radios
    7.
    发明申请
    Parallel filter realization for wideband programmable digital radios 有权
    宽带可编程数字无线电并行滤波器实现

    公开(公告)号:US20060031274A1

    公开(公告)日:2006-02-09

    申请号:US10914554

    申请日:2004-08-09

    IPC分类号: G06F17/10

    摘要: A block polyphase filter is constructed of a set of filter blocks having different filter functions, and being arranged for parallel processing of portions of an input sequence of signals. Signals of the input sequence are divided among the blocks by a demultiplexer for processing at a clock frequency lower than a clock frequency of the input signal sequence. The filter blocks are arranged in groups, wherein output signals of the blocks in any one group are summed to produce an output signal of the filtered group. Output signals of all of the filter groups are multiplexed to provide an output signal sequence wherein the repetition frequency of the signals may be higher, lower, or equal to the repetition frequency of the input signal sequence depending upon the ratio of the number of filter groups to the number of filter blocks in the set of filter blocks.

    摘要翻译: 块多相滤波器由具有不同滤波器功能的一组滤波器块构成,并被布置用于并行处理输入信号序列的部分。 输入序列的信号由解复用器在块之间分割,以便在低于输入信号序列的时钟频率的时钟频率处理。 滤波器块被分组布置,其中将任一组中的块的输出信号相加以产生滤波组的输出信号。 所有滤波器组的输出信号被复用以提供输出信号序列,其中信号的重复频率可以更高,更低或等于输入信号序列的重复频率,这取决于滤波器组的数量 到滤波器块集合中的滤波器块的数量。