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    Resistive memory
    1.
    发明授权
    Resistive memory 有权

    公开(公告)号：US11055021B2

    公开(公告)日：2021-07-06

    申请号：US16353339

    申请日：2019-03-14

    Applicant: Winbond Electronics Corp.

    Inventor： Ping-Kun Wang ,  Shao-Ching Liao ,  Chien-Min Wu ,  Chia Hua Ho ,  Frederick Chen ,  He-Hsuan Chao ,  Seow-Fong Lim

    IPC: G06F3/06 ,  G06F11/07 ,  G11C13/00

    Abstract: A resistive memory including a storage array, a storage circuit, a control circuit, a voltage generation circuit and an access circuit is provided. The storage array includes a plurality of blocks. Each block includes a plurality of memory cells. The storage circuit stores a plurality of count values. Each of the count values indicates the number of times that a corresponding block performs a write operation. The control circuit generates a control signal according to the count values when an external command is a write command. The voltage generation circuit provides an operation voltage group according to the control signal. The access circuit accesses the storage array according to the operation voltage group.

    Key generator with resistive memory and method thereof
    5.
    发明授权
    Key generator with resistive memory and method thereof 有权

    公开(公告)号：US11601267B2

    公开(公告)日：2023-03-07

    申请号：US16361796

    申请日：2019-03-22

    Applicant: Winbond Electronics Corp.

    Inventor： Meng-Hung Lin ,  Chia Hua Ho ,  Bo-Lun Wu

    IPC: H04L9/08 ,  G11C13/00

    Abstract: A key generator including a first access circuit, a first calculating circuit and a first certification circuit is provided. The first access circuit writes first predetermined data to a first resistive memory cell during a write period and reads a first current passing through the first resistive memory cell after a randomization process. The first calculating circuit calculates the first current to generate a first calculation result. The first certification circuit generates a first password according to the first calculation result.

    Write method for resistive memory
    6.
    发明授权
    Write method for resistive memory 有权

    公开(公告)号：US11520526B2

    公开(公告)日：2022-12-06

    申请号：US17337003

    申请日：2021-06-02

    Applicant: Winbond Electronics Corp.

    Inventor： Ping-Kun Wang ,  Shao-Ching Liao ,  Chien-Min Wu ,  Chia Hua Ho ,  Frederick Chen ,  He-Hsuan Chao ,  Seow-Fong Lim

    IPC: G06F3/06 ,  G11C13/00

    Abstract: A write method for a resistive memory including a storage array, a control circuit and an access circuit is provided. The control circuit receives an external command to activate the access circuit to access the storage array. The write method includes determining whether the external command is ready to perform a write operation for the storage array; generating a first operation voltage group to the access circuit when the external command does not perform the write operation for the storage array; reading a count value of a block that corresponds to a write address when the external command performs the write operation for the storage array, wherein the count value indicates the number of times that the block corresponding to the write address performs the write operation; and generating a second operation voltage group to the access circuit according to the count value of the block.

    Stacked electronic device and method for fabricating the same
    7.
    发明授权
    Stacked electronic device and method for fabricating the same 有权

    公开(公告)号：US10483235B2

    公开(公告)日：2019-11-19

    申请号：US15057973

    申请日：2016-03-01

    Applicant: Winbond Electronics Corp.

    Inventor： Yu-Cheng Chiao ,  Tung-Yi Chan ,  Chen-Hsi Lin ,  Chia Hua Ho ,  Meng-Chang Chan ,  Hsin-Hung Chou

    IPC: H01L25/065

    Abstract: A method for fabricating a stacked electronic device is provided. A first three-dimensional (3D) printing is performed to form a first insulating layer and a plurality of first redistribution layers (RDLs) on a first substrate. A second 3D printing is performed to form a second substrate and a plurality of through-substrate vias (TSVs) on the first insulating layer, in which the plurality of TSVs is electrically connected to the plurality of first RDLs. A third 3D printing is performed to form a second insulating layer and a plurality of second RDLs on the second substrate, in which the plurality of second RDLs is electrically connected to the plurality of TSVs. A plurality of contacts of a third substrate is bonded to the plurality of second RDLs, so that the substrate is mounted onto the second insulating layer. The disclosure also provides a stacked electronic device formed by such a method.

    Structure and formation method of memory device
    8.
    发明授权
    Structure and formation method of memory device 有权
    存储器件的结构和形成方法

    公开(公告)号：US09356235B2

    公开(公告)日：2016-05-31

    申请号：US14474931

    申请日：2014-09-02

    Applicant: Winbond Electronics Corp.

    Inventor： Po-Yen Hsu ,  Hsiu-Han Liao ,  Shuo-Che Chang ,  Chia Hua Ho

    IPC: H01L45/00

    CPC classification number: H01L45/146 ,  H01L45/06 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1616 ,  H01L45/1641

    Abstract: Structures and formation methods of memory devices are provided. The memory device includes a first electrode, a second electrode, and a resistive layer positioned between the first electrode and the second electrode. The resistive layer has a crystalline portion. A volume ratio of the crystalline portion to the resistive layer is in a range from about 0.2 to about 1.

    Abstract translation: 提供了存储器件的结构和形成方法。 存储器件包括位于第一电极和第二电极之间的第一电极，第二电极和电阻层。 电阻层具有结晶部分。 结晶部分与电阻层的体积比在约0.2至约1的范围内。

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