公开(公告)号：US08742782B2

公开(公告)日：2014-06-03

申请号：US13191555

申请日：2011-07-27

申请人： Xu Ouyang ,  Tso-Hui Ting ,  Ping-Chuan Wang ,  Yongchun Xin

发明人： Xu Ouyang ,  Tso-Hui Ting ,  Ping-Chuan Wang ,  Yongchun Xin

IPC分类号： G01R31/28

CPC分类号： G01R31/31728

摘要： An on-chip technique for noncontact electrical testing of a test structure on a chip is provided. On-chip photodiodes receives pump light from a pump light source, where the on-chip photodiodes are electrically connected to the test structure and are configured to generate power for the test structure. An on-chip coupling unit receives probe light from a probe light source, where the on-chip coupling unit is optically connected to on-chip waveguides through which the probe light is transferred. On-chip switches open in response to receiving voltage output from the test structure, and the on-chip switches remain closed when the voltage output is not received from the test structure. The on-chip switches pass the probe light when opened by the voltage output from the test structure. The on-chip switches block the probe light by remaining closed, when the voltage output is not received from the test structure.

摘要翻译： 提供了芯片上测试结构的非接触电测试的片上技术。 片上光电二极管从泵浦光源接收泵浦光，其中片上光电二极管电连接到测试结构，并且被配置为产生用于测试结构的电力。 片上耦合单元接收来自探针光源的探测光，其中片上耦合单元光学连接到传输探针光的片上波导。 响应于测试结构的接收电压输出，片内开关打开，并且当没有从测试结构接收到电压输出时，片上开关保持闭合。 当由测试结构输出的电压打开时，片上开关通过探测灯。 当没有从测试结构接收到电压输出时，片内开关通过保持关闭来阻止探测光。

公开(公告)号：US20130027051A1

公开(公告)日：2013-01-31

申请号：US13191555

申请日：2011-07-27

申请人： Xu Ouyang ,  Tso-Hui Ting ,  Ping-Chuan Wang ,  Yongchun Xin

发明人： Xu Ouyang ,  Tso-Hui Ting ,  Ping-Chuan Wang ,  Yongchun Xin

IPC分类号： G01R31/3187

CPC分类号： G01R31/31728

摘要： An on-chip technique for noncontact electrical testing of a test structure on a chip is provided. On-chip photodiodes receives pump light from a pump light source, where the on-chip photodiodes are electrically connected to the test structure and are configured to generate power for the test structure. An on-chip coupling unit receives probe light from a probe light source, where the on-chip coupling unit is optically connected to on-chip waveguides through which the probe light is transferred. On-chip switches open in response to receiving voltage output from the test structure, and the on-chip switches remain closed when the voltage output is not received from the test structure. The on-chip switches pass the probe light when opened by the voltage output from the test structure. The on-chip switches block the probe light by remaining closed, when the voltage output is not received from the test structure.

摘要翻译： 提供了芯片上测试结构的非接触电测试的片上技术。 片上光电二极管从泵浦光源接收泵浦光，其中片上光电二极管电连接到测试结构，并且被配置为产生用于测试结构的电力。 片上耦合单元接收来自探针光源的探测光，其中片上耦合单元光学连接到传输探针光的片上波导。 响应于测试结构的接收电压输出，片内开关打开，并且当没有从测试结构接收到电压输出时，片上开关保持闭合。 当由测试结构输出的电压打开时，片上开关通过探测灯。 当没有从测试结构接收到电压输出时，片内开关通过保持关闭来阻止探测光。

公开(公告)号：US20130106455A1

公开(公告)日：2013-05-02

申请号：US13285048

申请日：2011-10-31

申请人： Robert D. Edwards ,  Oleg Gluschenkov ,  Louis V. Medina ,  Tso-Hui Ting ,  Ping-Chuan Wang ,  Yongchun Xin

发明人： Robert D. Edwards ,  Oleg Gluschenkov ,  Louis V. Medina ,  Tso-Hui Ting ,  Ping-Chuan Wang ,  Yongchun Xin

IPC分类号： G01R31/20

CPC分类号： G01R31/2891 ,  G01R1/06794 ,  G01R1/07364

摘要： A wafer probing system includes a probe card assembly having a plurality of individual probe structures configured make contact with a semiconductor wafer mounted on a motor driven wafer chuck, with each probe structure configured with a pressure sensing unit integrated therewith; and a controller configured to drive the probe card assembly with one or more piezoelectric driver units response to feedback from the pressure sensing units of the individual probe structures.

公开(公告)号：US08963567B2

公开(公告)日：2015-02-24

申请号：US13285048

申请日：2011-10-31

申请人： Robert D. Edwards ,  Oleg Gluschenkov ,  Louis V. Medina ,  Tso-Hui Ting ,  Ping-Chuan Wang ,  Yongchun Xin

发明人： Robert D. Edwards ,  Oleg Gluschenkov ,  Louis V. Medina ,  Tso-Hui Ting ,  Ping-Chuan Wang ,  Yongchun Xin

IPC分类号： G01R31/20 ,  G01R31/28

CPC分类号： G01R31/2891 ,  G01R1/06794 ,  G01R1/07364

摘要： A wafer probing system includes a probe card assembly having a plurality of individual probe structures configured make contact with a semiconductor wafer mounted on a motor driven wafer chuck, with each probe structure configured with a pressure sensing unit integrated therewith; and a controller configured to drive the probe card assembly with one or more piezoelectric driver units response to feedback from the pressure sensing units of the individual probe structures.

摘要翻译： 晶片探测系统包括探针卡组件，其具有构造成与安装在马达驱动晶片卡盘上的半导体晶片接触的多个单独的探针结构，每个探针结构配置有与其集成的压力感测单元; 以及控制器，被配置为用一个或多个压电驱动器单元来驱动探针卡组件，以响应来自各个探针结构的压力感测单元的反馈。

公开(公告)号：US20120146682A1

公开(公告)日：2012-06-14

申请号：US13397781

申请日：2012-02-16

申请人： Oleg Gluschenkov ,  Muthukumarasamy Karthikeyan ,  Yunsheng Song ,  Tso-Hui Ting ,  Richard P. Volant ,  Ping-Chuan Wang

发明人： Oleg Gluschenkov ,  Muthukumarasamy Karthikeyan ,  Yunsheng Song ,  Tso-Hui Ting ,  Richard P. Volant ,  Ping-Chuan Wang

IPC分类号： G01R31/26 ,  H01L23/58

CPC分类号： G01R1/07378 ,  H01L22/14 ,  H01L22/20 ,  H01L25/50 ,  H01L2225/06596 ,  H01L2924/0002 ,  H01L2924/00

摘要： A set of first substrate and second substrate are manufactured with a built-in N-fold rotational symmetry around the center axis of each substrate, wherein N is an integer greater than 1. A set of N different interposers is provided such that an i-th interposer provides electrical connection between the first substrate and the second substrate with a rotational angle of (i−1)/N×2π. The first and second substrates are tested with each of the N different interposers therebetween. Once the rotational angle that provides the highest stacked chip yield is determined, the first and the second substrates can be bonded with an azimuthal rotation that provides the highest stacked chip yield.

摘要翻译： 一组第一衬底和第二衬底被制造成围绕每个衬底的中心轴线具有内置的N倍旋转对称，其中N是大于1的整数。提供一组N个不同的插入件， （i-1）/ N×2＆pgr的转角提供第一基板和第二基板之间的电连接。 测试第一和第二衬底中的每个N个不同的插入件。 一旦确定了提供最高堆叠芯片产量的旋转角度，则可以以提供最高堆叠芯片产量的方位角旋转来接合第一和第二基板。

公开(公告)号：US20120241977A1

公开(公告)日：2012-09-27

申请号：US13489596

申请日：2012-06-06

申请人： Oleg Gluschenkov ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

发明人： Oleg Gluschenkov ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

IPC分类号： H01L25/00 ,  H01L21/66 ,  H05K13/00 ,  H01L21/60

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L22/20 ,  H01L23/13 ,  H01L23/481 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1403 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06596 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/15311 ,  H05K1/0286 ,  H05K1/142 ,  H05K2201/2018 ,  H05K2203/1572 ,  Y10T29/49117 ,  H01L2924/00

摘要： A modularized interposer includes a plurality of interposer units that are assembled to provide a complete set of electrical connections between two semiconductor chips. At least some of the plurality of interposer units can be replaced with other interposer units having an alternate configuration to enable selection of different functional parts of semiconductor chips to be connected through the modularized interposer. Bonding structures, connected to conductive metal pads located at peripheries of neighboring interposer units and an overlying or underlying portion of a semiconductor chip, can provide electrical connections between the neighboring interposer units. The interposer units can be provided by forming through-substrate vias (TSV's) in a substrate, forming patterned conductive structures on the substrate, and cutting the substrate into interposers.

摘要翻译： 模块化插入器包括多个插入器单元，其被组合以提供两个半导体芯片之间的完整的电连接。 多个插入单元中的至少一些可以被具有替代配置的其它插入单元替代，以便能够通过模块化插入器选择要连接的半导体芯片的不同功能部件。 连接到位于相邻插入单元周围的导电金属焊盘和半导体芯片的上部或下部的结合结构可以在相邻插入单元之间提供电连接。 可以通过在衬底中形成贯穿衬底通孔（TSV）来形成插入器单元，在衬底上形成图案化的导电结构，并将衬底切割成插入层。

公开(公告)号：US20110115082A1

公开(公告)日：2011-05-19

申请号：US12619002

申请日：2009-11-16

申请人： Oleg Gluschenkov ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

发明人： Oleg Gluschenkov ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

IPC分类号： H01L23/48 ,  H01L21/66 ,  H01L21/768

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L22/20 ,  H01L23/13 ,  H01L23/481 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1403 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06596 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/15311 ,  H05K1/0286 ,  H05K1/142 ,  H05K2201/2018 ,  H05K2203/1572 ,  Y10T29/49117 ,  H01L2924/00

摘要： A modularized interposer includes a plurality of interposer units that are assembled to provide a complete set of electrical connections between two semiconductor chips. At least some of the plurality of interposer units can be replaced with other interposer units having an alternate configuration to enable selection of different functional parts of semiconductor chips to be connected through the modularized interposer. Bonding structures, connected to conductive metal pads located at peripheries of neighboring interposer units and an overlying or underlying portion of a semiconductor chip, can provide electrical connections between the neighboring interposer units. The interposer units can be provided by forming through-substrate vias (TSV's) in a substrate, forming patterned conductive structures on the substrate, and cutting the substrate into interposers.

摘要翻译： 模块化插入器包括多个插入器单元，其被组合以提供两个半导体芯片之间的完整的电连接。 多个插入单元中的至少一些可以被具有替代配置的其它插入单元替代，以便能够通过模块化插入器选择要连接的半导体芯片的不同功能部件。 连接到位于相邻插入单元周围的导电金属焊盘和半导体芯片的上部或下部的结合结构可以在相邻插入单元之间提供电连接。 可以通过在衬底中形成贯穿衬底通孔（TSV）来形成插入器单元，在衬底上形成图案化的导电结构，并将衬底切割成插入层。

公开(公告)号：US20110080189A1

公开(公告)日：2011-04-07

申请号：US12574264

申请日：2009-10-06

申请人： Oleg Gluschenkov ,  Muthukumarasamy Karthikeyan ,  Yunsheng Song ,  Tso-Hui Ting ,  Richard P. Volant ,  Ping-Chuan Wang

发明人： Oleg Gluschenkov ,  Muthukumarasamy Karthikeyan ,  Yunsheng Song ,  Tso-Hui Ting ,  Richard P. Volant ,  Ping-Chuan Wang

IPC分类号： G01R31/26 ,  H01L23/00 ,  G01R31/02

CPC分类号： G01R1/07378 ,  H01L22/14 ,  H01L22/20 ,  H01L25/50 ,  H01L2225/06596 ,  H01L2924/0002 ,  H01L2924/00

摘要： A set of first substrate and second substrate are manufactured with a built-in N-fold rotational symmetry around the center axis of each substrate, wherein N is an integer greater than 1. A set of N different interposers is provided such that an i-th interposer provides electrical connection between the first substrate and the second substrate with a rotational angle of (i−1)/N×2π. The first and second substrates are tested with each of the N different interposers therebetween. Once the rotational angle that provides the highest stacked chip yield is determined, the first and the second substrates can be bonded with an azimuthal rotation that provides the highest stacked chip yield.

摘要翻译： 一组第一衬底和第二衬底被制造成围绕每个衬底的中心轴线具有内置的N倍旋转对称，其中N是大于1的整数。提供一组N个不同的插入件， （i-1）/ N×2＆pgr的转角提供第一基板和第二基板之间的电连接。 测试第一和第二衬底中的每个N个不同的插入件。 一旦确定了提供最高堆叠芯片产量的旋转角度，则可以以提供最高堆叠芯片产量的方位角旋转来接合第一和第二基板。

公开(公告)号：US09151781B2

公开(公告)日：2015-10-06

申请号：US13397781

申请日：2012-02-16

申请人： Oleg Gluschenkov ,  Muthukumarasamy Karthikeyan ,  Yunsheng Song ,  Tso-Hui Ting ,  Richard P. Volant ,  Ping-Chuan Wang

发明人： Oleg Gluschenkov ,  Muthukumarasamy Karthikeyan ,  Yunsheng Song ,  Tso-Hui Ting ,  Richard P. Volant ,  Ping-Chuan Wang

IPC分类号： G01R31/26 ,  H01L23/58 ,  G01R1/073 ,  H01L21/66 ,  H01L25/00

CPC分类号： G01R1/07378 ,  H01L22/14 ,  H01L22/20 ,  H01L25/50 ,  H01L2225/06596 ,  H01L2924/0002 ,  H01L2924/00

摘要： A set of first substrate and second substrate are manufactured with a built-in N-fold rotational symmetry around the center axis of each substrate, wherein N is an integer greater than 1. A set of N different interposers is provided such that an i-th interposer provides electrical connection between the first substrate and the second substrate with a rotational angle of (i−1)/N×2π. The first and second substrates are tested with each of the N different interposers therebetween. Once the rotational angle that provides the highest stacked chip yield is determined, the first and the second substrates can be bonded with an azimuthal rotation that provides the highest stacked chip yield.

摘要翻译： 一组第一衬底和第二衬底被制造成围绕每个衬底的中心轴线具有内置的N倍旋转对称，其中N是大于1的整数。提供一组N个不同的插入件， （i-1）/ N×2＆pgr的转角提供第一基板和第二基板之间的电连接。 测试第一和第二衬底中的每个N个不同的插入件。 一旦确定了提供最高堆叠芯片产量的旋转角度，则可以以提供最高堆叠芯片产量的方位角旋转来接合第一和第二基板。

公开(公告)号：US08759152B2

公开(公告)日：2014-06-24

申请号：US13489596

申请日：2012-06-06

申请人： Oleg Gluschenkov ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

发明人： Oleg Gluschenkov ,  Yunsheng Song ,  Tso-Hui Ting ,  Ping-Chuan Wang

IPC分类号： H01L21/00

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L22/20 ,  H01L23/13 ,  H01L23/481 ,  H01L24/16 ,  H01L24/17 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1403 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06596 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/15311 ,  H05K1/0286 ,  H05K1/142 ,  H05K2201/2018 ,  H05K2203/1572 ,  Y10T29/49117 ,  H01L2924/00

摘要： A modularized interposer includes a plurality of interposer units that are assembled to provide a complete set of electrical connections between two semiconductor chips. At least some of the plurality of interposer units can be replaced with other interposer units having an alternate configuration to enable selection of different functional parts of semiconductor chips to be connected through the modularized interposer. Bonding structures, connected to conductive metal pads located at peripheries of neighboring interposer units and an overlying or underlying portion of a semiconductor chip, can provide electrical connections between the neighboring interposer units. The interposer units can be provided by forming through-substrate vias (TSV's) in a substrate, forming patterned conductive structures on the substrate, and cutting the substrate into interposers.

摘要翻译： 模块化插入器包括多个插入器单元，其被组合以提供两个半导体芯片之间的完整的电连接。 多个插入单元中的至少一些可以被具有替代配置的其它插入单元替代，以便能够通过模块化插入器选择要连接的半导体芯片的不同功能部件。 连接到位于相邻插入单元周围的导电金属焊盘和半导体芯片的上部或下部的结合结构可以在相邻插入单元之间提供电连接。 可以通过在衬底中形成贯穿衬底通孔（TSV）来形成插入器单元，在衬底上形成图案化的导电结构，并将衬底切割成插入层。