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    Fabrication process of a semiconductor integrated circuit device
    1.
    发明授权
    Fabrication process of a semiconductor integrated circuit device 有权
    半导体集成电路器件的制造工艺

    公开(公告)号：US07122469B2

    公开(公告)日：2006-10-17

    申请号：US11196293

    申请日：2005-08-04

    申请人： Yoshikazu Tanabe ,  Isamu Asano ,  Makoto Yoshida ,  Naoki Yamamoto ,  Masayoshi Saito ,  Nobuyoshi Natsuaki

    发明人： Yoshikazu Tanabe ,  Isamu Asano ,  Makoto Yoshida ,  Naoki Yamamoto ,  Masayoshi Saito ,  Nobuyoshi Natsuaki

    IPC分类号： H01L21/44 ,  H01L21/31

    CPC分类号： H01L21/28247 ,  H01L21/28061 ,  H01L21/28176 ,  H01L21/32105 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823828 ,  H01L21/823857 ,  H01L27/1052 ,  H01L27/10873 ,  H01L27/10894 ,  H01L29/4941

    摘要： With a view to preventing the oxidation of a metal film at the time of light oxidation treatment after gate patterning and at the same time to making it possible to control the reproducibility of oxide film formation and homogeneity of oxide film thickness at gate side-wall end portions, in a gate processing step using a poly-metal, a gate electrode is formed by patterning a gate electrode material which has been deposited over a semiconductor wafer 1A having a gate oxide film formed thereon and has a poly-metal structure and then, the principal surface of the semiconductor wafer 1A heated to a predetermined temperature or vicinity thereof is supplied with a hydrogen gas which contains water at a low concentration, the water having been formed from hydrogen and oxygen by a catalytic action, to selectively oxidize the principal surface of the semiconductor wafer 1A, whereby the profile of the side-wall end portions of the gate electrode is improved

    摘要翻译： 为了防止栅极图案化后的光氧化处理时的金属膜的氧化，同时能够控制氧化膜形成的再现性和栅侧壁端的氧化膜厚度的均匀性 在使用多金属的栅极处理步骤中，通过对已在其上形成有栅极氧化膜的半导体晶片1A上淀积的具有多金属结构的栅电极材料进行构图来形成栅电极， 向被加热到预定温度或附近的半导体晶片1A的主表面供给含有低浓度的水的氢气，由氢和氧通过催化作用形成的水，以选择性地氧化 半导体晶片1A的主表面，从而提高了栅电极的侧壁端部的轮廓

    Fabrication process of a semiconductor integrated circuit device
    4.
    发明授权
    Fabrication process of a semiconductor integrated circuit device 有权
    半导体集成电路器件的制造工艺

    公开(公告)号：US06987069B2

    公开(公告)日：2006-01-17

    申请号：US10821842

    申请日：2004-04-12

    申请人： Yoshikazu Tanabe ,  Isamu Asano ,  Makoto Yoshida ,  Naoki Yamamoto ,  Masayoshi Saito ,  Nobuyoshi Natsuaki

    发明人： Yoshikazu Tanabe ,  Isamu Asano ,  Makoto Yoshida ,  Naoki Yamamoto ,  Masayoshi Saito ,  Nobuyoshi Natsuaki

    IPC分类号： H01L21/31

    CPC分类号： H01L21/28247 ,  H01L21/28061 ,  H01L21/28176 ,  H01L21/32105 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823828 ,  H01L21/823857 ,  H01L27/1052 ,  H01L27/10873 ,  H01L27/10894 ,  H01L29/4941

    摘要： With a view to preventing the oxidation of a metal film at the time of light oxidation treatment after gate patterning and at the same time to making it possible to control the reproducibility of oxide film formation and homogeneity of oxide film thickness at gate side-wall end portions, in a gate processing step using a poly-metal, a gate electrode is formed by patterning a gate electrode material which has been deposited over a semiconductor wafer 1A having a gate oxide film formed thereon and has a poly-metal structure and then, the principal surface of the semiconductor wafer 1A heated to a predetermined temperature or vicinity thereof is supplied with a hydrogen gas which contains water at a low concentration, the water having been formed from hydrogen and oxygen by a catalytic action, to selectively oxidize the principal surface of the semiconductor wafer 1A, whereby the profile of the side-wall end portions of the gate electrode is improved.

    摘要翻译： 为了防止栅极图案化后的光氧化处理时的金属膜的氧化，同时能够控制氧化膜形成的再现性和栅侧壁端的氧化膜厚度的均匀性 在使用多金属的栅极处理步骤中，通过对已在其上形成有栅极氧化膜的半导体晶片1A上淀积的具有多金属结构的栅电极材料进行构图来形成栅电极， 向被加热到预定温度或附近的半导体晶片1A的主表面供给含有低浓度的水的氢气，由氢和氧通过催化作用形成的水，以选择性地氧化 半导体晶片1A的主表面，从而提高了栅电极的侧壁端部的轮廓。

    Fabrication process of a semiconductor integrated circuit device
    7.
    发明授权
    Fabrication process of a semiconductor integrated circuit device 失效
    半导体集成电路器件的制造工艺

    公开(公告)号：US06197702B1

    公开(公告)日：2001-03-06

    申请号：US09086568

    申请日：1998-05-29

    申请人： Yoshikazu Tanabe ,  Isamu Asano ,  Makoto Yoshida ,  Naoki Yamamoto ,  Masayoshi Saito ,  Nobuyoshi Natsuaki

    发明人： Yoshikazu Tanabe ,  Isamu Asano ,  Makoto Yoshida ,  Naoki Yamamoto ,  Masayoshi Saito ,  Nobuyoshi Natsuaki

    IPC分类号： H01L2131

    CPC分类号： H01L21/28247 ,  H01L21/28061 ,  H01L21/28176 ,  H01L21/32105 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823828 ,  H01L21/823857 ,  H01L27/1052 ,  H01L27/10873 ,  H01L27/10894 ,  H01L29/4941

    摘要： With a view to preventing the oxidation of a metal film at the time of light oxidation treatment after gate patterning and at the same time to making it possible to control the reproducibility of oxide film formation and homogeneity of oxide film thickness at gate side-wall end portions, in a gate processing step using a poly-metal, a gate electrode is formed by patterning a gate electrode material which has been deposited over a semiconductor wafer 1A having a gate oxide film formed thereon and has a poly-metal structure and then, the principal surface of the semiconductor wafer 1A heated to a predetermined temperature or vicinity thereof is supplied with a hydrogen gas which contains water at a low concentration, the water having been formed from hydrogen and oxygen by a catalytic action, to selectively oxidize the principal surface of the semiconductor wafer 1A, whereby the profile of the side-wall end portions of the gate electrode is improved.

    摘要翻译： 为了在栅极图案化之后防止光氧化处理时的金属膜的氧化，同时可以控制氧化膜形成的再现性和栅极侧壁端的氧化膜厚度的均匀性 在使用多金属的栅极处理步骤中，通过图案化已经沉积在其上形成有栅极氧化膜的半导体晶片1A上并具有多金属结构的栅电极材料来形成栅电极， 加热到预定温度或其附近的半导体晶片1A的主表面被供给含有低浓度的水的氢气，通过催化作用由氢和氧形成的水，以选择性地氧化主表面 从而提高了栅电极的侧壁端部的形状。