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公开(公告)号：US20120024317A1
公开(公告)日：2012-02-02
申请号：US13191739
申请日：2011-07-27
CPC分类号： H01L21/67046 , B24B53/017 , H01L21/02057 , H01L21/0209
摘要： According to one embodiment, a cleaning apparatus includes a removing unit whose tip portion is harder than a constituent material of a surface layer on a back surface side of a semiconductor wafer (wafer) and which is configured to clean a back surface of the wafer held by a holding unit and a moving mechanism that relatively moves the removing unit and the wafer in a direction parallel to the wafer back surface. The removing unit grinds and removes a protrusion that is formed of a material same as the surface layer of the wafer back surface, by the moving mechanism relatively moving the removing unit and the wafer and causing the tip portion of the removing unit to come into contact with the protrusion.
摘要翻译： 根据一个实施例，一种清洁装置包括一个去除单元，其顶端部分比半导体晶片（晶片）的背面侧的表面层的构成材料硬，并且被构造成清洁晶片保持的背面 通过保持单元和移动机构使得移动单元和晶片沿平行于晶片背面的方向相对移动。 移动单元通过使移除单元和晶片相对移动并使去除单元的末端部分接触的移动机构研磨并除去由与晶片背面的表面层相同的材料形成的突起 与突起。
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公开(公告)号：US20110230054A1
公开(公告)日：2011-09-22
申请号：US12841217
申请日：2010-07-22
IPC分类号： H01L21/3205 , B08B3/08 , B08B3/12
CPC分类号： H01L21/02052 , H01L21/02057
摘要： In one embodiment, a semiconductor substrate cleaning method is disclosed. The method can clean a semiconductor substrate by using a chemical of 80° C. or above. The method can rinse the semiconductor substrate by using pure water of 40° C. or above after the cleaning of the semiconductor substrate. The method can then rinse the semiconductor substrate by using pure water of 30° C. or below. In addition, the method can dry the semiconductor substrate.
摘要翻译： 在一个实施例中，公开了半导体衬底清洗方法。 该方法可以使用80℃以上的化学物质来清洗半导体衬底。 该方法可以在清洁半导体衬底之后使用40℃以上的纯水冲洗半导体衬底。 然后，该方法可以通过使用30℃或更低的纯水冲洗半导体衬底。 此外，该方法可以干燥半导体衬底。
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公开(公告)号：US20110061684A1
公开(公告)日：2011-03-17
申请号：US12878382
申请日：2010-09-09
IPC分类号： B08B7/00
CPC分类号： H01L21/67051 , H01L21/02052
摘要： A cleaning method for a semiconductor wafer with cleaning liquid comprising: cleaning the semiconductor wafer while the temperature of the surface of the semiconductor wafer is from 30 degrees to 50 degrees, the cleaning liquid has lower surface tension and viscosity than water.
摘要翻译： 一种具有清洗液的半导体晶片的清洗方法，包括：在半导体晶片的表面的温度为30度至50度的范围内清洗半导体晶片，该清洗液具有比水低的表面张力和粘度。
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4.发明申请CLEANING APPARATUS FOR SEMICONDUCTOR WAFER AND CLEANING METHOD FOR SEMICONDUCTOR WAFER 有权半导体滤波器的清洗装置和半导体滤波器的清洁方法公开(公告)号：US20090255558A1
公开(公告)日：2009-10-15
申请号：US12412638
申请日：2009-03-27
申请人： Minako Inukai , Hiroshi Tomita , Kaori Umezawa , Yasuhito Yoshimizu , Linan Ji
发明人： Minako Inukai , Hiroshi Tomita , Kaori Umezawa , Yasuhito Yoshimizu , Linan Ji
IPC分类号： B08B3/00
CPC分类号： H01L21/02052 , H01L21/67051
摘要： A cleaning apparatus for a semiconductor wafer includes: a gas jet device including a gas nozzle which jets a first gas onto the surface of a semiconductor wafer to thin the thickness of a stagnant layer on the surface of the semiconductor wafer; and a two-fluid jet device including a two-fluid nozzle which jets droplet mist onto a region where thickness of the stagnant layer of the semiconductor wafer is thinned, the droplet mist being mixed two-fluid of a liquid and a second gas.
摘要翻译： 一种用于半导体晶片的清洁装置包括：气体喷射装置，其包括将第一气体喷射到半导体晶片的表面上的气体喷嘴，以使半导体晶片的表面上的停滞层的厚度减薄; 以及双液体喷射装置，其包括将液滴雾喷射到半导体晶片的停滞层的厚度变薄的区域上的双流体喷嘴，所述液滴雾混合液体的二液体和第二气体。
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公开(公告)号：US20070054482A1
公开(公告)日：2007-03-08
申请号：US11501109
申请日：2006-08-09
申请人： Takahito Nakajima , Yoshihiro Uozumi , Mikie Miyasato , Tsuyoshi Matsumura , Yasuhito Yoshimizu , Hiroshi Tomita , Hiroki Sakurai
发明人： Takahito Nakajima , Yoshihiro Uozumi , Mikie Miyasato , Tsuyoshi Matsumura , Yasuhito Yoshimizu , Hiroshi Tomita , Hiroki Sakurai
IPC分类号： H01L21/44
CPC分类号： H01L21/76877 , H01L21/02063 , H01L21/02071 , H01L21/02074 , H01L21/32051 , H01L21/32134 , H01L21/76814
摘要： According to one aspect of the invention, there is provided a semiconductor device fabrication method having: forming a film on a semiconductor substrate; forming a mask comprising a predetermined pattern on the film; etching one of the film and the semiconductor substrate by using the mask; and performing at least one of the steps of performing a treatment using one of an aqueous solution of at least one of ammonia and amine, the amine being selected from primary amine, secondary amine, tertiary amine, and quaternary amine, a treatment using a liquid chemical containing fluorine and at least one of amine, the amine being selected from primary amine, secondary amine, tertiary amine, and quaternary amine and fluorine, and a treatment using a liquid chemical containing at least ammonia and fluorine and including a pH of not less than 6, particularly, not less than 9.
摘要翻译： 根据本发明的一个方面，提供了一种半导体器件制造方法，其具有：在半导体衬底上形成膜; 在所述膜上形成包含预定图案的掩模; 通过使用掩模蚀刻膜和半导体衬底之一; 并且执行使用氨和胺中的至少一种的水溶液中的一种进行处理的步骤中的至少一个，所述胺选自伯胺，仲胺，叔胺和季胺，使用液体 含有氟的化合物和胺中的至少一种，胺选自伯胺，仲胺，叔胺和季胺和氟，以及使用至少含有氨和氟的液体化学品的处理，并且包括不低于 超过6，特别是不小于9。
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公开(公告)号：US08772164B2
公开(公告)日：2014-07-08
申请号：US13526216
申请日：2012-06-18
IPC分类号： H01L21/44
CPC分类号： C23C18/1608 , C23C18/1893 , C23C18/32 , H01L21/4846 , H01L21/76874 , H01L21/76879 , H01L21/76885 , H01L28/91
摘要： According to one embodiment, a method for forming an interconnection pattern includes forming an insulating pattern, forming a self-assembled film, and forming a conductive layer. The insulating pattern has a side surface on a major surface of a matrix. The self-assembled film has an affinity with a material of the insulating pattern on the side surface of the insulating pattern. The forming the conductive layer includes depositing a conductive material on a side surface of the self-assembled film.
摘要翻译： 根据一个实施例，用于形成互连图案的方法包括形成绝缘图案，形成自组装膜并形成导电层。 绝缘图案在矩阵的主表面上具有侧表面。 自组装膜与绝缘图案的侧面上的绝缘图案的材料具有亲和性。 形成导电层包括在自组装膜的侧表面上沉积导电材料。
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公开(公告)号：US20120104340A1
公开(公告)日：2012-05-03
申请号：US13344680
申请日：2012-01-06
IPC分类号： H01L45/00
CPC分类号： H01L27/11578 , H01L27/11582 , H01L27/2409 , H01L27/2481 , H01L29/792 , H01L29/7926 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148
摘要： A nonvolatile memory device includes: a substrate; a stacked structure member including a plurality of dielectric films and a plurality of electrode films alternately stacked on the substrate and including a through-hole penetrating through the plurality of the dielectric films and the plurality of the electrode films in a stacking direction of the plurality of the dielectric films and the plurality of the electrode films; a semiconductor pillar provided in the through-hole; and a charge storage layer provided between the semiconductor pillar and each of the plurality of the electrode films. At least one of the dielectric films includes a film generating one of a compressive stress and a tensile stress, and at least one of the electrode films includes a film generating the other of the compressive stress and the tensile stress.
摘要翻译： 非易失性存储器件包括：衬底; 包括多个电介质膜和交替层叠在所述基板上的多个电极膜的堆叠结构构件，并且包括贯穿所述多个电介质膜的多个电极膜和所述多个所述电极膜的多个 电介质膜和多个电极膜; 设置在所述通孔中的半导体柱; 以及设置在所述半导体柱与所述多个所述电极膜中的每一个之间的电荷存储层。 电介质膜中的至少一个包括产生压缩应力和拉伸应力之一的膜，并且至少一个电极膜包括产生另一个压缩应力和拉伸应力的膜。
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公开(公告)号：US08115245B2
公开(公告)日：2012-02-14
申请号：US12554581
申请日：2009-09-04
IPC分类号： H01L29/788
CPC分类号： H01L27/11578 , H01L27/11582 , H01L27/2409 , H01L27/2481 , H01L29/792 , H01L29/7926 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148
摘要： A nonvolatile memory device includes: a substrate; a stacked structure member including a plurality of dielectric films and a plurality of electrode films alternately stacked on the substrate and including a through-hole penetrating through the plurality of the dielectric films and the plurality of the electrode films in a stacking direction of the plurality of the dielectric films and the plurality of the electrode films; a semiconductor pillar provided in the through-hole; and a charge storage layer provided between the semiconductor pillar and each of the plurality of the electrode films. At least one of the dielectric films includes a film generating one of a compressive stress and a tensile stress, and at least one of the electrode films includes a film generating the other of the compressive stress and the tensile stress.
摘要翻译： 非易失性存储器件包括：衬底; 包括多个电介质膜和交替层叠在所述基板上的多个电极膜的堆叠结构件，并且包括穿过所述多个电介质膜的多个电极膜和所述多个电极膜沿所述多个电极膜的堆叠方向 电介质膜和多个电极膜; 设置在所述通孔中的半导体柱; 以及设置在所述半导体柱与所述多个所述电极膜中的每一个之间的电荷存储层。 电介质膜中的至少一个包括产生压缩应力和拉伸应力之一的膜，并且至少一个电极膜包括产生另一个压缩应力和拉伸应力的膜。
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公开(公告)号：US20100078622A1
公开(公告)日：2010-04-01
申请号：US12554581
申请日：2009-09-04
IPC分类号： H01L27/115 , H01L45/00 , H01L21/8247
CPC分类号： H01L27/11578 , H01L27/11582 , H01L27/2409 , H01L27/2481 , H01L29/792 , H01L29/7926 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148
摘要： A nonvolatile memory device includes: a substrate; a stacked structure member including a plurality of dielectric films and a plurality of electrode films alternately stacked on the substrate and including a through-hole penetrating through the plurality of the dielectric films and the plurality of the electrode films in a stacking direction of the plurality of the dielectric films and the plurality of the electrode films; a semiconductor pillar provided in the through-hole; and a charge storage layer provided between the semiconductor pillar and each of the plurality of the electrode films. At least one of the dielectric films includes a film generating one of a compressive stress and a tensile stress, and at least one of the electrode films includes a film generating the other of the compressive stress and the tensile stress.
摘要翻译： 非易失性存储器件包括：衬底; 包括多个电介质膜和交替层叠在所述基板上的多个电极膜的堆叠结构构件，并且包括贯穿所述多个电介质膜的多个电极膜和所述多个所述电极膜的多个 电介质膜和多个电极膜; 设置在所述通孔中的半导体柱; 以及设置在所述半导体柱与所述多个所述电极膜中的每一个之间的电荷存储层。 电介质膜中的至少一个包括产生压缩应力和拉伸应力之一的膜，并且至少一个电极膜包括产生另一个压缩应力和拉伸应力的膜。
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公开(公告)号：US20090286391A1
公开(公告)日：2009-11-19
申请号：US12509597
申请日：2009-07-27
申请人： Takahito Nakajima , Yoshihiro Uozumi , Mikie Miyasato , Tsuyoshi Matsumura , Yasuhito Yoshimizu , Hiroshi Tomita , Hiroki Sakurai
发明人： Takahito Nakajima , Yoshihiro Uozumi , Mikie Miyasato , Tsuyoshi Matsumura , Yasuhito Yoshimizu , Hiroshi Tomita , Hiroki Sakurai
IPC分类号： H01L21/768 , H01L21/308 , H01L21/3205
CPC分类号： H01L21/76877 , H01L21/02063 , H01L21/02071 , H01L21/02074 , H01L21/32051 , H01L21/32134 , H01L21/76814
摘要： According to one aspect of the invention, there is provided a qsemiconductor device fabrication method having:forming a film on a semiconductor substrate;forming a mask comprising a predetermined pattern on the film;etching one of the film and the semiconductor substrate by using the mask; andperforming at least one of the steps of performing a treatment using one of an aqueous solution of at least one of ammonia and amine, the amine being selected from primary amine, secondary amine, tertiary amine, and quaternary amine, a treatment using a liquid chemical containing fluorine and at least one of amine, the amine being selected from primary amine, secondary amine, tertiary amine, and quaternary amine and fluorine, and a treatment using a liquid chemical containing at least ammonia and fluorine and including a pH of not less than 6, particularly, not less than 9.
摘要翻译： 根据本发明的一个方面，提供了一种半导体器件制造方法，其具有：在半导体衬底上形成膜; 在所述膜上形成包含预定图案的掩模; 通过使用掩模蚀刻膜和半导体衬底之一; 并且执行使用氨和胺中的至少一种的水溶液中的一种进行处理的步骤中的至少一个，所述胺选自伯胺，仲胺，叔胺和季胺，使用液体 含有氟的化合物和胺中的至少一种，胺选自伯胺，仲胺，叔胺和季胺和氟，以及使用至少含有氨和氟的液体化学品的处理，并且包括不低于 超过6，特别是不小于9。
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