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公开(公告)号：US20090166749A1
公开(公告)日：2009-07-02
申请号：US12233055
申请日：2008-09-18
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823835 , H01L21/823842
摘要： A semiconductor device includes n- and p-type semiconductor regions separately formed on a substrate, an interlayer insulator formed on the substrate and having first and second trenches formed to reach the n- and p-type regions. There are further included first and second gate insulators formed inside of the first and second trenches, a first metal layer formed inside of the first trench via the first gate insulator, a second metal layer formed in a thickness of 1 monolayer or more and 1.5 nm or less inside of the second trench via the second gate insulator, a third metal layer formed on the second metal layer and containing at least one of a simple substance, a nitride, a carbide and an oxide of at least one metal element of alkaline earth metal elements and group III elements, first and second source/drain regions formed on the n- and p-type regions.
摘要翻译： 半导体器件包括分别形成在衬底上的n型和p型半导体区，形成在衬底上的层间绝缘体，并且具有形成为达到n型和p型区的第一和第二沟槽。 还包括形成在第一和第二沟槽内的第一和第二栅极绝缘体，经由第一栅极绝缘体形成在第一沟槽内部的第一金属层，形成为厚度为1单层或更多和1.5nm的第二金属层 或更少的内部经由所述第二栅极绝缘体，形成在所述第二金属层上并且包含至少一种碱土金属元素的单质，氮化物，碳化物和氧化物中的至少一种的第三金属层 金属元素和III族元素，形成在n型和p型区上的第一和第二源/漏区。
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公开(公告)号：US07768077B2
公开(公告)日：2010-08-03
申请号：US12631891
申请日：2009-12-07
IPC分类号： H01L27/092
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28097 , H01L21/823835 , H01L21/823857 , H01L27/092 , H01L29/495 , H01L29/4975 , H01L29/517 , H01L29/665
摘要： A semiconductor device includes: an n-channel MIS transistor and a p-channel MIS transistor. An n-channel MIS transistor includes: a first gate insulating film having an amorphous layer or an epitaxial layer formed on a p-type semiconductor region between a first source/drain regions; and a first gate electrode having a stack structure formed with a first metal layer and a first compound layer. The first metal layer is formed on the first gate insulating film and made of a first metal having a work function of 4.3 eV or smaller, and the first compound layer is formed on the first metal layer and contains a compound of a second metal and a IV-group semiconductor. The second metal is different from the first metal. A p-channel MIS transistor includes a second gate electrode having a second compound layer containing a compound of the same composition as the first compound layer.
摘要翻译： 半导体器件包括：n沟道MIS晶体管和p沟道MIS晶体管。 n沟道MIS晶体管包括：具有在第一源极/漏极区之间的p型半导体区域上形成的非晶层或外延层的第一栅极绝缘膜; 以及具有形成有第一金属层和第一化合物层的堆叠结构的第一栅电极。 第一金属层形成在第一栅极绝缘膜上，由功函数为4.3eV以下的第一金属构成，第一金属层形成在第一金属层上，并且含有第二金属和 IV族半导体。 第二种金属与第一种金属不同。 P沟道MIS晶体管包括具有第二化合物层的第二栅电极，第二化合物层含有与第一化合物层相同组成的化合物。
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公开(公告)号：US07416967B2
公开(公告)日：2008-08-26
申请号：US11526637
申请日：2006-09-26
IPC分类号： H01L21/3205
CPC分类号： H01L21/823835 , H01L27/1203 , H01L29/785
摘要： According to an aspect of the invention, a semiconductor device comprises: a N-channel MIS transistor comprising; a p-type semiconductor layer; a first gate insulation layer formed on the p-type semiconductor layer; a first gate electrode formed on the first gate insulation layer; and a first source-drain region formed in the p-type semiconductor layer where the first gate electrode is sandwiched along a direction of gate length. The first gate electrode comprises a crystal phase including a cubic crystal of NiSi2 which has a lattice constant of 5.39 angstroms to 5.40 angstroms.
摘要翻译： 根据本发明的一个方面，半导体器件包括：N沟道MIS晶体管，包括： p型半导体层; 形成在p型半导体层上的第一栅绝缘层; 形成在所述第一栅极绝缘层上的第一栅电极; 以及形成在p型半导体层中的第一源极 - 漏极区，其中第一栅极沿着栅极长度的方向被夹持。 第一栅电极包括晶体相，其包括具有5.39埃至5.40埃的晶格常数的NiSi 2 N 3的立方晶体。
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公开(公告)号：US08169040B2
公开(公告)日：2012-05-01
申请号：US12824266
申请日：2010-06-28
IPC分类号： H01L21/70
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28097 , H01L21/823835 , H01L21/823857 , H01L27/092 , H01L29/495 , H01L29/4975 , H01L29/517 , H01L29/665
摘要： A semiconductor device includes: an n-channel MIS transistor and a p-channel MIS transistor. An n-channel MIS transistor includes: a first gate insulating film having an amorphous layer or an epitaxial layer formed on a p-type semiconductor region between a first source/drain regions; and a first gate electrode having a stack structure formed with a first metal layer and a first compound layer. The first metal layer is formed on the first gate insulating film and made of a first metal having a work function of 4.3 eV or smaller, and the first compound layer is formed on the first metal layer and contains a compound of a second metal and a IV-group semiconductor. The second metal is different from the first metal. A p-channel MIS transistor includes a second gate electrode having a second compound layer containing a compound of the same composition as the first compound layer.
摘要翻译： 半导体器件包括：n沟道MIS晶体管和p沟道MIS晶体管。 n沟道MIS晶体管包括：具有在第一源极/漏极区之间的p型半导体区域上形成的非晶层或外延层的第一栅极绝缘膜; 以及具有形成有第一金属层和第一化合物层的堆叠结构的第一栅电极。 第一金属层形成在第一栅极绝缘膜上，由功函数为4.3eV以下的第一金属构成，第一金属层形成在第一金属层上，并且含有第二金属和 IV族半导体。 第二种金属与第一种金属不同。 P沟道MIS晶体管包括具有第二化合物层的第二栅电极，第二化合物层含有与第一化合物层相同组成的化合物。
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公开(公告)号：US08129792B2
公开(公告)日：2012-03-06
申请号：US12233055
申请日：2008-09-18
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823835 , H01L21/823842
摘要： A semiconductor device includes n- and p-type semiconductor regions separately formed on a substrate, an interlayer insulator formed on the substrate and having first and second trenches formed to reach the n- and p-type regions. There are further included first and second gate insulators formed inside of the first and second trenches, a first metal layer formed inside of the first trench via the first gate insulator, a second metal layer formed in a thickness of 1 monolayer or more and 1.5 nm or less inside of the second trench via the second gate insulator, a third metal layer formed on the second metal layer and containing at least one of a simple substance, a nitride, a carbide and an oxide of at least one metal element of alkaline earth metal elements and group III elements, first and second source/drain regions formed on the n- and p-type regions.
摘要翻译： 半导体器件包括分别形成在衬底上的n型和p型半导体区，形成在衬底上的层间绝缘体，并且具有形成为达到n型和p型区的第一和第二沟槽。 还包括形成在第一和第二沟槽内的第一和第二栅极绝缘体，经由第一栅极绝缘体形成在第一沟槽内部的第一金属层，形成为厚度为1单层或更多和1.5nm的第二金属层 或更少的内部经由所述第二栅极绝缘体，形成在所述第二金属层上并且包含至少一种碱土金属元素的单质，氮化物，碳化物和氧化物中的至少一种的第三金属层 金属元素和III族元素，形成在n型和p型区上的第一和第二源/漏区。
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公开(公告)号：US07737503B2
公开(公告)日：2010-06-15
申请号：US11687834
申请日：2007-03-19
IPC分类号： H01L29/49
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28097 , H01L21/823835 , H01L21/823857 , H01L27/092 , H01L29/495 , H01L29/4975 , H01L29/517 , H01L29/665
摘要： A semiconductor device includes: an n-channel MIS transistor and a p-channel MIS transistor. An n-channel MIS transistor includes: a first gate insulating film having an amorphous layer or an epitaxial layer formed on a p-type semiconductor region between a first source/drain regions; and a first gate electrode having a stack structure formed with a first metal layer and a first compound layer. The first metal layer is formed on the first gate insulating film and made of a first metal having a work function of 4.3 eV or smaller, and the first compound layer is formed on the first metal layer and contains a compound of a second metal and a IV-group semiconductor. The second metal is different from the first metal. A p-channel MIS transistor includes a second gate electrode having a second compound layer containing a compound of the same composition as the first compound layer.
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公开(公告)号：US20070210351A1
公开(公告)日：2007-09-13
申请号：US11526637
申请日：2006-09-26
IPC分类号： H01L29/76
CPC分类号： H01L21/823835 , H01L27/1203 , H01L29/785
摘要： According to an aspect of the invention, a semiconductor device comprises: a N-channel MIS transistor comprising; a p-type semiconductor layer; a first gate insulation layer formed on the p-type semiconductor layer; a first gate electrode formed on the first gate insulation layer; and a first source-drain region formed in the p-type semiconductor layer where the first gate electrode is sandwiched along a direction of gate length. The first gate electrode comprises a crystal phase including a cubic crystal of NiSi2 which has a lattice constant of 5.39 angstroms to 5.40 angstroms.
摘要翻译： 根据本发明的一个方面，半导体器件包括：N沟道MIS晶体管，包括： p型半导体层; 形成在p型半导体层上的第一栅绝缘层; 形成在所述第一栅极绝缘层上的第一栅电极; 以及形成在p型半导体层中的第一源极 - 漏极区，其中第一栅极沿着栅极长度的方向被夹持。 第一栅电极包括晶体相，其包括具有5.39埃至5.40埃的晶格常数的NiSi 2 N 3的立方晶体。
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公开(公告)号：US20090032884A1
公开(公告)日：2009-02-05
申请号：US12219571
申请日：2008-07-24
IPC分类号： H01L27/092 , H01L29/78
CPC分类号： H01L21/823835 , H01L27/1203 , H01L29/785
摘要： According to an aspect of the invention, a semiconductor device comprises: a N-channel MIS transistor comprising; a p-type semiconductor layer; a first gate insulation layer formed on the p-type semiconductor layer; a first gate electrode formed on the first gate insulation layer; and a first source-drain region formed in the p-type semiconductor layer where the first gate electrode is sandwiched along a direction of gate length. The first gate electrode comprises a crystal phase including a cubic crystal of NiSi2 which has a lattice constant of 5.39 angstroms to 5.40 angstroms.
摘要翻译： 根据本发明的一个方面，半导体器件包括：N沟道MIS晶体管，包括： p型半导体层; 形成在p型半导体层上的第一栅绝缘层; 形成在所述第一栅极绝缘层上的第一栅电极; 以及形成在p型半导体层中的第一源极 - 漏极区，其中第一栅极沿着栅极长度的方向被夹持。 第一栅电极包括晶体相，其包括具有5.39埃至5.40埃的晶格常数的NiSi 2的立方晶体。
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公开(公告)号：US20070057335A1
公开(公告)日：2007-03-15
申请号：US11377438
申请日：2006-03-17
IPC分类号： H01L29/94
CPC分类号： H01L21/823857 , H01L21/28097 , H01L21/823835 , H01L21/823842 , H01L29/49 , H01L29/4975 , H01L29/665 , H01L29/785
摘要： It is made possible to control the effective work function of the gate electrode so that the transistor can have an optimum operating threshold voltage. A semiconductor device includes: a semiconductor substrate; a gate insulating film provided on the semiconductor substrate; a gate electrode provided on the gate insulating film; source/drain regions provided in the semiconductor substrate on both sides of the gate electrode; and a layer which is provided at an interface between the gate electrode and the gate insulating film, and contains an element having an electronegativity different from those of elements constituting the gate electrode and the gate insulating film.
摘要翻译： 可以控制栅电极的有效功函数，使得晶体管能够具有最佳的工作阈值电压。 半导体器件包括：半导体衬底; 设置在所述半导体基板上的栅极绝缘膜; 设置在所述栅极绝缘膜上的栅电极; 源极/漏极区域设置在栅电极两侧的半导体衬底中; 以及设置在栅极电极和栅极绝缘膜之间的界面处的层，并且包含与构成栅极电极和栅极绝缘膜的元件的电负性不同的元件。
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公开(公告)号：US08053300B2
公开(公告)日：2011-11-08
申请号：US11841817
申请日：2007-08-20
IPC分类号： H01L21/8238
CPC分类号： H01L21/823857 , H01L21/823462
摘要： A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode formed on the first dielectric and formed of one metal element selected from Ti, Zr, Hf, Ta, Sc, Y, a lanthanoide and actinide series and of one selected from boride, silicide and germanide compounds of the one metal element, and a pMISFET formed on the substrate, the pMISFET including a second dielectric formed on the substrate and a second metal gate electrode formed on the second dielectric and made of the same material as that of the first metal gate electrode, at least a portion of the second dielectric facing the second metal gate electrode being made of an insulating material different from that of at least a portion of the first dielectric facing the first metal gate electrode.
摘要翻译： 半导体器件包括半导体衬底，形成在衬底上的nMISFET，nMISFET包括形成在衬底上的第一电介质和形成在第一电介质上的第一金属栅极，并由选自Ti，Zr，Hf， Ta，Sc，Y，镧系元素和锕系和选自所述一种金属元素的硼化物，硅化物和锗化合物的一种，以及形成在所述衬底上的pMISFET，所述pMISFET包括形成在所述衬底上的第二电介质和第二金属 栅电极形成在第二电介质上并由与第一金属栅电极相同的材料制成，第二电介质面向第二金属栅电极的至少一部分由绝缘材料制成，绝缘材料与至少一部分 的第一电介质面向第一金属栅电极。
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