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公开(公告)号:US07154804B2
公开(公告)日:2006-12-26
申请号:US11377348
申请日:2006-03-17
申请人: Yoshio Takazawa , Toshio Yamada , Shinichi Ozawa , Takeo Kanai , Minoru Katoh , Koudou Yamauchi , Toshihiro Araki
发明人: Yoshio Takazawa , Toshio Yamada , Shinichi Ozawa , Takeo Kanai , Minoru Katoh , Koudou Yamauchi , Toshihiro Araki
IPC分类号: G11C7/00
CPC分类号: G11C5/14 , G11C7/12 , G11C7/22 , G11C17/12 , G11C2207/2227
摘要: A semiconductor integrated circuit has a memory which can enter active state or standby state, and the memory has voltage generation circuits for bit lines and source lines with which memory cells are connected. The voltage generation circuits make the potential of the bit lines and the potential of the source lines equal to each other in response to an instruction to transition from active state to standby state. The voltage generation circuits produce a potential difference between the bit lines and the source lines in response to an instruction to transition from standby state to active state. In standby state, the potential of the bit lines and that of the source lines are equal to each other. Therefore, sub-threshold leakage does not occur between the source and drain of each memory cell. In active state, the source line potential is not varied.
摘要翻译: 半导体集成电路具有可以进入活动状态或待机状态的存储器,并且存储器具有用于存储单元连接的位线和源极线的电压产生电路。 响应于从活动状态转换到待机状态的指令,电压产生电路使位线的电位和源极线的电位彼此相等。 响应于从待机状态转换到活动状态的指令,电压产生电路产生位线和源极线之间的电位差。 在待机状态下,位线的电位和源极线的电位彼此相等。 因此,每个存储单元的源极和漏极之间不会发生次阈值泄漏。 在活动状态下,源极线电位不变。
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公开(公告)号:US20060187734A1
公开(公告)日:2006-08-24
申请号:US11377348
申请日:2006-03-17
申请人: Yoshio Takazawa , Toshio Yamada , Shinichi Ozawa , Takeo Kanai , Minoru Katoh , Koudou Yamauchi , Toshihiro Araki
发明人: Yoshio Takazawa , Toshio Yamada , Shinichi Ozawa , Takeo Kanai , Minoru Katoh , Koudou Yamauchi , Toshihiro Araki
IPC分类号: G11C5/14
CPC分类号: G11C5/14 , G11C7/12 , G11C7/22 , G11C17/12 , G11C2207/2227
摘要: A semiconductor integrated circuit has a memory which can enter active state or standby state, and the memory has voltage generation circuits for bit lines and source lines with which memory cells are connected. The voltage generation circuits make the potential of the bit lines and the potential of the source lines equal to each other in response to an instruction to transition from active state to standby state. The voltage generation circuits produce a potential difference between the bit lines and the source lines in response to an instruction to transition from standby state to active state. In standby state, the potential of the bit lines and that of the source lines are equal to each other. Therefore, sub-threshold leakage does not occur between the source and drain of each memory cell. In active state, the source line potential is not varied.
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公开(公告)号:US07046573B2
公开(公告)日:2006-05-16
申请号:US10748137
申请日:2003-12-31
申请人: Yoshio Takazawa , Toshio Yamada , Shinichi Ozawa , Takeo Kanai , Minoru Katoh , Koudou Yamauchi , Toshihiro Araki
发明人: Yoshio Takazawa , Toshio Yamada , Shinichi Ozawa , Takeo Kanai , Minoru Katoh , Koudou Yamauchi , Toshihiro Araki
IPC分类号: G11C7/00
CPC分类号: G11C5/14 , G11C7/12 , G11C7/22 , G11C17/12 , G11C2207/2227
摘要: A semiconductor integrated circuit has a memory which can enter active state or standby state, and the memory has voltage generation circuits for bit lines and source lines with which memory cells are connected. The voltage generation circuits make the potential of the bit lines and the potential of the source lines equal to each other in response to an instruction to transition from active state to standby state. The voltage generation circuits produce a potential difference between the bit lines and the source lines in response to an instruction to transition from standby state to active state. In standby state, the potential of the bit lines and that of the source lines are equal to each other. Therefore, sub-threshold leakage does not occur between the source and drain of each memory cell. In active state, the source line potential is not varied.
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公开(公告)号:US07317658B2
公开(公告)日:2008-01-08
申请号:US11377351
申请日:2006-03-17
申请人: Yoshio Takazawa , Toshio Yamada , Shinichi Ozawa , Takeo Kanai , Minoru Katoh , Koudou Yamauchi , Toshihiro Araki
发明人: Yoshio Takazawa , Toshio Yamada , Shinichi Ozawa , Takeo Kanai , Minoru Katoh , Koudou Yamauchi , Toshihiro Araki
IPC分类号: G11C8/00
CPC分类号: G11C5/14 , G11C7/12 , G11C7/22 , G11C17/12 , G11C2207/2227
摘要: A semiconductor integrated circuit has a memory which can enter active state or standby state, and the memory has voltage generation circuits for bit lines and source lines with which memory cells are connected. The voltage generation circuits make the potential of the bit lines and the potential of the source lines equal to each other in response to an instruction to transition from active state to standby state. The voltage generation circuits produce a potential difference between the bit lines and the source lines in response to an instruction to transition from standby state to active state. In standby state, the potential of the bit lines and that of the source lines are equal to each other. Therefore, sub-threshold leakage does not occur between the source and drain of each memory cell. In active state, the source line potential is not varied.
摘要翻译: 半导体集成电路具有可以进入活动状态或待机状态的存储器,并且存储器具有用于存储单元连接的位线和源极线的电压产生电路。 响应于从活动状态转换到待机状态的指令,电压产生电路使位线的电位和源极线的电位彼此相等。 响应于从待机状态转换到活动状态的指令,电压产生电路产生位线和源极线之间的电位差。 在待机状态下,位线的电位和源极线的电位彼此相等。 因此,每个存储单元的源极和漏极之间不会发生次阈值泄漏。 在活动状态下,源极线电位不变。
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公开(公告)号:US20060164906A1
公开(公告)日:2006-07-27
申请号:US11377351
申请日:2006-03-17
申请人: Yoshio Takazawa , Toshio Yamada , Shinichi Ozawa , Takeo Kanai , Minoru Katoh , Koudou Yamauchi , Toshihiro Araki
发明人: Yoshio Takazawa , Toshio Yamada , Shinichi Ozawa , Takeo Kanai , Minoru Katoh , Koudou Yamauchi , Toshihiro Araki
IPC分类号: G11C5/14
CPC分类号: G11C5/14 , G11C7/12 , G11C7/22 , G11C17/12 , G11C2207/2227
摘要: A semiconductor integrated circuit has a memory which can enter active state or standby state, and the memory has voltage generation circuits for bit lines and source lines with which memory cells are connected. The voltage generation circuits make the potential of the bit lines and the potential of the source lines equal to each other in response to an instruction to transition from active state to standby state. The voltage generation circuits produce a potential difference between the bit lines and the source lines in response to an instruction to transition from standby state to active state. In standby state, the potential of the bit lines and that of the source lines are equal to each other. Therefore, sub-threshold leakage does not occur between the source and drain of each memory cell. In active state, the source line potential is not varied.
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公开(公告)号:US5170107A
公开(公告)日:1992-12-08
申请号:US799656
申请日:1991-11-29
申请人: Toshihiro Araki
发明人: Toshihiro Araki
CPC分类号: B60S1/606 , B60S1/481 , Y10S318/02
摘要: A head lamp washer is disclosed, which is for use in a motor vehicle having a head lamp and a windshield washer for washing a windshield of the motor vehicle. The head lamp washer comprises a washing liquid spray system for spraying washing liquid over a face of the head lamp. The spray system has both a manual mode in which the spray system operates independently and an automatic mode in which the spray system operates in cooperation with the windshield washer. A manual mode setting switch causes the spray system to assume the manual mode when turned ON and an automatic mode setting switch causes the spray system to assume the automatic mode when turned ON. Under the operation mode, the washing liquid spraying starts when the operations of the windshield washer are counted to a predetermined number. The amount of washing liquid sprayed under the automatic mode is less than that sprayed under the manual mode.
摘要翻译: 公开了一种头灯洗衣机,其用于具有头灯和用于清洗机动车辆的挡风玻璃的挡风玻璃清洗器的机动车辆中。 头灯洗涤器包括用于将清洗液喷射在头灯的表面上的洗涤液喷射系统。 喷雾系统具有喷雾系统独立操作的手动模式和喷雾系统与挡风玻璃清洗器协同操作的自动模式。 手动模式设置开关使喷雾系统在开启时处于手动模式,而自动模式设置开关使喷雾系统在打开时处于自动模式。 在操作模式下,当挡风玻璃洗衣机的操作被计数到预定数量时,开始洗涤液喷射。 在自动模式下喷洒的洗涤液量少于在手动模式下喷洒的洗涤液量。
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公开(公告)号:US09002405B2
公开(公告)日:2015-04-07
申请号:US12744517
申请日:2008-12-12
申请人: Toshihiro Araki , Keiichi Kubota
发明人: Toshihiro Araki , Keiichi Kubota
IPC分类号: H04W48/20
CPC分类号: H04W48/20
摘要: When an access process request signal for access to a connection network, from a terminal which exists in the same coverage area shared by a plurality of radio base stations, is received by one of the radio base stations, an access point base station is determined according to the resource information of the radio base stations by the connection network so as to transmit to the terminal, an access process base station modification request signal which requests that the access process request signal be transmitted to the radio base station that serves as the determined access point base station.
摘要翻译: 当存在于多个无线基站共享的同一覆盖区域的终端的接入网络的接入处理请求信号由无线基站之一接收时,接入点基站根据 通过连接网络对无线基站的资源信息进行发送,向终端发送请求将接入处理请求信号发送给作为确定的接入的无线基站的接入处理基站修改请求信号 点基站。
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公开(公告)号:USD243586S
公开(公告)日:1977-03-08
申请号:US576261
申请日:1975-05-12
申请人: Toshihiro Araki
设计人: Toshihiro Araki
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公开(公告)号:US20100267404A1
公开(公告)日:2010-10-21
申请号:US12744517
申请日:2008-12-12
申请人: Toshihiro Araki , Keiichi Kubota
发明人: Toshihiro Araki , Keiichi Kubota
IPC分类号: H04B7/00
CPC分类号: H04W48/20
摘要: When an access process request signal for access to a connection network, from a terminal which exists in the same coverage area shared by a plurality of radio base stations, is received by one of the radio base stations, an access point base station is determined according to the resource information of the radio base stations by the connection network so as to transmit to the terminal, an access process base station modification request signal which requests that the access process request signal be transmitted to the radio base station that serves as the determined access point base station.
摘要翻译: 当存在于多个无线基站共享的同一覆盖区域的终端的接入网络的接入处理请求信号由无线基站之一接收时,接入点基站根据 通过连接网络对无线基站的资源信息进行发送,向终端发送请求将接入处理请求信号发送给作为确定的接入的无线基站的接入处理基站修改请求信号 点基站。
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