公开(公告)号：US07236024B2

公开(公告)日：2007-06-26

申请号：US11239943

申请日：2005-09-30

申请人： Yunteng Huang ,  Ligang Zhang ,  Axel Thomsen

发明人： Yunteng Huang ,  Ligang Zhang ,  Axel Thomsen

IPC分类号： H03L7/06

CPC分类号： G06F7/68 ,  H03L7/183 ,  H03L7/23

摘要： A PLL function may be implemented as a dual-loop structure having a first PLL circuit which generates an intermediate signal from the reference signal, and a second PLL circuit which generates an output signal from the intermediate signal. The intermediate signal frequency is preferably chosen at a value in which potential interference signals do not have much energy. The first loop preferably has low bandwidth to provide good input jitter attenuation, while second loop preferably has higher bandwidth to reduce phase noise of the output signal. The circuit preferably provides for a choice of several different intermediate frequencies to allow use where different intermediate frequencies may exist in each system. Moreover, in a system having two such dual-loop PLL circuits, each can be configured with a different intermediate frequency, so that interference from one to the other is reduced.

摘要翻译： PLL功能可以实现为具有从参考信号产生中间信号的第一PLL电路的双回路结构，以及从中间信号产生输出信号的第二PLL电路。 中间信号频率优选地被选择为其中潜在的干扰信号没有太多能量的值。 第一环路优选具有低带宽以提供良好的输入抖动衰减，而第二环路优选地具有较高带宽以减少输出信号的相位噪声。 该电路优选地提供几种不同中频的选择，以允许在每个系统中可能存在不同中频的应用。 此外，在具有两个这样的双回路PLL电路的系统中，每个都可以配置有不同的中频，从而减少了从一个到另一个的干扰。

公开(公告)号：US20060033546A1

公开(公告)日：2006-02-16

申请号：US11239943

申请日：2005-09-30

申请人： Yunteng Huang ,  Ligang Zhang ,  Axel Thomsen

发明人： Yunteng Huang ,  Ligang Zhang ,  Axel Thomsen

IPC分类号： G06F1/04

CPC分类号： G06F7/68 ,  H03L7/183 ,  H03L7/23

摘要： A PLL function may be implemented as a dual-loop structure having a first PLL circuit which generates an intermediate signal from the reference signal, and a second PLL circuit which generates an output signal from the intermediate signal. The intermediate signal frequency is preferably chosen at a value in which potential interference signals do not have much energy. The first loop preferably has low bandwidth to provide good input jitter attenuation, while second loop preferably has higher bandwidth to reduce phase noise of the output signal. The circuit preferably provides for a choice of several different intermediate frequencies to allow use where different intermediate frequencies may exist in each system. Moreover, in a system having two such dual-loop PLL circuits, each can be configured with a different intermediate frequency, so that interference from one to the other is reduced.

摘要翻译： PLL功能可以实现为具有从参考信号产生中间信号的第一PLL电路的双回路结构，以及从中间信号产生输出信号的第二PLL电路。 中间信号频率优选地被选择为其中潜在的干扰信号没有太多能量的值。 第一环路优选具有低带宽以提供良好的输入抖动衰减，而第二环路优选地具有较高带宽以减少输出信号的相位噪声。 该电路优选地提供几种不同中频的选择，以允许在每个系统中可能存在不同中频的应用。 此外，在具有两个这样的双回路PLL电路的系统中，每个都可以配置有不同的中频，从而减少了从一个到另一个的干扰。

公开(公告)号：US06970030B1

公开(公告)日：2005-11-29

申请号：US10676626

申请日：2003-10-01

申请人： Yunteng Huang ,  Ligang Zhang ,  Axel Thomsen

发明人： Yunteng Huang ,  Ligang Zhang ,  Axel Thomsen

IPC分类号： G06F1/04 ,  G06F7/68 ,  H03L7/183 ,  H03L7/23

CPC分类号： G06F7/68 ,  H03L7/183 ,  H03L7/23

摘要： A PLL function may be implemented as a dual-loop structure having a first PLL circuit which generates an intermediate signal from the reference signal, and a second PLL circuit which generates an output signal from the intermediate signal. The intermediate signal frequency is preferably chosen at a value in which potential interference signals do not have much energy. The first loop preferably has low bandwidth to provide good input jitter attenuation, while second loop preferably has higher bandwidth to reduce phase noise of the output signal. The circuit preferably provides for a choice of several different intermediate frequencies to allow use where different intermediate frequencies may exist in each system. Moreover, in a system having two such dual-loop PLL circuits, each can be configured with a different intermediate frequency, so that interference from one to the other is reduced.

摘要翻译： PLL功能可以实现为具有从参考信号产生中间信号的第一PLL电路的双回路结构，以及从中间信号产生输出信号的第二PLL电路。 中间信号频率优选地被选择为其中潜在的干扰信号没有太多能量的值。 第一环路优选具有低带宽以提供良好的输入抖动衰减，而第二环路优选地具有较高带宽以减少输出信号的相位噪声。 该电路优选地提供几种不同中频的选择，以允许在每个系统中可能存在不同中频的应用。 此外，在具有两个这样的双回路PLL电路的系统中，每个都可以配置有不同的中频，从而减少了从一个到另一个的干扰。

公开(公告)号：US07253693B2

公开(公告)日：2007-08-07

申请号：US11004022

申请日：2004-12-03

申请人： Ligang Zhang ,  Yunteng Huang

发明人： Ligang Zhang ,  Yunteng Huang

IPC分类号： H03B1/04 ,  H03B5/12 ,  H03C3/22

CPC分类号： H03B5/04 ,  H03L7/099

摘要： A variable capacitance circuit includes a first and a second capacitor. A switch having an associated first nonlinear capacitance, selectively couples the first and second capacitors. To compensate for the first nonlinear capacitance, a second nonlinear capacitance is coupled to the switch that has a capacitance value responsive to a change in voltage that moves in a direction of change opposite to a direction of change of the first nonlinear capacitance.

摘要翻译： 可变电容电路包括第一和第二电容器。 具有相关联的第一非线性电容的开关选择性地耦合第一和第二电容器。 为了补偿第一非线性电容，第二非线性电容耦合到开关，其具有响应于在与第一非线性电容的变化方向相反的变化方向上移动的电压变化的电容值。

公开(公告)号：US07561865B2

公开(公告)日：2009-07-14

申请号：US11536900

申请日：2006-09-29

申请人： Ligang Zhang ,  Scott D. Willingham ,  Peter J. Vancorenland ,  Yunteng Huang

发明人： Ligang Zhang ,  Scott D. Willingham ,  Peter J. Vancorenland ,  Yunteng Huang

IPC分类号： H04B1/10

CPC分类号： H03J5/244 ,  H03J2200/10

摘要： A communications device including communications circuitry, tunable filter circuitry including a node configured to pass a signal between an antenna and the communication circuitry, and control circuitry configured to cause energy in the tunable filter circuitry to be adjusted for a time period and configured to determine a resonant frequency of the tunable filter circuitry from oscillations on the node caused by the energy subsequent to the time period is provided.

摘要翻译： 包括通信电路的通信设备，包括被配置为在天线和通信电路之间传递信号的节点的可调谐滤波器电路以及被配置为使得可调滤波器电路中的能量被调整一段时间并被配置为确定 提供可调谐滤波器电路的谐振频率与由该时间段之后的能量引起的节点上的振荡。

公开(公告)号：US20080081583A1

公开(公告)日：2008-04-03

申请号：US11536900

申请日：2006-09-29

申请人： Ligang Zhang ,  Scott D. Willingham ,  Peter J. Vancorenland ,  Yunteng Huang

发明人： Ligang Zhang ,  Scott D. Willingham ,  Peter J. Vancorenland ,  Yunteng Huang

IPC分类号： H04B1/18

CPC分类号： H03J5/244 ,  H03J2200/10

摘要： A communications device including communications circuitry, tunable filter circuitry including a node configured to pass a signal between an antenna and the communication circuitry, and control circuitry configured to cause energy in the tunable filter circuitry to be adjusted for a time period and configured to determine a resonant frequency of the tunable filter circuitry from oscillations on the node caused by the energy subsequent to the time period is provided.

摘要翻译： 包括通信电路的通信设备，包括被配置为在天线和通信电路之间传递信号的节点的可调谐滤波器电路以及被配置为使得可调滤波器电路中的能量被调整一段时间并被配置为确定 提供可调谐滤波器电路的谐振频率与由该时间段之后的能量引起的节点上的振荡。

公开(公告)号：US20050285687A1

公开(公告)日：2005-12-29

申请号：US11004022

申请日：2004-12-03

申请人： Ligang Zhang ,  Yunteng Huang

发明人： Ligang Zhang ,  Yunteng Huang

IPC分类号： H03B5/04 ,  H03L7/00 ,  H03L7/099

CPC分类号： H03B5/04 ,  H03L7/099

摘要： A variable capacitance circuit includes a first and a second capacitor. A switch having an associated first nonlinear capacitance, selectively couples the first and second capacitors. To compensate for the first nonlinear capacitance, a second nonlinear capacitance is coupled to the switch that has a capacitance value responsive to a change in voltage that moves in a direction of change opposite to a direction of change of the first nonlinear capacitance.

摘要翻译： 可变电容电路包括第一和第二电容器。 具有相关联的第一非线性电容的开关选择性地耦合第一和第二电容器。 为了补偿第一非线性电容，第二非线性电容耦合到开关，其具有响应于在与第一非线性电容的变化方向相反的变化方向上移动的电压变化的电容值。

公开(公告)号：US07834706B2

公开(公告)日：2010-11-16

申请号：US11571077

申请日：2005-06-28

申请人： Doug Frey ,  Axel Thomsen ,  Ligang Zhang

发明人： Doug Frey ,  Axel Thomsen ,  Ligang Zhang

IPC分类号： H03L7/00

CPC分类号： H03L7/0891 ,  H03L7/1976

摘要： A noise cancellation signal is generated for a fractional-N phase-locked loop (200). A divide value is provided to a first delta sigma modulator circuit (203), which generates a divide control signal to control a divide value of a feedback divider (208) in the phase-locked loop. An error term (e) is generated that is indicative of a difference between the generated divide control signal and the divide value supplied to the first delta sigma modulator circuit. The error term is integrated in an integrator (320) to generate an integrated error term (x), where xk+1=xk+ek; and a phase error correction circuit (209) utilizes the error term ek and the integrated error term xk to generate the phase error cancellation signal.

摘要翻译： 对于分数N锁相环（200）产生噪声消除信号。 分频值被提供给第一ΔΣ调制器电路（203），其产生除法控制信号以控制锁相环中的反馈分频器（208）的除法值。 生成指示所生成的除法控制信号和提供给第一ΔΣ调制器电路的除法值之间的差异的误差项（e）。 误差项集成在积分器（320）中以产生积分误差项（x），其中xk + 1 = xk + ek; 并且相位误差校正电路（209）利用误差项ek和积分误差项xk来产生相位误差消除信号。

公开(公告)号：US20080211588A1

公开(公告)日：2008-09-04

申请号：US11571077

申请日：2005-06-28

申请人： Douglas R. Frey ,  Axel Thomsen ,  Ligang Zhang

发明人： Douglas R. Frey ,  Axel Thomsen ,  Ligang Zhang

IPC分类号： H03L7/00 ,  H03B5/30

CPC分类号： H03L7/0891 ,  H03L7/1976

摘要： A noise cancellation signal is generated for a fractional-N phase-locked loop (200). A divide value is provided to a first delta sigma modulator circuit (203), which generates a divide control signal to control a divide value of a feedback divider (208) in the phase-locked loop. An error term (e) is generated that is indicative of a difference between the generated divide control signal and the divide value supplied to the first delta sigma modulator circuit. The error term is integrated in an integrator (320) to generate an integrated error term (x), where xk+1=xk+ek; and a phase error correction circuit (209) utilizes the error term ek and the integrated error term xk to generate the phase error cancellation signal.

摘要翻译： 对于分数N锁相环（200）产生噪声消除信号。 分频值被提供给第一ΔΣ调制器电路（203），其产生除法控制信号以控制锁相环中的反馈分频器（208）的除法值。 生成指示所生成的除法控制信号和提供给第一ΔΣ调制器电路的除法值之间的差异的误差项（e）。 误差项被集成在积分器（320）中，以产生积分误差项（x），其中x k + 1 + x + / SUP>; 并且相位误差校正电路（209）利用误差项e≠k和积分误差项x≠k来产生相位误差消除信号。

公开(公告)号：US07498656B2

公开(公告)日：2009-03-03

申请号：US10813886

申请日：2004-03-31

申请人： Ligang Zhang ,  David Pietruszynski ,  Axel Thomsen ,  Kevin G. Smith

发明人： Ligang Zhang ,  David Pietruszynski ,  Axel Thomsen ,  Kevin G. Smith

IPC分类号： H01F27/28

CPC分类号： H01L23/552 ,  H01F2017/008 ,  H01L23/645 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2224/0401

摘要： An improved electromagnetic shielding structure has been discovered. In one embodiment of the invention, an apparatus includes an inductor and an electrically conductive enclosure that electromagnetically shields the inductor. The electrically conductive enclosure has an aperture at least as large as the inductor. The aperture is substantially centered around a projected surface of the inductor. The apparatus may include one or more electrically conductive links extending across the aperture and electrically coupled to the electrically conductive enclosure. The electrically conductive links reduce an effect of electromagnetic signals external to the electrically conductive enclosure on the inductor.

摘要翻译： 已经发现了改进的电磁屏蔽结构。 在本发明的一个实施例中，一种装置包括电感器和电磁屏蔽电感器的导电外壳。 导电外壳具有至少与电感器一样大的孔径。 孔径基本上以电感器的投影表面为中心。 该装置可以包括一个或多个延伸穿过孔并且电耦合到导电外壳的导电链路。 导电链路降低电感器上导电外壳外部的电磁信号的影响。