Method for fabricating a dual work function semiconductor device and the device made thereof
    1.
    发明授权
    Method for fabricating a dual work function semiconductor device and the device made thereof 有权
    双功能半导体器件的制造方法及其制造方法

    公开(公告)号:US09024299B2

    公开(公告)日:2015-05-05

    申请号:US12578439

    申请日:2009-10-13

    摘要: A method for manufacturing a dual work function semiconductor device and the device made thereof are disclosed. In one aspect, a method includes providing a gate dielectric layer over a semiconductor substrate. The method further includes forming a metal layer over the gate dielectric layer. The method further includes forming a layer of gate filling material over the metal layer. The method further includes patterning the gate dielectric layer, the metal layer and the gate filling layer to form a first and a second gate stack. The method further includes removing the gate filling material only from the second gate stack thereby exposing the underlying metal layer. The method further includes converting the exposed metal layer into an metal oxide layer. The method further includes reforming the second gate stack with another gate filling material.

    摘要翻译: 公开了一种制造双功能半导体器件的方法及其制造的器件。 一方面,一种方法包括在半导体衬底上提供栅介质层。 该方法还包括在栅介电层上形成金属层。 该方法还包括在金属层上形成栅极填充材料层。 该方法还包括图案化栅极介电层,金属层和栅极填充层以形成第一和第二栅极叠层。 该方法还包括仅从第二栅极堆叠去除栅极填充材料,从而暴露下面的金属层。 该方法还包括将暴露的金属层转变成金属氧化物层。 该方法还包括用另一种栅极填充材料重新构造第二栅极堆叠。

    METHOD FOR FABRICATING A DUAL WORK FUNCTION SEMICONDUCTOR DEVICE AND THE DEVICE MADE THEREOF
    2.
    发明申请
    METHOD FOR FABRICATING A DUAL WORK FUNCTION SEMICONDUCTOR DEVICE AND THE DEVICE MADE THEREOF 有权
    制造双功能半导体器件及其器件的方法

    公开(公告)号:US20100109095A1

    公开(公告)日:2010-05-06

    申请号:US12578439

    申请日:2009-10-13

    摘要: A method for manufacturing a dual work function semiconductor device and the device made thereof are disclosed. In one aspect, a method includes providing a gate dielectric layer over a semiconductor substrate. The method further includes forming a metal layer over the gate dielectric layer. The method further includes forming a layer of gate filling material over the metal layer. The method further includes patterning the gate dielectric layer, the metal layer and the gate filling layer to form a first and a second gate stack. The method further includes removing the gate filling material only from the second gate stack thereby exposing the underlying metal layer. The method further includes converting the exposed metal layer into an metal oxide layer. The method further includes reforming the second gate stack with another gate filling material.

    摘要翻译: 公开了一种制造双功能半导体器件的方法及其制造的器件。 一方面,一种方法包括在半导体衬底上提供栅介质层。 该方法还包括在栅介电层上形成金属层。 该方法还包括在金属层上形成栅极填充材料层。 该方法还包括图案化栅极介电层,金属层和栅极填充层以形成第一和第二栅极叠层。 该方法还包括仅从第二栅极堆叠去除栅极填充材料,从而暴露下面的金属层。 该方法还包括将暴露的金属层转变成金属氧化物层。 该方法还包括用另一种栅极填充材料重新构造第二栅极堆叠。

    Scalable interpoly dielectric stacks with improved immunity to program saturation
    5.
    发明授权
    Scalable interpoly dielectric stacks with improved immunity to program saturation 有权
    可扩展的互补电介质堆叠,具有提高的编程饱和度的免疫力

    公开(公告)号:US08021948B2

    公开(公告)日:2011-09-20

    申请号:US12338015

    申请日:2008-12-18

    IPC分类号: H01L29/72

    摘要: A method for manufacturing a non-volatile memory device is described. The method comprises growing a layer in a siliconoxide consuming material, e.g. DyScO, on top of the upper layer of the layer where charge is stored. A non-volatile memory device is also described. In the non-volatile memory device, the interpoly/blocking dielectric comprises a layer in a siliconoxide consuming material, e.g. DyScO, on top of the upper layer of the layer where charge is stored, the siliconoxide consuming material having consumed at least part of the upper layer.

    摘要翻译: 描述了用于制造非易失性存储器件的方法。 该方法包括在氧化硅消耗材料中生长一层,例如。 DyScO,在存储电荷的层的上层之上。 还描述了非易失性存储器件。 在非易失性存储器件中,多晶硅/绝缘电介质包括一层二氧化硅消耗材料, DyScO,在存储电荷的层的上层的顶部,消耗了上层的至少一部分的氧化硅消耗材料。

    Scalable Interpoly Dielectric Stacks With Improved Immunity To Program Saturation
    9.
    发明申请
    Scalable Interpoly Dielectric Stacks With Improved Immunity To Program Saturation 有权
    可扩展的Interpoly电介质堆叠,具有提高程序饱和度的抗扰度

    公开(公告)号:US20090166715A1

    公开(公告)日:2009-07-02

    申请号:US12338015

    申请日:2008-12-18

    IPC分类号: H01L29/792 H01L21/28

    摘要: A method for manufacturing a non-volatile memory device is described. The method comprises growing a layer in a siliconoxide consuming material, e.g. DyScO, on top of the upper layer of the layer where charge is stored. A non-volatile memory device is also described. In the non-volatile memory device, the interpoly/blocking dielectric comprises a layer in a siliconoxide consuming material, e.g. DyScO, on top of the upper layer of the layer where charge is stored, the siliconoxide consuming material having consumed at least part of the upper layer.

    摘要翻译: 描述了用于制造非易失性存储器件的方法。 该方法包括在氧化硅消耗材料中生长一层,例如。 DyScO,在存储电荷的层的上层之上。 还描述了非易失性存储器件。 在非易失性存储器件中,多晶硅/绝缘电介质包括一层二氧化硅消耗材料, DyScO,在存储电荷的层的上层的顶部,消耗了上层的至少一部分的氧化硅消耗材料。

    Scalable Interpoly Dielectric Stacks With Improved Immunity to Program Saturation
    10.
    发明申请
    Scalable Interpoly Dielectric Stacks With Improved Immunity to Program Saturation 有权
    可扩展的Interpoly电介质堆叠,具有提高对程序饱和度的抗扰度

    公开(公告)号:US20110291179A1

    公开(公告)日:2011-12-01

    申请号:US13207961

    申请日:2011-08-11

    IPC分类号: H01L29/792

    摘要: A method for manufacturing a non-volatile memory device is described. The method comprises growing a layer in a siliconoxide consuming material, e.g. DyScO, on top of the upper layer of the layer where charge is stored. A non-volatile memory device is also described. In the non-volatile memory device, the interpoly/blocking dielectric comprises a layer in a siliconoxide consuming material, e.g. DyScO, on top of the upper layer of the layer where charge is stored, the siliconoxide consuming material having consumed at least part of the upper layer.

    摘要翻译: 描述了用于制造非易失性存储器件的方法。 该方法包括在氧化硅消耗材料中生长一层,例如。 DyScO,在存储电荷的层的上层之上。 还描述了非易失性存储器件。 在非易失性存储器件中,多晶硅/绝缘电介质包括一层二氧化硅消耗材料, DyScO,在存储电荷的层的上层的顶部,消耗了上层的至少一部分的氧化硅消耗材料。