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公开(公告)号:US11631734B2
公开(公告)日:2023-04-18
申请号:US17102258
申请日:2020-11-23
发明人: Syu-Tang Liu , Huang-Hsien Chang , Tsung-Tang Tsai , Hung-Jung Tu
IPC分类号: H01L49/02 , H01L21/02 , H01L23/522 , H01L21/308 , H01L21/3105 , H01L21/285
摘要: A vertical capacitor structure includes a substrate, at least a pillar, a first conductive layer, a first dielectric layer and a second conductive layer. The substrate defines a cavity. The pillar is disposed in the cavity. The first conductive layer covers and is conformal to the cavity of the substrate and the pillar, and is insulated from the substrate. The first dielectric layer covers and is conformal to the first conductive layer. The second conductive layer covers and is conformal to the first dielectric layer. The first conductive layer, the first dielectric layer and the second conductive layer jointly form a capacitor component.
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公开(公告)号:US20230115954A1
公开(公告)日:2023-04-13
申请号:US17500920
申请日:2021-10-13
发明人: En Hao HSU , Kuo Hwa TZENG , Chia-Pin CHEN , Chi Long TSAI
摘要: An electronic device package and manufacturing method thereof are provided. The electronic device package includes an electronic component including an active surface, a patterned conductive layer disposed on the active surface, an encapsulation layer disposed over the patterned conductive layer, and a buffer layer disposed between the patterned conductive layer and the encapsulation layer. The buffer layer is shaped and sized to alleviate a stress generated due to an interaction between the patterned conductive layer and the encapsulation layer.
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公开(公告)号:US20230114278A1
公开(公告)日:2023-04-13
申请号:US18080640
申请日:2022-12-13
发明人: Chao Wei LIU
IPC分类号: H01L23/538 , H01L23/31 , H01L21/78 , H01L21/48 , H01L21/56
摘要: A semiconductor device package and a method for manufacturing the semiconductor device package are provided. The semiconductor device package includes a first substrate, a second substrate and an interconnection. The second substrate is arranged above the first substrate and has an opening. The interconnection passes through the opening and connects to the first substrate and the second substrate.
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公开(公告)号:US11626441B2
公开(公告)日:2023-04-11
申请号:US16745139
申请日:2020-01-16
发明人: Hsin-Ying Ho
IPC分类号: H01L27/146 , G02B3/00
摘要: An optical module includes an image sensor and micro lens array. The image sensor has at least one group of pixels. The micro lens array is disposed on the image sensor. The at least one group of pixels is shifted from the micro lens array in a first direction from a top view perspective.
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公开(公告)号:US20230096703A1
公开(公告)日:2023-03-30
申请号:US17491220
申请日:2021-09-30
发明人: Yu-Ying LEE
IPC分类号: H01L23/498 , H01L23/60 , H01L23/00
摘要: An electronic package structure and a method of manufacturing an electronic package structure are provided. The electronic package structure includes a substrate, a conductive element, and a support structure. The substrate has a bottom surface and a lateral surface angled with the bottom surface. The conductive element is on the lateral surface of the substrate. The support structure is on the bottom surface of the substrate and configured to space the bottom surface from an external carrier. A lateral surface of the support structure is spaced apart from the lateral surface of the substrate by a first distance.
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公开(公告)号:US11616007B2
公开(公告)日:2023-03-28
申请号:US17066411
申请日:2020-10-08
IPC分类号: H01L23/48 , H01L23/498 , H01L21/48 , H01L23/31 , H01L21/56
摘要: An electronic package and method for manufacturing the same are provided. The electronic package includes a substrate and a wetting layer. The substrate includes a plurality of conductive step structures each including a first portion and a second portion. The first portion has a first bottom surface, a first outer surface and a first inner surface. The second portion has a second bottom surface, a second outer surface and a second inner surface, wherein the second portion partially exposes the first bottom surface. The wetting layer at least covers the second bottom surface, the second outer surface and the second inner surface of the second portion of each of the conductive step structures.
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公开(公告)号:US11605598B2
公开(公告)日:2023-03-14
申请号:US16852256
申请日:2020-04-17
发明人: Wei Da Lin , Meng-Jen Wang , Hung Chen Kuo , Wen Jin Huang
IPC分类号: H01L23/552 , H01L21/56 , H01L23/31 , H01L23/04 , H01L21/3213
摘要: A semiconductor device package includes a substrate having a surface, a conductive element disposed on the surface of the substrate, and an encapsulant disposed on the surface of the substrate and covering the conductive element. The conductive element has an upper surface facing away from the substrate and exposed from the encapsulant. Further, a roughness of the upper surface of the conductive element is greater than a roughness of a side surface of the conductive element.
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公开(公告)号:US20230075336A1
公开(公告)日:2023-03-09
申请号:US17987693
申请日:2022-11-15
发明人: Chien-Hua CHEN , Cheng-Yuan KUNG
IPC分类号: H01L25/10 , H01L41/047 , H01L41/053 , H03H9/64 , H01L41/23 , H01L41/25 , H03H9/60 , H01L23/522
摘要: A semiconductor package structure includes a plurality of transducer devices, a cap structure, at least one redistribution layer (RDL) and a protection material. The transducer devices are disposed side by side. Each of the transducer devices has at least one transducing region, and includes a die body and at least one transducing element. The die body has a first surface and a second surface opposite to the first surface. The transducing region is disposed adjacent to the first surface of the die body. The transducing element is disposed adjacent to the first surface of the die body and within the transducing region. The cap structure covers the transducing region of the transducer device to form an enclosed space. The redistribution layer (RDL) electrically connects the transducer devices. The protection material covers the transducer devices.
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公开(公告)号:US11600567B2
公开(公告)日:2023-03-07
申请号:US16528352
申请日:2019-07-31
发明人: Chih-Cheng Lee , Kuang Hsiung Chen
IPC分类号: H01L23/528 , H01L23/00 , H01L23/31 , H01L21/56 , H01L21/768
摘要: A semiconductor device package includes a first circuit layer, a second circuit layer, a first semiconductor die and a second semiconductor die. The first circuit layer includes a first surface and a second surface opposite to the first surface. The second circuit layer is disposed on the first surface of the first circuit layer. The first semiconductor die is disposed on the first circuit layer and the second circuit layer, and electrically connected to the first circuit layer and the second circuit layer. The second semiconductor die is disposed on the second circuit layer, and electrically connected to the second circuit layer.
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公开(公告)号:US11594660B2
公开(公告)日:2023-02-28
申请号:US16809500
申请日:2020-03-04
发明人: Tang-Yuan Chen , Meng-Wei Hsieh , Cheng-Yuan Kung
摘要: A semiconductor device package includes a carrier, an emitting element and a first package body. The carrier includes a first surface and a second surface opposite to the first surface. The emitting element is disposed on the first surface of the carrier. The first package body is disposed over the first surface of the carrier and spaced apart from the first surface of the carrier.
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