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公开(公告)号:US20240361798A1
公开(公告)日:2024-10-31
申请号:US18139939
申请日:2023-04-26
发明人: I-Ping Huang , Ching-An Chung
IPC分类号: G06F1/08
CPC分类号: G06F1/08
摘要: An electronic device includes a first circuit block and a second circuit block. The first circuit block is allocated in a first power domain, and includes a first clock counter and an updating circuit. The first clock counter is arranged to generate a first counter value according to a first reference clock. The updating circuit is arranged to receive a second counter value, and update the first counter value according to the second counter value. The second circuit block is allocated in a second power domain, and includes a second clock counter arranged to generate the second counter value according to a second reference clock. The first power domain and the second power domain are controlled independently.
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公开(公告)号:US12120213B2
公开(公告)日:2024-10-15
申请号:US18073528
申请日:2022-12-01
发明人: Chia-Hsing Hsu , Chun-Chia Huang
CPC分类号: H04L7/0079 , H04J3/0688
摘要: A 100BASE-TX transceiver includes a receive (RX) circuit, a transmit (TX) circuit, a clock generator circuit, a clock and data recovery (CDR) circuit, and a clock multiplexer circuit. The RX circuit receives an input data to generate an RX data. The TX circuit transmits a TX data according to a TX clock, to generate an output data. The clock generator circuit generates an output clock. The CDR circuit generates an RX recovered clock according to the RX data. The clock multiplexer circuit receives the output clock and the RX recovered clock, and outputs the TX clock that is selected from the output clock and the RX recovered clock.
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3.
公开(公告)号:US12113528B2
公开(公告)日:2024-10-08
申请号:US17868739
申请日:2022-07-19
发明人: Huan-Sheng Chen
IPC分类号: H03K19/003 , H03K19/00 , H03K19/0948
CPC分类号: H03K19/00346 , H03K19/0005 , H03K19/0948
摘要: An output driver includes a first pre-driver circuit, a first driver circuit, a second pre-driver circuit, a second driver circuit, and a feedback network. The first pre-driver circuit pre-drives a first data input signal to generate a first pre-driving output signal. The first driver circuit drives the first pre-driving output signal to generate a first data output signal. The second pre-driver circuit pre-drives a second data input signal to generate a second pre-driving output signal, wherein the first data input signal and the second data input signal are a differential input of the output driver. The second driver circuit drives the second pre-driving output signal to generate a second data output signal. The feedback network performs a latching operation upon the first pre-driving output signal and the second pre-driving output signal according to the first data output signal and the second data output signal.
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公开(公告)号:US20240313747A1
公开(公告)日:2024-09-19
申请号:US18399660
申请日:2023-12-28
发明人: Han-Chi Chiu , Jui-Hung Wei , Ke-Deng Huang , John-San Yang
摘要: A feedback control circuit of a pulse-frequency modulation (PFM) converter includes an on-time timer circuit and a detection circuit. The on-time timer circuit generates an on-time control signal for controlling an on-time duration of a switch circuit included in a power stage circuit of the PFM converter. The detection circuit controls the on-time timer circuit to adaptively adjust the on-time control signal according to a pulse interval between two successive inductor current pulses of the PEM converter.
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公开(公告)号:US12028438B2
公开(公告)日:2024-07-02
申请号:US17848399
申请日:2022-06-24
发明人: Ming-Yi Hsieh
CPC分类号: H04L7/0079 , G06F1/12
摘要: An electronic device includes a receiver circuit, a clock generator circuit, and a clock control circuit. The receiver circuit receives first clock information associated with a first clock of another electronic device. The clock generator circuit generates a second clock for the electronic device. The clock control circuit obtains second clock information associated with the second clock, generates a clock control signal according to the first clock information and the second clock information, and outputs the clock control signal to the clock generator circuit, where the clock generator circuit adjusts the second clock in response to the clock control signal.
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公开(公告)号:US11955108B2
公开(公告)日:2024-04-09
申请号:US17689436
申请日:2022-03-08
发明人: Chao-Ling Hsu , Li-Wen Chi
IPC分类号: G10K11/178 , H04R1/10
CPC分类号: G10K11/17881 , G10K11/17854 , H04R1/1083 , G10K2210/1081
摘要: The invention relates to an adaptive active noise cancellation apparatus and an audio playback system using the same. The adaptive active noise cancellation apparatus shapes an error signal and a noise signal according to a shape of an ideal noise. After that, the shaped noise signal and the shaped error signal are sent into a parameter adjusting unit to perform an adaptive parameter adjustment. Thus, the adaptive noise filter unit is not only can adaptively suppress noise and minimize the error signal, but also can suppress specific frequencies that are sensitive to the human ear.
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公开(公告)号:US11942068B2
公开(公告)日:2024-03-26
申请号:US17696901
申请日:2022-03-17
发明人: Chao-Ling Hsu , Li-Wen Chi
IPC分类号: G10K11/178
CPC分类号: G10K11/17854 , G10K11/17815 , G10K11/17823 , G10K11/17825 , G10K11/17881 , G10K2210/3026 , G10K2210/3027 , G10K2210/3028 , G10K2210/3044
摘要: An adaptive active noise control (ANC) system includes an ANC circuit and a control circuit. The ANC circuit generates an anti-noise signal for noise reduction, wherein the ANC circuit includes at least one adaptive filter. The control circuit receives a first input signal derived from a reference signal output by a reference microphone that picks up ambient noise, receives a second input signal derived from an error signal output by an error microphone that picks up remnant noise resulting from the noise reduction, and performs a transfer function variation detection based on the first input signal and the second input signal to control the at least one adaptive filter.
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8.
公开(公告)号:US20230412354A1
公开(公告)日:2023-12-21
申请号:US17980566
申请日:2022-11-04
发明人: Chia-Hsing Hsu , Chun-Chia Huang
IPC分类号: H04L7/00
CPC分类号: H04L7/0025 , H04L7/0008 , H04L7/0029
摘要: A 100BASE-TX transceiver includes a receive (RX) circuit, a transmit (TX) circuit, and a noise reduction circuit. The RX circuit receives an input data according to an RX clock, to generate an RX data. The TX circuit transmits a TX data according to a TX clock, to generate an output data, wherein the TX clock is constrained to be in sync with the RX clock. The noise reduction circuit applies noise reduction to the RX data according to the TX data, to generate a noise-reduced RX data.
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公开(公告)号:US20230402818A1
公开(公告)日:2023-12-14
申请号:US18070406
申请日:2022-11-28
发明人: Chun-Wei Chen , Ming-Yin Ko , Yan-Bin Luo
IPC分类号: H01S5/02345 , H01S5/02 , H01S5/02315 , H01S5/02355
CPC分类号: H01S5/02345 , H01S5/0215 , H01S5/02315 , H01S5/02355 , H01S5/0261
摘要: A semiconductor package includes a printed circuit board (PCB), a semiconductor device, a first signal bonding wire, and a first ground bonding wire. The PCB includes a first PCB ground pad and a first PCB signal trace. The semiconductor device includes a first device ground pad and a first device signal pad. The first signal bonding wire is coupled between the first device signal pad and the first PCB signal trace. The first ground bonding wire is coupled between the first device ground pad and the first PCB ground pad, wherein the first ground bonding wire crosses over the first signal bonding wire.
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公开(公告)号:US20230396163A1
公开(公告)日:2023-12-07
申请号:US18139953
申请日:2023-04-27
发明人: Jui-Hung Wei , Han-Chi Chiu , En-Yang Lin , John-San Yang
摘要: A feedback control circuit of a pulse-frequency modulation (PFM) converter includes a multiplexer circuit and a detection circuit. The multiplexer circuit is arranged to receive a plurality of candidate peak current values, and output one of the plurality of candidate peak current values as a target peak current value according to a selection control signal, wherein a peak current value of an inductor current pulse of the PFM converter is subject to the target peak current value. The detection circuit is arranged to adaptively adjust the selection control signal according to a pulse interval between two successive inductor current pulses of the PFM converter.
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