ELECTRONIC DEVICE FOR PERFORMING CLOCK MANAGEMENT BY USING CLOCK COUNTERS ALLOCATED AT DIFFERENT POWER DOMAINS AND ASSOCIATED METHOD

    公开(公告)号:US20240361798A1

    公开(公告)日:2024-10-31

    申请号:US18139939

    申请日:2023-04-26

    IPC分类号: G06F1/08

    CPC分类号: G06F1/08

    摘要: An electronic device includes a first circuit block and a second circuit block. The first circuit block is allocated in a first power domain, and includes a first clock counter and an updating circuit. The first clock counter is arranged to generate a first counter value according to a first reference clock. The updating circuit is arranged to receive a second counter value, and update the first counter value according to the second counter value. The second circuit block is allocated in a second power domain, and includes a second clock counter arranged to generate the second counter value according to a second reference clock. The first power domain and the second power domain are controlled independently.

    Output driver using feedback network for slew rate reduction and associated output driving method

    公开(公告)号:US12113528B2

    公开(公告)日:2024-10-08

    申请号:US17868739

    申请日:2022-07-19

    发明人: Huan-Sheng Chen

    摘要: An output driver includes a first pre-driver circuit, a first driver circuit, a second pre-driver circuit, a second driver circuit, and a feedback network. The first pre-driver circuit pre-drives a first data input signal to generate a first pre-driving output signal. The first driver circuit drives the first pre-driving output signal to generate a first data output signal. The second pre-driver circuit pre-drives a second data input signal to generate a second pre-driving output signal, wherein the first data input signal and the second data input signal are a differential input of the output driver. The second driver circuit drives the second pre-driving output signal to generate a second data output signal. The feedback network performs a latching operation upon the first pre-driving output signal and the second pre-driving output signal according to the first data output signal and the second data output signal.

    Electronic device that adjusts local clock according to clock information of another electronic device and associated computer system

    公开(公告)号:US12028438B2

    公开(公告)日:2024-07-02

    申请号:US17848399

    申请日:2022-06-24

    发明人: Ming-Yi Hsieh

    IPC分类号: G06F1/12 H04L7/00

    CPC分类号: H04L7/0079 G06F1/12

    摘要: An electronic device includes a receiver circuit, a clock generator circuit, and a clock control circuit. The receiver circuit receives first clock information associated with a first clock of another electronic device. The clock generator circuit generates a second clock for the electronic device. The clock control circuit obtains second clock information associated with the second clock, generates a clock control signal according to the first clock information and the second clock information, and outputs the clock control signal to the clock generator circuit, where the clock generator circuit adjusts the second clock in response to the clock control signal.