CAPACITANCE DETECTION CIRCUIT
    1.
    发明申请
    CAPACITANCE DETECTION CIRCUIT 有权
    电容检测电路

    公开(公告)号:US20140238133A1

    公开(公告)日:2014-08-28

    申请号:US14350807

    申请日:2012-11-12

    发明人: Masami Kishiro

    IPC分类号: G01P15/125

    摘要: A capacitance detection circuit inhibits noise. The capacitance detection circuit detects a change in capacitance between a pair of electrodes of a physical quantity sensor, with these electrodes generating the change in capacitance in response to a change in physical quantity. The capacitance detection circuit has a carrier signal generating circuit that supplies a carrier signal to one of the electrodes, an operational amplifier that has an inverting input terminal to which the other one of the electrodes is input, a dummy capacity that is connected in parallel to the pair of electrodes, and a carrier signal conditioning circuit that inverts a phase of a carrier signal supplied from the carrier signal generating circuit to the dummy capacity and adjusts a gain to inhibit the dummy capacity.

    摘要翻译: 电容检测电路抑制噪声。 电容检测电路检测物理量传感器的一对电极之间的电容变化,这些电极响应于物理量的变化而产生电容的变化。 电容检测电路具有载波信号发生电路,其向一个电极提供载波信号,具有输入另一个电极的反相输入端的运算放大器,并联连接的虚拟容量 一对电极和载波信号调理电路,其将从载波信号发生电路提供的载波信号的相位反转到虚拟容量,并调整增益以抑制虚拟容量。

    RB-IGBT
    2.
    发明申请
    RB-IGBT 有权

    公开(公告)号:US20170243962A1

    公开(公告)日:2017-08-24

    申请号:US15390680

    申请日:2016-12-26

    发明人: Hong-fei LU

    摘要: An RB-IGBT is provided that has a new emitter trench structure with improved breakdown voltage achieved by improving the electrical field distribution of the drift region. The RB-IGBT includes an isolation region having a first conductivity type on a side surface of a semiconductor substrate. The semiconductor substrate includes a drift region having a second conductivity type; a collector region having the first conductivity type and provided farther downward than the drift region; and an emitter trench portion provided extending to the drift region in a thickness direction from a front surface to a back surface of the semiconductor substrate. The emitter trench portion includes a trench electrode electrically connected to an emitter electrode provided above the semiconductor substrate; an upper trench insulating film directly contacting a bottom portion and side portions of the trench electrode; and a lower trench insulating film provided below the upper trench insulating film.

    TEST CIRCUIT AND TESTING METHOD
    4.
    发明申请

    公开(公告)号:US20230128311A1

    公开(公告)日:2023-04-27

    申请号:US17950764

    申请日:2022-09-22

    发明人: Mitsuru YOSHIDA

    IPC分类号: G01R31/26 H03K17/0812

    摘要: A test circuit for testing a switching device. The test circuit includes: a first terminal for receiving a drive signal; second, third and fourth terminals respectively coupled to a ground electrode, a control electrode and a power-supply electrode, of the switching device; and a clamping circuit coupled between the second terminal and the fourth terminal. The clamping circuit is configured to, upon turning on of the switching device responsive to the drive signal, cause a voltage at the third terminal to be a first voltage higher than a threshold of the switching device, and, upon turning off of the switching device responsive to the drive signal, cause the voltage at the third terminal to be a third voltage between the threshold and the first voltage, while clamping a voltage at the fourth terminal to a second voltage lower than a withstand voltage of the switching device.

    POWER SUPPLY CIRCUIT
    5.
    发明申请

    公开(公告)号:US20230124433A1

    公开(公告)日:2023-04-20

    申请号:US17894361

    申请日:2022-08-24

    发明人: Hiroki YAMANE

    IPC分类号: H02M3/335 H02M1/32

    摘要: A power supply circuit including a transformer, a transistor controlling an inductor current flowing through a primary coil of the transformer, an integrated circuit configured to switch the transistor, and a feedback circuit configured to, when a load current is smaller and larger than a predetermined value, generate a feedback voltage to cause the output voltage to reach the target level, and to lower the output voltage, respectively. The integrated circuit includes a determination circuit determining whether the transistor operates in a first or second mode, a first overload protection circuit detecting whether the load is in an overload state, based on a power supply voltage and a determination result of the determination indicating the first mode, and a switching control circuit controlling the switching of the transistor, based on the feedback voltage, a determination result of the determination circuit, and a detection result of the first overload protection circuit.

    Integrated circuit and power supply circuit

    公开(公告)号:US11632039B2

    公开(公告)日:2023-04-18

    申请号:US17458675

    申请日:2021-08-27

    摘要: An integrated circuit for a power supply circuit. The integrated circuit includes an oscillator circuit configured to output an oscillator voltage that rises with a predetermined slope from a first voltage, upon an inductor current of the power supply circuit becoming smaller than a first predetermined value, an error voltage output circuit configured to output an error voltage corresponding to a difference between a reference voltage and a feedback voltage corresponding to the output voltage, a drive circuit configured to turn on and off a transistor of the power supply circuit respectively upon the inductor current becoming smaller than the first predetermined value, and upon the oscillator voltage reaching a second voltage that is based on the error voltage, and an output circuit configured to change the first and/or second voltage based on a rectified voltage obtained by full-wave rectification of the AC voltage, and to output the changed voltage.

    Semiconductor device
    8.
    发明授权

    公开(公告)号:US11631666B2

    公开(公告)日:2023-04-18

    申请号:US17683384

    申请日:2022-03-01

    发明人: Kosuke Yoshida

    摘要: There is provided a semiconductor device including: an emitter region of a first conductivity type, a contact region of a second conductivity type, provided on the front surface side of the semiconductor substrate; one or more first trench portions which are electrically connected to a gate electrode and are in contact with emitter regions; a second trench portion which is adjacent to one of the one or more first trench portions, is electrically connected to the gate electrode, is in contact with the contact region of the second conductivity type, and is not in contact with the emitter region; and a dummy trench portion which is adjacent to one of the one or more first trench portions and is electrically connected to an emitter electrode, in which the contact region in contact with the second trench portion is in contact with the emitter electrode.

    Semiconductor device and semiconductor device manufacturing method

    公开(公告)号:US11631622B2

    公开(公告)日:2023-04-18

    申请号:US16909342

    申请日:2020-06-23

    发明人: Makoto Isozaki

    摘要: A semiconductor device, including a substrate having an insulating plate and a conductive plate formed on the insulating plate, a semiconductor chip formed on the conductive plate, a contact part arranged on the conductive plate with a bonding member therebetween, a rod-shaped external connection terminal having a lower end portion thereof fitted into the contact part, and a lid plate having a front surface and a back surface facing the substrate. An insertion hole pierces the lid plate, forming an entrance and exit respectively on the back and front surfaces of the lid plate. The external connection terminal is inserted in the insertion hole. The semiconductor device has at least one of a guide portion with an inclined surface, fixed to a portion of the external connection terminal located in the insertion hole, or an inclined inner wall of the insertion hole.

    SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE

    公开(公告)号:US20230115598A1

    公开(公告)日:2023-04-13

    申请号:US17896780

    申请日:2022-08-26

    摘要: A semiconductor device manufacturing method includes preparing a semiconductor chip and a conductive plate having a front surface that includes a disposition area on which the semiconductor chip is to be disposed, forming a supporting portion in a periphery of the disposition area of the conductive plate such that the supporting portion protrudes from a bottom of the disposition area in an upward direction orthogonal to the front surface of the conductive plate, bonding the semiconductor chip to the disposition area via bonding material applied to the disposition area, coating the front surface of the conductive plate, including the semiconductor chip and the supporting portion, with a coating layer, and after the coating, sealing the front surface of the conductive plate, including the semiconductor chip and the supporting portion, with sealing material.