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公开(公告)号：US20240365566A1
公开(公告)日：2024-10-31
申请号：US18140677
申请日：2023-04-28
发明人： Kai Kang , Curtis Chun-I Hsieh , Jianxun Sun , Juan Boon Tan
IPC分类号： H10B63/00
CPC分类号： H10B63/80
摘要： Structures for a resistive random-access memory element and methods of forming a structure for a resistive random-access memory element. The structure comprises an interlayer dielectric layer including a first trench having a sidewall and a second trench having a sidewall adjacent to the sidewall of the first trench. The structure further comprises a first layer on the sidewall of the first trench, a second layer inside the second trench, and a third layer on the sidewall of the second trench. The first layer comprises a first metal, the second layer comprises a second metal, and the third layer comprises a dielectric material. The third layer includes a portion positioned between the first layer and the second layer.
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公开(公告)号：US12101944B2
公开(公告)日：2024-09-24
申请号：US17172085
申请日：2021-02-10
CPC分类号： H10B63/82 , H10N70/021 , H10N70/24 , H10N70/823 , H10N70/841 , H10N70/8833
摘要： The embodiments herein relate to semiconductor memory devices and methods of forming the same. A semiconductor memory device is provided. The semiconductor memory device includes a memory cell having a first electrode, a second electrode, a switching layer, and a via structure. The second electrode is adjacent to a side of the first electrode and the switching layer overlays uppermost surfaces of the first and second electrodes. The via structure is over the uppermost surface of the second electrode.
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3.发明公开公开(公告)号：US20240297238A1
公开(公告)日：2024-09-05
申请号：US18177251
申请日：2023-03-02
IPC分类号： H01L29/66 , H01L21/8234 , H01L23/528
CPC分类号： H01L29/6656 , H01L21/823468 , H01L23/5283
摘要： A structure includes a first metal structure including a first upper metal feature having a first sidewall spacer thereabout, and a first lower metal feature under the first upper metal feature. The first lower metal feature includes a sidewall devoid of the first sidewall spacer. The structure also includes a second metal structure spaced from the first metal structure. The second metal structure includes a second upper metal feature having a second sidewall spacer thereabout, and a second lower metal feature under the first upper metal feature. The second lower metal feature includes a sidewall devoid of the second sidewall spacer. A dielectric is between the first metal structure and the second metal structure. The dielectric is devoid of any voids therein, and the opening it fills has a high aspect ratio. A related method is also provided.
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公开(公告)号：US20240234498A9
公开(公告)日：2024-07-11
申请号：US17969768
申请日：2022-10-20
发明人： Xinshu Cai , Shyue Seng Tan , Vibhor Jain , John J. Pekarik
CPC分类号： H01L29/0653 , H01L29/0847 , H01L29/7825
摘要： Structures for a junction field-effect transistor and methods of forming a structure for a junction field-effect transistor. The structure comprises a first gate on a top surface of a semiconductor substrate, a second gate beneath the top surface of the semiconductor substrate, and a channel region in the semiconductor substrate. The first gate is positioned between a source and a drain, and the channel region positioned between the first gate and the second gate.
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公开(公告)号：US12034039B2
公开(公告)日：2024-07-09
申请号：US17451172
申请日：2021-10-18
发明人： EeJan Khor , Ramasamy Chockalingam , Juan Boon Tan
IPC分类号： H01L49/02
CPC分类号： H01L28/92
摘要： A capacitor structure for an integrated circuit (IC) and a related method of forming are disclosed. The capacitor structure includes three electrodes. A planar bottom electrode has a first insulator layer thereover. A middle electrode includes a conductive layer over the first insulator layer and a plurality of spaced conductive pillars contacting the conductive layer. A second insulator layer extends over and between the plurality of spaced conductive pillars and contacts the conductive layer. An upper electrode extends over the second insulator layer, and hence, over and between the plurality of spaced conductive pillars. A length of the upper electrode can be controlled, in part, by the number and dimensions of the conductive pillars to increase capacitance capabilities per area.
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公开(公告)号：US20240194714A1
公开(公告)日：2024-06-13
申请号：US18064890
申请日：2022-12-12
发明人： Ping ZHENG , Eng Huat TOH , Cancan WU , Kiok Boone Elgin QUEK
IPC分类号： H01L27/146
CPC分类号： H01L27/1463 , H01L27/1462 , H01L27/14627 , H01L27/14683
摘要： A photodiode device includes a semiconductor substrate, a plurality of pixels, each of the pixels including a diode structure on a first side of the substrate and a conductive layer on a second side of the substrate, and DTI structures isolating adjacent pixels from one another, the DTI structures including a conductive material that electrically couples the conductive layer on the second side of the substrate and a metal line on the first side of the substrate. The conductive material in the DTI structures is part of an electrode circuit for the pixels.
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公开(公告)号：US20240194667A1
公开(公告)日：2024-06-13
申请号：US18077299
申请日：2022-12-08
IPC分类号： H01L27/02
CPC分类号： H01L27/0259
摘要： Structures for an electrostatic discharge protection device and methods of forming same. The structure comprises a semiconductor substrate including first and second trench isolation regions positioned in the semiconductor substrate. The first trench isolation region extends to a first depth in the semiconductor substrate, and the second trench isolation region extends to a second depth in the semiconductor substrate. The second depth is greater than the first depth. A bipolar junction transistor structure includes a collector, an emitter, and a base each disposed in the semiconductor substrate. The collector includes a portion that extends to the top surface of the semiconductor substrate, the first trench isolation region is positioned in the base, the second trench isolation region is positioned in a lateral direction between the portion of the collector and the base, and the second trench isolation region surrounds the base, the emitter, and the first trench isolation region.
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公开(公告)号：US11996441B2
公开(公告)日：2024-05-28
申请号：US17547288
申请日：2021-12-10
发明人： Bong Woong Mun , Kun Liu
IPC分类号： H01L29/06 , H01L21/762 , H01L29/66 , H01L29/78
CPC分类号： H01L29/0607 , H01L21/76202 , H01L21/76224 , H01L29/66712 , H01L29/7802
摘要： A device includes a first region disposed on a substrate, a second region disposed on the first region, a third region disposed in the second region and a first terminal region disposed in the third region. The first region comprises a discontinuous layer including at least one gap portion. The at least one gap portion comprises a portion of the substrate. The first region and the second region have a first conductivity type, and the substrate, the third region and the first terminal region have a second conductivity type. The first conductivity type is different from the second conductivity type.
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公开(公告)号：US20240114682A1
公开(公告)日：2024-04-04
申请号：US17958806
申请日：2022-10-03
发明人： Xinshu CAI , Shyue Seng TAN , Eng Huat TOH
IPC分类号： H01L27/112
CPC分类号： H01L27/11206
摘要： The present disclosure relates to a structure which includes a semiconductor substrate, a recessed shallow trench isolation structure within the semiconductor substrate, and a gate structure provided at least partially over the recessed shallow isolation structure.
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公开(公告)号：US20240079319A1
公开(公告)日：2024-03-07
申请号：US17930410
申请日：2022-09-07
发明人： SHU HUI LEE , JUAN BOON TAN , JIANXUN SUN , HARI BALAN , MYO AUNG MAUNG
IPC分类号： H01L23/525
CPC分类号： H01L23/5256
摘要： An eFuse structure is provided, the structure comprising a first fuse link having a first side. The first fuse link having a first indentation on the first side, the first indentation having a non-linear profile. A first dummy structure may be laterally spaced from the first indentation of the first fuse link.
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