公开(公告)号：US10033665B2

公开(公告)日：2018-07-24

申请号：US15034252

申请日：2014-11-11

Applicant: Napatech A/S

Inventor： Jens Christophersen

IPC: H04L12/28 ,  H04L12/935 ,  H04L12/931 ,  H04L12/741 ,  H04L12/861

Abstract: A system and a method for analyzing a plurality of data packets where the data packets are analyzed to determine which of a number of subsequent process(es) is/are to further analyze the data packets. Information identifying the subsequent process(es) is added to a FIFO. An unknown data packet type is not immediately recognizable, whereby a storage location is reserved in the FIFO, and the data packet is fed to a separate characterizing process deriving the information relating to the relevant process(es), which information is subsequently fed to the relevant storage location in the FIFO, so that the order of data packets represented in the FIFO is the order of receipt of the data packets. From the FIFO, information is fed to a work list or storage of the relevant subsequent processes to process the pertaining data packets. This processing may also be in the chronological order of receipt of the data packets.

公开(公告)号：US09811110B2

公开(公告)日：2017-11-07

申请号：US14924876

申请日：2015-10-28

Applicant: Napatech A/S

Inventor： René Krog Josiassen ,  Søren Kragh

IPC: G06F1/04 ,  G06F3/05 ,  H04J3/06

CPC classification number: G06F1/04 ,  G06F3/05 ,  H04J3/0697

Abstract: A system and a method of sampling an event signal using multiple clocking signals each provided in a separate candidate clock domain each of which also receives points in time from a master clock. From each candidate clock domain, clocked by the individual clocking signals, pairs of a received point in time and event signal value are fed to a master clock domain. In the master clock domain, the values of the event signal may be determined over time as a function of master clock time. This may be used for synchronizing operation in the master clock domain of e.g. packet time stamping with an overall time defined by the event signal. Using multiple clocking signals for the sampling, a much more precise sampling of the event signal is facilitated.

公开(公告)号：US09729259B2

公开(公告)日：2017-08-08

申请号：US14238753

申请日：2012-08-30

Applicant: Peter Ekner

Inventor： Peter Ekner

IPC: H04J3/06 ,  H04L7/033 ,  H04L7/00 ,  H04L7/04

CPC classification number: H04J3/0697 ,  H04L7/0012 ,  H04L7/0331 ,  H04L7/04

Abstract: A de-serializer, such as forming part of a SERDES, in which a point in time of receipt, on the serial data path, of receipt of a particular part of a data packet, such as an SOF, is determined from when that part is output on the parallel data path from knowledge of the clock controlling the parallel data path as well as which of the parallel lanes the part is output on.

公开(公告)号：US20120327949A1

公开(公告)日：2012-12-27

申请号：US13513520

申请日：2010-12-06

Applicant: Peter Korger ,  Peter Ekner

Inventor： Peter Korger ,  Peter Ekner

IPC: H04L12/56

CPC classification number: H04L49/9047 ,  H04L49/901

Abstract: An apparatus and a method where a plurality of physically separate data receiving/analyzing elements receive data packets and time stamp these. A controlling unit determines a storing address for each data packet based on at least the time stamp, where the controlling unit does not perform the determination of the address until a predetermined time delay has elapsed after the time of receipt.

Abstract translation: 一种其中多个物理分离的数据接收/分析元件接收数据分组并对其进行时间戳记的装置和方法。 控制单元至少基于时间戳确定每个数据分组的存储地址，其中控制单元不执行地址的确定，直到在接收时间过去了预定的时间延迟。

公开(公告)号：US10887251B2

公开(公告)日：2021-01-05

申请号：US16130560

申请日：2018-09-13

Applicant: International Business Machines Corporation ,  Napatech A/S

Inventor： Wayne F. Tackabury ,  Russell Couturier ,  William A. Bird ,  Thomas D. Silliman ,  Alex Omo Agerholm ,  Michael Milde Lilja ,  Peter Dahl Ekner ,  Philip Due Soeberg

IPC: G01R31/08 ,  G06F11/00 ,  G08C15/00 ,  H04J1/16 ,  H04J3/14 ,  H04L1/00 ,  H04L12/26 ,  H04L12/947 ,  H04L12/42 ,  H04L12/703 ,  H04L12/24

Abstract: Embodiments are directed to a method of implementing a packet capture ring. The packet capture ring includes a plurality of appliances, and the plurality of appliances includes a first appliance and a second appliance. The first appliance and the second appliance are both attached to a network tap, and the first appliance works as a master appliance. The master appliance ingests packets from the network tap, encapsulates the packets and forwards encapsulated packets in the packet capture ring. The method includes: detecting, by the second appliance, a failure of the first appliance; working, by the second appliance, as the master appliance; and removing, by the second appliance, the first appliance from a forwarding designation list.

公开(公告)号：US10601729B2

公开(公告)日：2020-03-24

申请号：US16018973

申请日：2018-06-26

Applicant: International Business Machines Corporation ,  Napatech A/S

Inventor： William A. Bird ,  Russell Couturier ,  Thomas D. Silliman ,  Wayne Tackabury ,  Alex Omo Agerholm ,  Michael Milde Lilja ,  Peter Dahl Ekner ,  Philip Due Soeberg

IPC: H04L12/923 ,  H04L12/26 ,  H04L12/861 ,  H04L12/911 ,  H04L29/06 ,  H04L12/801 ,  H04L12/42 ,  H04L12/703

Abstract: Embodiments are directed to a packet capture ring that provides a single network tap for packet capture and a series of processors (or appliances) for handling serialization and search request processing in a confederated and highly scalable manner. One such appliance (a “primary” appliance) maintains a tap port to the network. Each packet capture appliance has a locally attached repository that stores raw packets and a juxtaposed index that allows for retrieval of those packets. The primary appliance sends a single copy of encapsulated packets in opposite directions around the ring to its descendants. A designation is made across the system as to a “currently designated” appliance for servicing requests for indexing and storage of captured packets. This current designation shifts from appliance to appliance in the system, as a “previously designated” appliance has its storage capacity filled.

公开(公告)号：US08929378B2

公开(公告)日：2015-01-06

申请号：US13496013

申请日：2010-09-15

Applicant: Jens Christophersen

Inventor： Jens Christophersen

IPC: H04L12/28 ,  H04L12/801 ,  H04L12/721 ,  H04L12/741 ,  H04L12/803 ,  H04L12/851 ,  H04L12/935 ,  H04L29/06

CPC classification number: H04L47/10 ,  H04L45/38 ,  H04L45/745 ,  H04L47/125 ,  H04L47/2441 ,  H04L49/3009 ,  H04L69/12 ,  H04L69/22

Abstract: An apparatus and method for analyzing a data packet, where the first and second information is derived relating to the data packet. The first information relates to a type of the data packet, a standard to which the data packet conforms and/or which data item(s) is/are present in the data packet. The first information is used for identifying a function into which the second information is input to generate third, and this third information is output together with at least part of the data packet.

Abstract translation: 一种用于分析数据分组的装置和方法，其中导出与数据分组相关的第一和第二信息。 第一信息涉及数据分组的类型，数据分组所遵循的标准和/或数据分组中存在哪些数据项。 第一信息用于识别输入第二信息以产生第三信息的功能，并且该第三信息与数据分组的至少一部分一起输出。

公开(公告)号：US20130279509A1

公开(公告)日：2013-10-24

申请号：US13976823

申请日：2011-12-27

Applicant: Søren Kragh

Inventor： Søren Kragh

IPC: H04L12/70

CPC classification number: H04L49/90 ,  H04L47/10 ,  H04L47/50 ,  H04L47/6205 ,  H04L47/6255 ,  H04L2012/5683

Abstract: A method and apparatus adapted to prevent Head-Of-Line blocking by forwarding dummy packets to queues which have not received data for a predetermined period of time. This prevention of HOL may be on an input where data is forwarded to each of a number of FIFOs or an output where data is de-queued from FIFOs. The dummy packets may be provided with a time stamp derived from a recently queued or de-queued packet.

Abstract translation: 一种适于通过将虚拟分组转发到在预定时间段内没有接收到数据的队列来防止线头头部阻塞的方法和装置。 HOL的这种预防可能在数据被转发到多个FIFO中的每一个或其中数据从FIFO排队的输出的输入端上。 虚拟分组可以被提供有从最近排队或排队的分组导出的时间戳。

公开(公告)号：US20130114208A1

公开(公告)日：2013-05-09

申请号：US13642577

申请日：2011-04-19

Applicant: Claus Ek

Inventor： Claus Ek

IPC: H05K7/20

CPC classification number: H05K7/20136 ,  H01L2924/0002 ,  H05K1/144 ,  H05K7/20145 ,  H05K7/20163 ,  H05K7/2049 ,  H05K2201/042 ,  H01L2924/00

Abstract: A thermally controlled assembly having two parallel PCBs defining there between, and by the aid of a channel forming element, a channel in which air is forced, using a fan, to cool components in the channel. The fan has a cooling surface cooled by air from the fan and which is biased toward an element provided in a space below the cooling surface. The forced air also drawing air from outside the assembly through the space and into the channel to cool other elements provided in the space.

Abstract translation: 一种热控制组件，其具有两个平行的PCB，它们在通道形成元件之间并且借助于通道形成元件限定在其中使用风扇迫使空气冷却通道中的部件的通道。 风扇具有由来自风扇的空气冷却的冷却表面，并且朝向设置在冷却表面下方空间的元件偏压。 强制空气还从组件外部通过空间抽吸空气并进入通道以冷却在空间中提供的其它元件。

公开(公告)号：US10693796B2

公开(公告)日：2020-06-23

申请号：US16207683

申请日：2018-12-03

Applicant: International Business Machines Corporation ,  Napatech A/S

Inventor： William A. Bird ,  Russell Couturier ,  Vijay Dheap ,  Patrick V. Johnstone ,  Ben A. Wuest ,  Alex Omø Agerholm

IPC: H04L1/00 ,  H04L12/851 ,  H04L12/26 ,  H04L12/853 ,  H04L29/06 ,  H04L12/721

Abstract: Embodiments provide a system and method for network tracking. By using packet capture applications having a flow identifier and a time stamper, one or more raw packets from one or more packet flows intercepted from a network can be tagged with a unique identifier and timestamp that can later be used to aggregate packet flows that have been analyzed by one or more capture applications. The unique identifier can relate to the network interface of the particular capture application and can also have an increasing value, where the increase in value can be monotonic. Later capture applications, while capable of generating secondary timestamps, can disregard those secondary timestamps for the primary timestamp of the first capture application in order to remove complications arising from latency issues.