FAN-OUT PACKAGING METHOD EMPLOYING COMBINED PROCESS

    公开(公告)号:US20210358883A1

    公开(公告)日:2021-11-18

    申请号:US17284571

    申请日:2018-10-11

    IPC分类号: H01L23/00

    摘要: A fan-out packaging method employing a combined process includes: manufacturing at least two layers of basic circuit patterns on a substrate; manufacturing a galvanic isolation layer on one of the two layers of basic circuit patterns; manufacturing a fine circuit pattern on the galvanic isolation layer; using a bonding layer to bond an electronic component to the galvanic isolation layer, and using a patch material to establish an electrical connection between the electronic component and the fine circuit pattern; and using a packaging layer to package the electronic component, wherein the fine circuit pattern has a width less than widths of the basic circuit patterns. In the present disclosure, multiple layers of circuits are manufactured before installation and packaging of electronic components, thereby reducing the number of times an insulation material is to be heated, and broadening the range of available types of insulation materials.