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1.发明申请公开(公告)号：US20250015802A1
公开(公告)日：2025-01-09
申请号：US18895251
申请日：2024-09-24
Applicant: SEMTECH CORPORATION
Inventor： Chaouki ROUAISSIA
IPC: H03K17/955 , G01B7/14 , H03K17/95
Abstract: Environmental sensor circuit for a portable connected wireless device. The circuit includes a capacitive proximity sensor that determines when a user is close to the portable device. The device also has a magnetic field probe that provides a signal that indicates the position of a permanent magnet. The sensor circuit integrates both a digitizing unit and digital signal processing for the suppression of noise and drive in signals coming from the proximity sensor and from the magnetic field probe.
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公开(公告)号：US12136954B2
公开(公告)日：2024-11-05
申请号：US17818909
申请日：2022-08-10
Applicant: Semtech Corporation
Inventor： Jacob Meachen
IPC: H04B10/60
Abstract: A packaged optical receiver, comprising: a photodiode configured to receive an optical signal; a transimpedance amplifier (TIA) coupled to the photodiode; and a signal pin; wherein the optical receiver is configured to receive, via the signal pin, a reset signal; and wherein the optical receiver is configured to output in response to the reset signal, via the signal pin, a received signal strength indication (RSSI) for the received optical signal.
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公开(公告)号：US12135574B2
公开(公告)日：2024-11-05
申请号：US17817813
申请日：2022-08-05
Applicant: Semtech Corporation
Inventor： Christopher Iain Duff
Abstract: A compound semiconductor integrated circuit is disclosed, which includes biasing circuitry for generating a bias voltage at a bias output node. The biasing circuitry comprises a first circuit branch configured to extend between a defined voltage and a supply voltage. The first circuit branch includes a first transistor configured as a current source to generate a defined current in the first circuit branch and a controllably variable resistance. The bias output node is coupled to the first circuit branch at a first node which is between the controllably variable resistance and the first transistor. The biasing circuitry is operable so that the resistance value of the controllably variable resistance varies with a control voltage so as to vary the value of the bias voltage.
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公开(公告)号：US20240364427A1
公开(公告)日：2024-10-31
申请号：US18309740
申请日：2023-04-28
Applicant: SEMTECH CORPORATION
Inventor： Dariusz Michal GORZKIEWICZ , Wesley Calvin D'HAENE
CPC classification number: H04B10/6164 , H04B10/6933
Abstract: A system may include a recovery circuit that may: receive a first detect signal for a first burst signal and a second detect signal for a second burst signal in a burst mode data path; receive a reference pattern signal from a continuous mode data path; generate a first lock signal locked to the first burst signal or locked to the reference pattern signal, and a second lock signal locked to the second burst signal; and output the reference pattern signal from the recovery circuit during a guard period. The frequency of the recovery circuit may be locked to the frequency of the reference pattern signal during the guard period. The guard period may start based on when the first detect signal de-asserts or when the first lock signal de-asserts. During the guard period, the recovery circuit does not output the first burst signal or the second burst signal.
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公开(公告)号：US11967610B2
公开(公告)日：2024-04-23
申请号：US17659127
申请日：2022-04-13
Applicant: Semtech Corporation
Inventor： Christopher David Ainsworth
CPC classification number: H01L28/60 , H01L23/585 , H01L23/647 , H01L24/32 , H01L24/48 , H01L24/85 , H01L25/167 , H01L28/20 , H01L31/02005 , H01L31/02019 , H01L31/107 , H03F3/08 , H01L24/05 , H01L24/73 , H01L2224/0231 , H01L2224/02331 , H01L2224/04042 , H01L2224/05569 , H01L2224/32145 , H01L2224/48091 , H01L2224/48106 , H01L2224/48137 , H01L2224/48145 , H01L2224/48229 , H01L2224/73265 , H01L2924/12043 , H01L2924/19011 , H01L2924/19041 , H01L2924/19043 , H03F2200/165
Abstract: A semiconductor device comprises a semiconductor die and an integrated capacitor formed over the semiconductor die. The integrated capacitor is configured to receive a high voltage signal. A transimpedance amplifier is formed in the semiconductor die. An avalanche photodiode is disposed over or adjacent to the semiconductor die. The integrated capacitor is coupled between the avalanche photodiode and a ground node. A resistor is coupled between a high voltage input and the avalanche photodiode. The resistor is an integrated passive device (IPD) formed over the semiconductor die. A first terminal of the integrated capacitor is coupled to a ground voltage node. A second terminal of the integrated capacitor is coupled to a voltage greater than 20 volts. The integrated capacitor comprises a plurality of interdigitated fingers in one embodiment. In another embodiment, the integrated capacitor comprises a plurality of vertically aligned plates.
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Patent Agency Ranking
公开(公告)号：US20240048110A1
公开(公告)日：2024-02-08
申请号：US17817816
申请日：2022-08-05
Applicant: Semtech Corporation
Inventor： Christopher Iain DUFF
IPC: H03F3/58
CPC classification number: H03F3/58
Abstract: Amplifier circuitry is disclosed which has a travelling wave amplifier, with a plurality of amplifier elements connected between an input transmission line and an output transmission line, the transmission lines extending between first and second sides of the travelling wave amplifier. The input transmission line is configured to receive an input signal at the first side and the output transmission line is configured to output an output signal at the second side. The circuitry includes biasing circuitry for applying a DC bias to the output transmission line at at least one point upstream of a last amplifier element.
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公开(公告)号：US20240048109A1
公开(公告)日：2024-02-08
申请号：US17817814
申请日：2022-08-05
Applicant: Semtech Corporation
Inventor： Christopher Iain DUFF
CPC classification number: H03F3/55 , H03F3/45475 , H03F1/56 , H03F2200/423 , H03F2200/255
Abstract: Amplifier circuitry is disclosed for receiving a differential signal and outputting a single-ended output signal. A travelling wave amplifier has a plurality of amplifier elements connected between an input transmission line and an output transmission line, each extending between first and second sides of the travelling wave amplifier. The input transmission line is configured to receive the first differential signal component at the first side and the output transmission line is configured to provide the single-ended output signal at the second side. A matched transmission line, which is configured to match at least some transmission properties of the input transmission line, receive the second differential signal component at the first end. A differential termination network is connected to both the input transmission line and matched and the matched transmission line and is configured to provide differential termination of signals received at the first and second termination inputs.
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公开(公告)号：US20230297188A1
公开(公告)日：2023-09-21
申请号：US18202053
申请日：2023-05-25
Applicant: Semtech Corporation
Inventor： Chaouki ROUAISSIA , Pascal Monney
CPC classification number: G06F3/0418 , G06F3/044 , G06F2203/04107 , G06F2203/04108
Abstract: A capacitive sensor with a plurality of sense inputs connectable to capacitive sense electrodes and a common reference input, each sense input and the reference input can be put in a measure state, in a ground state, or in a shield state. The sensor can be equipped with external reference capacitors between each of the sense input and the common reference terminal. The reference capacitor can be read individually by selectively pulling one of the input terminals to ground and driving the other to be equipotential with the reference input.
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公开(公告)号：US20230238930A1
公开(公告)日：2023-07-27
申请号：US17648897
申请日：2022-01-25
Applicant: Semtech Corporation
Inventor： Christopher John BORN , Matthew George HAGMAN , Darrell Iaian SMITH
CPC classification number: H03F3/45475 , H03G3/3036 , H04B10/673 , H03G2201/103 , H03F2200/372
Abstract: A transimpedance amplifier (TIA) for converting an input current at an input node into an output voltage at an output node, the TIA comprising: a first amplifier stage having a first input coupled to the input node and a first output; a feedback path between the first output and the first input; a second amplifier stage in the feedback path having a second input, the second input coupled to the first output of the first amplifier stage; a feedback resistor in the feedback path coupled between an output of the second amplifier stage and first input of the first amplifier stage; and an output stage, comprising: a load resistor coupled between a reference voltage node and a T-coil, the T-coil comprising first and second inductors coupled in series at an inductor node, the T-coil coupled between the first output and the load resistor, the inductor node coupled to the output node of the TIA.
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公开(公告)号：US20230131074A1
公开(公告)日：2023-04-27
申请号：US17972203
申请日：2022-10-24
Applicant: Semtech Corporation
Inventor： Nicolas SORNIN , Baozhu NING
Abstract: The invention relates to a Global Navigation Satellite System (GNSS) receiver, comprising 1) a radiofrequency (RF) front-end configured to acquire GNSS signals emitted by a plurality of GNSS satellites in at least two snapshot time windows, wherein each emitted GNSS signal comprises a respective known spreading code identifying the emitting GNSS satellite, and wherein the RF front-end is configured to transform the acquired GNSS signals in each of the at least two snapshot time windows into a digital sequence, respectively, and 2) a receiver unit configured to determine for each snapshot time window pseudo-ranges from the GNSS receiver to at least a subset of the emitting GNSS satellites, respectively, wherein said at least two subsets corresponding to the at least two snapshot time windows may differ from one another, and wherein said pseudo-ranges are determined using (i) the known spreading codes and (ii) the at least two digital sequences. The GNSS receiver is configured to determine composite pseudo-ranges between the GNSS receiver and a composite subset of the emitting GNSS satellites at composite receive times, using at least the determined pseudo-ranges corresponding to the at least two snapshot time windows. The invention also relates to an assembly comprising a GNSS receiver, a gateway and a computing unit. The invention also relates to a method for determining a position of a GNSS receiver.
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