公开(公告)号：US4282594A

公开(公告)日：1981-08-04

申请号：US99881

申请日：1979-12-03

申请人： Singo Ichikawa

发明人： Singo Ichikawa

IPC分类号： G04D7/12 ,  G04G3/02 ,  G04C19/00 ,  G04B17/12

CPC分类号： G04D7/12 ,  G04G3/022

摘要： An electronic timepiece is equipped with a frequency division ratio adjustment circuit controlled by switch means, for producing a running rate correction signal that is aperiodically added in frequency to the output of a standard frequency oscillator, to correct the running rate of the timepiece, and is provided with externally controlled gate means for inhibiting this aperiodic frequency addition, so that the actual frequency of the standard frequency oscillator may be measured by means such as an external monitoring device which detects a display drive or modulation signal frequency through electrostatic or electromagnetic coupling to the timepiece display.

摘要翻译： 电子钟表配备有由开关装置控制的分频比调节电路，用于产生频率不定期加到标准频率振荡器的输出的运行速率校正信号，以校正钟表的运行速率，并且是 设置有外部控制的门装置，用于抑制这种非周期频率相加，使得可以通过诸如通过静电或电磁耦合检测显示驱动或调制信号频率的外部监视装置来测量标准频率振荡器的实际频率 钟表显示。

公开(公告)号：US4266290A

公开(公告)日：1981-05-05

申请号：US926165

申请日：1978-07-19

申请人： Yoshinori Futami ,  Tomio Ota

发明人： Yoshinori Futami ,  Tomio Ota

IPC分类号： G04C3/00 ,  G04D7/00 ,  G04D7/12 ,  G04G99/00 ,  G04B19/00

CPC分类号： G04D7/12 ,  G04D7/003

摘要： A manually operated control mechanism for permitting a high frequency detection signal to be selectively produced is provided. A selection circuit is coupled to a divider circuit for receiving therefrom a low frequency timekeeping signal and a higher frequency detection signal. The selection circuit is normally disposed in a first mode and transmits the low frequency timekeeping signal applied thereto and is adapted to be disposed into a second mode to thereby transmit the higher frequency detection signal applied thereto. A manually operative member is adapted to be coordinately displaced between a first non-engaging position and a second position wherein the manually operative member engages said selection circuit to thereby dispose same in a second mode in order to effect the transmission thereby of the higher frequency detection signal.

摘要翻译： 提供一种用于允许选择性地产生高频检测信号的手动控制机构。 选择电路耦合到分频器电路，用于从其接收低频计时信号和较高频率检测信号。 选择电路通常以第一模式设置并发送施加到其上的低频计时信号，并且适于被布置成第二模式，从而传送施加到其上的较高频率检测信号。 手动操作构件适于在第一非接合位置和第二位置之间协调地移位，其中手动操作构件接合所述选择电路，从而以第二模式配置，以便实现更高频率检测的传输 信号。

公开(公告)号：US3720704A

公开(公告)日：1973-03-13

申请号：US3720704D

申请日：1969-06-16

申请人： TOYO SODA MFG CO LTD

发明人： SAKOMURA T ,  KISAKI H ,  TADA T ,  MABUCHI S

IPC分类号： C07C69/16 ,  G04D7/12 ,  C07C67/02

CPC分类号： G04D7/12 ,  C07C67/11 ,  C07C69/007 ,  C07C69/16

摘要： IN A PROCESS FOR PREPARING ACETIC ACID ESTERS BY REACTING 3,4-DICHLORO-1-BUTENE OR A MIXTURE OF 3,4-DICHLORO-1-BUTENE AND 1,4-DICHLORO-2-BUTENE WITH AN ALKALI METAL ACETATE, A PROCESS FOR PREPARING 1,4-DIACETOXY-2-BUTENE SELECTIVELY CHARACTERIZED BY ADDING AT LEAST ONE ELEMENTAL METAL SELECTED FROM A GROUP CONSISTING OF COPPER, IRON AND ZINC OR A COMPOUND THEREOF.

公开(公告)号：US4407019A

公开(公告)日：1983-09-27

申请号：US235787

申请日：1981-02-19

申请人： Yoshinori Futami ,  Tokumon Ogawa

发明人： Yoshinori Futami ,  Tokumon Ogawa

IPC分类号： G04G3/00 ,  G04C3/14 ,  G04D7/12 ,  H03K3/02 ,  G04B17/12

CPC分类号： G04D7/12 ,  G04C3/14

摘要： An electronic wristwatch wherein a timing rate adjustment signal, representative of the amount of timing rate adjustment being effected and/or needed to be effected, is depicted. The electronic wristwatch includes a divider circuit for receiving a high frequency time standard signal from a quartz crystal oscillator circuit and for producing a low frequency timekeeping signal in response thereto. An adjustment circuit is coupled to the divider circuit for adjusting the frequency of the timekeeping signal by a predetermined amount. A converter circuit is adapted to be selectively coupled to the divider circuit to receive the adjusted low frequency timekeeping signal and, in response thereto, to produce a timing rate adjustment signal representative of the amount of adjustment applied in the low frequency timekeeping signal, and to produce a signal representative of the unadjusted oscillator frequency.

摘要翻译： 其中描绘了代表正在进行和/或需要进行的定时速率调整量的定时速率调节信号的电子手表。 电子手表包括用于从石英晶体振荡电路接收高频时间标准信号并响应于此产生低频计时信号的分频电路。 调节电路耦合到分频器电路，用于将计时信号的频率调整预定量。 A转换器电路适于选择性地耦合到除法器电路以接收经调整的低频计时信号，并且响应于此，产生表示在低频计时信号中施加的调整量的定时速率调整信号，并且 产生表示未调整振荡器频率的信号。

公开(公告)号：US3407645A

公开(公告)日：1968-10-29

申请号：US51847066

申请日：1966-01-03

申请人： PORTESCAP LE PORTE

发明人： ERICH JUCKER ,  FREDY GAGNEBIN

IPC分类号： G04D7/12

CPC分类号： G04D7/1221 ,  G04D7/12

公开(公告)号：US360234A

公开(公告)日：1887-03-29

申请号：US360234D

CPC分类号： G04F7/10 ,  G04D7/12

公开(公告)号：US4422038A

公开(公告)日：1983-12-20

申请号：US237152

申请日：1981-02-18

申请人： Hideo Monma ,  Masayuki Takahashi ,  Masato Ishiguro

发明人： Hideo Monma ,  Masayuki Takahashi ,  Masato Ishiguro

IPC分类号： H03K21/40 ,  G04D7/12 ,  G04G99/00 ,  G01R31/28 ,  G01R23/00 ,  G04C3/00

CPC分类号： G04G99/00 ,  G04D7/12

摘要： An integrated circuit having a frequency-dividing circuit which can be tested at high speeds, in which the frequency-dividing circuit is separated into a first stage frequency-dividing circuit and a second stage frequency-dividing circuit, an output buffer circuit and a test signal input circuit are connected to an alarm terminal parallelly, and test signals applied to the alarm terminal are supplied to the second stage frequency-dividing circuit via the test signal input circuit and a switching circuit.

摘要翻译： PCT No.PCT / JP80 / 00138 Sec。 371日期1981年2月18日 102（e）日期1981年2月18日PCT Filed 1980年6月19日PCT公布。 出版物WO80 / 02880 日期为1980年12月24日。具有分频电路的集成电路可以高速测试，其中分频电路分为第一级分频电路和第二级分频电路， 输出缓冲电路和测试信号输入电路并联连接到报警端子，并且施加到报警端的测试信号经由测试信号输入电路和开关电路提供给第二级分频电路。

公开(公告)号：US4224820A

公开(公告)日：1980-09-30

申请号：US14380

申请日：1979-02-23

申请人： W. Jorge Sitkewich ,  Sanford Roth

发明人： W. Jorge Sitkewich ,  Sanford Roth

IPC分类号： G01H3/06 ,  G04D7/12 ,  G04B17/00

CPC分类号： G04D7/12 ,  G01H3/06

摘要： A frequency deviation meter provides a display of the error in a timepiece's internal oscillator, and includes a plurality of pickup devices among which are electrostatic and ultrasonic detectors. Frequency of the timepiece's oscillator and the frequency error is displayed as seconds lost or gained per month. An elongated aluminum alloy resonant column of tool stock material having a crystal pickup provides a sensitive vibration detector assembly.

摘要翻译： 频率偏差计提供了钟表内部振荡器中的误差的显示，并且包括多个拾取装置，其中有静电和超声波探测器。 时钟振荡器的频率和频率误差显示为每月丢失或获得的秒数。 具有晶体拾取器的工具材料的细长铝合金共振柱提供敏感的振动检测器组件。

公开(公告)号：US4128003A

公开(公告)日：1978-12-05

申请号：US761261

申请日：1977-01-21

申请人： Louis A. Zanoni ,  James W. Pollack

发明人： Louis A. Zanoni ,  James W. Pollack

IPC分类号： G04D7/12 ,  G04C21/00

CPC分类号： G04D7/12

摘要： Apparatus is disclosed which is employed to provide an audible sound at a given repetition rate to enable one to test and calibrate a timing mechanism such as a watch which employs a non-audible frequency source, such as a crystal or quartz oscillator. The apparatus employs a pickup antenna and tuned circuit means which are responsive to the frequency radiated by the oscillator employed in the horological device to be tested. This frequency is processed by means of suitable circuitry to provide an output frequency within the audible range and of a repetition rate consistent with the repetition rate of a prior art mechanical horological device. The output frequency signal is applied to an audio transducer to thus provide an audible signal which is synchronized to the crystal oscillator signal to thereby enable a user to employ a prior art calibration instrument for testing and calibration of the above noted devices.

摘要翻译： 公开了用于以给定重复率提供可听见的声音的设备，以使得能够测试和校准诸如使用诸如晶体或石英振荡器的非可听频率源的钟表的定时机构。 该装置采用拾波天线和调谐电路装置，其响应于待测试的钟表装置中采用的振荡器辐射的频率。 该频率通过合适的电路来处理，以在可听范围内提供输出频率，并且重复频率与现有技术的机械钟表装置的重复率一致。 输出频率信号被施加到音频换能器，从而提供与晶体振荡器信号同步的可听信号，从而使得用户能够使用现有技术的校准仪器来测试和校准上述装置。

公开(公告)号：US4094136A

公开(公告)日：1978-06-13

申请号：US753129

申请日：1976-12-22

申请人： Hitomi Aizawa

发明人： Hitomi Aizawa

IPC分类号： G04C10/04 ,  G04D7/00 ,  G04D7/12 ,  G04G5/00 ,  G04C3/00

CPC分类号： G04C10/04 ,  G04D7/12

摘要： An inspection circuit for facilitating the inspection of the components of an electronic timepiece at the time that same is manufactured is provided. The inspection circuit is provided in an electronic timepiece having oscillator circuitry for producing high frequency time standard signals and divider circuitry for dividing down the high frequency time standard signal and producing a lower frequency time standard signal. The electronic timepiece further includes timekeeping counter circuitry for producing timekeeping signals and a digital display for displaying time in response to the timekeeping signals being applied thereto. The inspection circuit of the instant invention is particularly characterized by an auto-clear circuit coupled to the timekeeping counter and divider circuitry for detecting a power-on condition and in response thereto, applying a reset signal to the divider and timekeeping counter circuitry to thereby reset the counts thereof. The inspection circuit is coupled intermediate the divider timekeeping counter and divider circuitry and is adapted to receive the reset signal and apply to the digital display a first inspection signal to permit a first inspection of the digital display to be effected until the flower frequency time standard signal is applied to the inspection circuit.

摘要翻译： 提供了一种便于在制造同一时间检查电子表的部件的检查电路。 检查电路设置在具有用于产生高频时间标准信号的振荡器电路和用于分频高频时间标准信号并产生较低频率时间标准信号的分频器电路的电子表中。 电子钟表还包括用于产生计时信号的计时计数器电路和用于响应于应用计时信号而显示时间的数字显示器。 本发明的检查电路的特征在于，自动清除电路耦合到计时计数器和分频器电路，用于检测通电状态，并响应于此，将复位信号施加到分频器和计时计数器电路从而复位 其计数。 检测电路耦合在分配器计时计数器和除法器电路之间，并且适于接收复位信号，并向数字显示器施加第一检查信号，以允许要对数字显示进行第一次检查，直到花时间标准信号 被应用于检查电路。