公开(公告)号：US09213316B2

公开(公告)日：2015-12-15

申请号：US14616170

申请日：2015-02-06

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Vikas Suma Vinay ,  Rajani Manchukonda

IPC分类号： H03M1/50 ,  G04F10/00 ,  G04F10/10 ,  G04F10/04

CPC分类号： G04F10/005 ,  G04F10/04 ,  G04F10/105

摘要： A circuit for detecting and correcting timing errors. A timing circuit includes an interpolator. The interpolator includes a fine counter, a coarse counter, and stop correction logic. The coarse counter is incremented by a rollover output of the fine counter to generate a coarse count value. The stop correction logic is coupled to the fine counter and the coarse counter. The stop correction logic divides each cycle of the rollover output into first, second, and third time intervals, and selects a coarse counter output value to represent a time interval measured by the coarse counter based on a one of the first, second, and third intervals in which a time measurement stop signal is detected.

摘要翻译： 用于检测和校正定时误差的电路。 定时电路包括内插器。 内插器包括精细计数器，粗计数器和停止校正逻辑。 粗计数器由精细计数器的翻转输出递增，以产生粗计数值。 停止校正逻辑耦合到精细计数器和粗计数器。 停止校正逻辑将翻转输出的每个周期划分为第一，第二和第三时间间隔，并且选择粗计数器输出值以表示由粗计数器基于第一，第二和第三时间间隔中的一个测量的时间间隔 检测到时间测量停止信号的间隔。

公开(公告)号：US20130214960A1

公开(公告)日：2013-08-22

申请号：US13755312

申请日：2013-01-31

申请人： Dariusz KOSCIELNIK ,  Marek MISKOWICZ

发明人： Dariusz KOSCIELNIK ,  Marek MISKOWICZ

IPC分类号： H03M1/12

CPC分类号： H03M1/12 ,  G04F10/005 ,  G04F10/105

摘要： Method and apparatus for accumulation of electric charge delivered to the charge input (InQ) in the sampling capacitor (Cn) and in realization of the process of charge redistribution in the array of redistribution (A) by changing states of signals from relevant control outputs and in assignment of relevant values to bits in the digital word by means of the control module (CM). Method is characterized in that after detection of the beginning of the next gate signal (Gx+1), the charge is accumulated in the additional sampling capacitor (CnA), and then the process of charge redistribution is realized and relevant values are assigned to bits of the digital word. When the beginning of the subsequent gate signal (Gx+2) is detected, the next cycle begins and electric charge is accumulated in the sampling capacitor (Cn) again.

摘要翻译： 用于累积传送到采样电容器（Cn）中的电荷输入（InQ）的电荷的方法和装置，以及通过改变来自相关控制输出的信号的状态来实现再分配阵列（A）中的电荷再分配的过程，以及 通过控制模块（CM）将相关值分配给数字字中的位。 方法的特征在于，在检测到下一个栅极信号（Gx + 1）的开始后，电荷累积在附加采样电容器（CnA）中，然后实现电荷再分配的处理，并将相关值分配给位 的数字词。 当检测到后续门信号（Gx + 2）的开始时，下一个周期开始，电荷再次累积在采样电容器（Cn）中。

公开(公告)号：US07990305B2

公开(公告)日：2011-08-02

申请号：US12514066

申请日：2007-11-13

申请人： Ji Man Park ,  Young Soo Park ,  Sung Ik Jun ,  Jong Soo Jang ,  Sung Won Sohn

发明人： Ji Man Park ,  Young Soo Park ,  Sung Ik Jun ,  Jong Soo Jang ,  Sung Won Sohn

IPC分类号： H03M1/82

CPC分类号： H03M1/52 ,  G04F10/105

摘要： A double-integration signal processing apparatus for pulse width amplification and A/D conversion is provided. The current mode double-integration conversion apparatus includes: a current mode double-integration unit which integrates an input current in a predetermined time interval and outputs an integration voltage; a comparison unit which compares the integration voltage output from the current mode double-integration unit with a predetermined comparison voltage V k and outputs an comparison pulse signal; and a gate logic unit which performs a logic operation by using the comparison pulse signal of the comparison unit and an internal signal and outputs an logic operation pulse signal. Accordingly, the current mode double-integration conversion apparatus can be applied to various sensors.

摘要翻译： 提供了用于脉冲宽度放大和A / D转换的双积分信号处理装置。 电流模式双积分转换装置包括：电流模式双积分单元，其以预定时间间隔积分输入电流并输出积分电压; 比较单元，其将来自当前模式双积分单元的积分电压输出与预定比较电压V k进行比较，并输出比较脉冲信号; 以及门逻辑单元，其通过使用比较单元的比较脉冲信号和内部信号来执行逻辑运算，并输出逻辑运算脉冲信号。 因此，电流模式双重积分转换装置可以应用于各种传感器。

公开(公告)号：US20080204046A1

公开(公告)日：2008-08-28

申请号：US12115672

申请日：2008-05-06

申请人： James E. Bartling

发明人： James E. Bartling

IPC分类号： G01R27/26

CPC分类号： G01R27/2605 ,  G01R29/023 ,  G01R31/2884 ,  G01R31/3167 ,  G01R31/31725 ,  G01R31/31727 ,  G04F10/04 ,  G04F10/105

摘要： A time period of an event is determined by charging a known value capacitor from a constant current source during the event. The resultant voltage on the capacitor is proportional to the event time period and may be calculated from the resultant voltage and known capacitance value. Capacitance is measured by charging a capacitor from a constant current source during a known time period. The resultant voltage on the capacitor is proportional to the capacitance thereof and may be calculated from the resultant voltage and known time period. A long time period event may be measured by charging a first capacitor at the start of the event and a second capacitor at the end of the event, while counting clock times therebetween. Delay of an event is done by charging voltages on first and second capacitors at beginning and end of event, while comparing voltages thereon with a reference voltage.

摘要翻译： 在事件期间，通过从恒定电流源对已知值的电容器充电来确定事件的时间段。 电容器上的合成电压与事件时间周期成比例，可以根据合成电压和已知电容值计算。 在已知的时间段内通过从恒定电流源对电容器充电来测量电容。 电容器上的合成电压与其电容成比例，并且可以由所得到的电压和已知的时间周期来计算。 可以通过在事件开始时对第一电容器充电并且在事件结束时对第二电容器进行计数，同时计数它们之间的时钟时间来测量长时间段事件。 通过在事件开始和结束时在第一和第二电容器上充电电压，同时将其上的电压与参考电压进行事件的延迟。

公开(公告)号：US06137749A

公开(公告)日：2000-10-24

申请号：US155670

申请日：1998-12-18

申请人： Richard L. Sumner

发明人： Richard L. Sumner

IPC分类号： G01R29/02 ,  G04F10/04 ,  G04F10/10 ,  G04F8/00 ,  G04F10/00 ,  H03K5/18

CPC分类号： G04F10/105 ,  G01R29/02 ,  G04F10/04

摘要： To measure relatively long time intervals with very high resolution, apparatus and method operate to receive a first pulse and a clock signal that has a known period, synchronize the first pulse with the clock signal, stretch the first synchronized pulse in accordance with a first stretch ratio, produce a first compared output pulse corresponding to the first stretched signal, synchronize the first compared output pulse with the clock signal, generate a first pulse sequence from the first synchronized pulse and the first synchronized compared output pulse, convert times of occurrences of the edges of the first pulse sequence to respective time values, receive a second pulse and generate a second pulse sequence in a manner similar to that of the first pulse sequence, convert times of occurrences of the edges of the second pulse sequence to respective time values, count the elapsed number of clock periods between the first and second synchronized pulses, derive the time interval between the received pulses from the time values, the first and second stretch ratios, the period of the clock and the elapsed number of clock periods, and calibrate the first and second stretch ratios from the time values.

摘要翻译： PCT No.PCT / US97 / 05299 Sec。 371 1998年12月18日第 102（e）日期1998年12月18日PCT 1997年4月1日PCT PCT。 公开号WO97 / 39360 PCT 日期1997年10月23日为了以非常高的分辨率测量相对长的时间间隔，装置和方法操作以接收具有已知周期的第一脉冲和时钟信号，使第一脉冲与时钟信号同步，将第一同步脉冲拉伸 根据第一拉伸比，产生对应于第一拉伸信号的第一比较输出脉冲，使第一比较输出脉冲与时钟信号同步，从第一同步脉冲和第一同步比较输出脉冲产生第一脉冲序列，转换 将第一脉冲序列的边缘的出现次数与相应的时间值相接收，以与第一脉冲序列类似的方式接收第二脉冲并产生第二脉冲序列，转换第二脉冲序列的边缘出现次数 计算相应的时间值，计算第一和第二同步脉冲之间经过的时钟周期数，得出时间 来自时间值的接收脉冲之间的间隔，第一和第二拉伸比，时钟周期和经过的时钟周期数，并根据时间值校准第一和第二拉伸比。

公开(公告)号：US4772843A

公开(公告)日：1988-09-20

申请号：US56140

申请日：1987-05-29

申请人： Takao Asaka ,  Yuji Yamaguchi ,  Hideto Iwaoka

发明人： Takao Asaka ,  Yuji Yamaguchi ,  Hideto Iwaoka

IPC分类号： G04F10/10 ,  H02J15/00

CPC分类号： G04F10/105

摘要： In order to accurately measure time interval Tx from time t.sub.j to time t.sub.k, the pulse widths of a start interpolation pulse and a stop interpolation pulse must be measured accurately. The invention uses two time-to-voltage converters, one for the start interpolation pulse and the other for the stop interpolation pulse, to convert these pulses to corresponding voltage signals to thereby measure the pulse widths. These converters each comprises a high speed circuit which comprises a current switch, a capacitor, a constant current source and a diode. Advantageously, even though the start and stop interpolation pulses occur close to each other, the pulses can be measured accurately. Also, even though the pulses occur at short intervals, the time interval Tx can be measured accurately.

摘要翻译： 为了准确测量从时间tj到时间tk的时间间隔Tx，必须准确测量起始插补脉冲和停止插补脉冲的脉冲宽度。 本发明使用两个时间 - 电压转换器，一个用于起始内插脉冲，另一个用于停止内插脉冲，以将这些脉冲转换成相应的电压信号，从而测量脉冲宽度。 这些转换器各自包括高速电路，其包括电流开关，电容器，恒流源和二极管。 有利地，即使开始和停止插补脉冲彼此接近发生，可以精确地测量脉冲。 此外，即使脉冲以短间隔发生，也可以精确地测量时间间隔Tx。

公开(公告)号：US4613950A

公开(公告)日：1986-09-23

申请号：US534854

申请日：1983-09-22

申请人： Daniel G. Knierim ,  Lee J. Jalovec

发明人： Daniel G. Knierim ,  Lee J. Jalovec

IPC分类号： G04F10/10 ,  G04F7/06

CPC分类号： G04F10/105

摘要： A self-calibrating time interval meter including means for measuring time intervals using a dual-speed ramp technique. The time interval meter operates in a measurement mode to measure time intervals and operates in a calibration mode for calibration adjustments. In measurement mode, the time interval meter utilizes a dual-speed ramp technique to expand the time interval to be measured. A capacitor is rapidly charged by a first constant current source during the time interval to be measured, and is then slowly discharged by a second constant current source. The time required to discharge the capacitor is measured and utilized to compute a measurement of the time interval. In calibration mode, a flip-flop is alternately switched into and out of the circuit to provide two time interval measurements that differ by exactly one clock period of a known clock signal. A microprocessor subtracts the two measurements and compares the difference to the known clock period to determine a calibration error. The microprocessor, through a digital-to-analog converter, varies the current flow of the first constant current source to minimize the calibration error by compensating for drift in the current sources.

摘要翻译： 自校准时间间隔计，包括使用双速坡道技术测量时间间隔的装置。 时间间隔计在测量模式下工作，以测量时间间隔，并在校准模式下进行校准调整。 在测量模式下，时间间隔仪采用双速斜坡技术来扩展要测量的时间间隔。 在测量的时间间隔期间，电容器由第一恒定电流源快速充电，然后由第二恒定电流源缓慢放电。 测量放电电容器所需的时间并用于计算时间间隔的测量。 在校准模式中，触发器被交替地切换到电路中并且从电路输出，以提供两个时间间隔测量值，该测量值与已知时钟信号的恰好一个时钟周期不同。 微处理器减去两个测量值，并将差值与已知时钟周期进行比较，以确定校准误差。 微处理器通过数模转换器改变第一恒流源的电流流动，通过补偿电流源中的漂移来最小化校准误差。

公开(公告)号：US3983481A

公开(公告)日：1976-09-28

申请号：US601907

申请日：1975-08-04

申请人： Ronald Nutt ,  Kelly Milam ,  Charles W. Williams

发明人： Ronald Nutt ,  Kelly Milam ,  Charles W. Williams

IPC分类号： G04F10/10 ,  G04F8/00

CPC分类号： G04F10/105

摘要： In the digital intervalometer disclosed herein, a vernier measurement providing a resolution finer than one clock period is obtained by charging a single capacitor both during the interval between a start signal and a subsequent clock pulse and also during the interval between a clock pulse subsequent to a stop signal and a delayed stop signal. The analog voltage to which the capacitor is charged is converted to a digital value, which digital value is then combined with a clock count accumulated between the stop and start signals to provide a combined digital measurement having a resolution substantially finer than one clock period.

摘要翻译： 在本文公开的数字间隔计中，提供比一个时钟周期更精细的分辨率的游标测量通过在起始信号和后续时钟脉冲之间的间隔期间以及在一个时钟周期之后的时钟脉冲之间的间隔期间对单个电容器充电来获得 停止信号和延迟停止信号。 将电容器充电的模拟电压转换为数字值，然后将该数字值与在停止信号和起始信号之间累积的时钟计数进行组合，以提供具有比一个时钟周期更精细的分辨率的组合数字测量。

公开(公告)号：US09964928B2

公开(公告)日：2018-05-08

申请号：US14817271

申请日：2015-08-04

申请人： DENSO CORPORATION

发明人： Shigenori Yamauchi ,  Takamoto Watanabe ,  Nobuyuki Taguchi

IPC分类号： G04F10/00 ,  G04F10/10

CPC分类号： G04F10/005 ,  G04F10/105

摘要： A first encoding part encodes a reference timing determined by a reference clock by using a delay line. A second encoding part encodes a measurement start timing and a measurement end timing of a measurement period determined by a measurement signal to be measured by also using the delay line. A count part counts the reference clocks included in the measurement period. A fraction calculation part calculates a start fraction number indicating a time difference from the measurement start timing and an immediately-following reference timing and an end fraction number indicating a time difference from the measurement end timing to an immediately-following reference timing, based on the encoding result. The fraction calculation part then calculates a fraction data indicating a difference between the measurement period and a product of the period of the reference timing and the count value of the count part.

公开(公告)号：US09176479B2

公开(公告)日：2015-11-03

申请号：US14161714

申请日：2014-01-23

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsieh-Hung Hsieh ,  Yen-Jen Chen ,  Chewn-Pu Jou

IPC分类号： H03M1/50 ,  G04F10/00 ,  H03L7/085 ,  H03K5/159 ,  G04F10/10

CPC分类号： G04F10/005 ,  G04F10/105 ,  H03K5/159 ,  H03L7/085 ,  H03M1/50

摘要： A time-to-digital converter (TDC) comprises a first delay line including a plurality of first delay cells connected in series, wherein each of the first delay cells include a plurality of first delay units connected in series, wherein each of the first delay units includes a tunable PMOS transistor, a first poly on oxide definition (OD) edge (PODE) transistor, and a pull-up PMOS transistor. The TDC further comprises a second delay line including a plurality of second delay cells connected in series, wherein each of the second delay cells include a plurality of second delay units connected in series, wherein each of the second delay units includes a tunable NMOS transistor, a second PODE transistor, and a pull-down NMOS transistor.

摘要翻译： 时间数字转换器（TDC）包括包括串联连接的多个第一延迟单元的第一延迟线，其中每个第一延迟单元包括串联连接的多个第一延迟单元，其中第一延迟 单元包括可调谐PMOS晶体管，第一多晶氧化物界定（OD）边缘（PODE）晶体管和上拉PMOS晶体管。 TDC还包括包括串联连接的多个第二延迟单元的第二延迟线，其中每个第二延迟单元包括串联连接的多个第二延迟单元，其中每个第二延迟单元包括可调NMOS晶体管， 第二PODE晶体管和下拉式NMOS晶体管。