公开(公告)号：US20180081761A1

公开(公告)日：2018-03-22

申请号：US15826338

申请日：2017-11-29

申请人： International Business Machines Corporation

发明人： Jesse P. Arroyo ,  Ellen M. Bauman ,  Timothy R. Block ,  Christoper J. Engel ,  Kaveh Naderi ,  Gregory M. Nordstrom ,  Harald Pross ,  Thomas R. Sand

IPC分类号： G06F11/14 ,  G06F13/28 ,  G06F11/30 ,  G06F11/22 ,  G06F13/42 ,  G06F11/07 ,  G06F13/40

CPC分类号： G06F11/1423 ,  G06F11/0793 ,  G06F11/221 ,  G06F11/2221 ,  G06F11/2247 ,  G06F11/3027 ,  G06F11/3041 ,  G06F11/3051 ,  G06F13/287 ,  G06F13/4022 ,  G06F13/4282

摘要： A method, system and computer program product are provided for detecting state and sparing of optical Peripheral Component Interconnect Express (PCI-Express or PCIE) cable channels attached to an IO drawer. System firmware is provided for implementing health check functions and state detection and sparing functions. One or more optical cables are connected between a host bridge and an PCIE enclosure, each optical cable includes one or more spare optical channels. An identified failed optical channel is rerouted to the spare optical channel.

公开(公告)号：US09858150B2

公开(公告)日：2018-01-02

申请号：US14750311

申请日：2015-06-25

申请人： Cisco Technology, Inc.

发明人： Ali Sajassi ,  Jose A. Liste ,  Patrice Brissette ,  Mei Zhang ,  Vi Vu

IPC分类号： H04W72/04 ,  G06F11/14 ,  H04L12/707 ,  H04L12/741 ,  H04L12/703

CPC分类号： G06F11/1423 ,  H04L45/22 ,  H04L45/28 ,  H04L45/745

摘要： Systems, methods, and computer-readable media for fast convergence for virtual ethernet segments in EVPN and PBB-EVPN networks are disclosed. A first provider edge (PE) device can receive one or more advertising messages corresponding to one or more virtual ethernet segments, wherein each of the one or more advertising messages can include a port identifier. The first PE device maintains a table including the one or more virtual ethernet segments and the corresponding port identifier. The first PE device can receive a failure message from a second PE device that identifies a first port on the second PE device, and identifies, based on the table, at least one affected virtual ethernet segment that is associated with the first port. The first PE device can remove any routes that are associated with the at least one affected virtual ethernet segment and trigger mass designated-forwarding election for impacted virtual ethernet segments.

公开(公告)号：US09852034B2

公开(公告)日：2017-12-26

申请号：US14223237

申请日：2014-03-24

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Shay H. Akirav ,  Oren Bar ,  Roman Barsky ,  Itay Maoz

IPC分类号： G06F11/20 ,  G06F11/14

CPC分类号： G06F11/2007 ,  G06F11/1423 ,  G06F11/2089 ,  G06F11/2092

摘要： For efficient high availability for a multi-node cluster using a processor device in a computing environment, using duplicate, standby host-bus adaptors (HBAs) for alternate nodes with respect to a node with the duplicate, standby HBAs using duplicate credentials of active HBAs of the node for shutting down the node, taking an active HBA of the node offline, and/or activating one of the alternate nodes.

公开(公告)号：US09829945B2

公开(公告)日：2017-11-28

申请号：US14980209

申请日：2015-12-28

申请人： VIA TECHNOLOGIES, INC.

发明人： G. Glenn Henry ,  Darius D. Gaskins

IPC分类号： G06F1/26 ,  G06F1/32 ,  G06F1/24 ,  G06F13/36 ,  G06F15/163 ,  G06F9/30 ,  G06F9/50 ,  G06F9/445 ,  G06F15/82 ,  G06F11/36 ,  G06F11/14

CPC分类号： G06F1/26 ,  G06F1/24 ,  G06F1/3243 ,  G06F1/3287 ,  G06F9/30076 ,  G06F9/30083 ,  G06F9/44505 ,  G06F9/5094 ,  G06F11/1423 ,  G06F11/3664 ,  G06F13/36 ,  G06F15/163 ,  G06F15/82 ,  Y02D10/14 ,  Y02D10/22

摘要： A multi-die package for a microprocessor provides a power management synchronization system. The package has a plurality of dies. Each die has a plurality of cores, including a single master core. A plurality of sideband non-system-bus inter-die communication wires communicatively couple the dies to each other for a purpose of synchronizing power management. The master core of each die is configured to use one and only one of the inter-die communication wires to transmit power management synchronization messages to each of the other master cores. The master core of each die is also configured to receive power management synchronization messages from each of the other master cores via one or more inter-die communication wires. The cores use this system of inter-die communication wires to synchronize management of resources that affect both the performance and power consumption of the cores.

公开(公告)号：US20170091365A1

公开(公告)日：2017-03-30

申请号：US14864156

申请日：2015-09-24

申请人： QUALCOMM Incorporated

发明人： Sreedhar Gudala ,  Kumar Gopal Rao ,  Francis Page ,  Pak Kin Wong ,  Sunil Kumar

IPC分类号： G06F17/50

CPC分类号： G06F17/5072 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/1423 ,  G06F12/0646 ,  G06F15/7807 ,  G06F17/5045 ,  G06F17/5068 ,  G06F17/5077 ,  G06F2212/2542 ,  G06F2213/0038 ,  G06F2217/66

摘要： Circuits and methods for a system on a chip having non-uniform channel spacings is provided. In an example, a chip is provided that includes a first functional block having a rectilinear shape, the first processing unit having on a side a plurality of channel spacings. A first channel spacing of the plurality of channel spacings is positioned in contact with the side and a second functional block. A second channel spacing of the plurality of channel spacings is positioned in contact with the side and the second functional block. The width of the second channel spacing is non-uniform with the width of the first channel spacing.

公开(公告)号：US20170090610A1

公开(公告)日：2017-03-30

申请号：US14868804

申请日：2015-09-29

申请人： SYNAPTICS INCORPORATED

发明人： Petr SHEPELEV ,  Eric Scott BOHANNON ,  Kasra KHAZENI

IPC分类号： G06F3/044 ,  G06F3/041

CPC分类号： G06F3/044 ,  G06F3/03547 ,  G06F3/0416 ,  G06F3/0418 ,  G06F11/00 ,  G06F11/002 ,  G06F11/004 ,  G06F11/006 ,  G06F11/008 ,  G06F11/142 ,  G06F11/1423 ,  G06F11/1428 ,  G06F2201/81 ,  G06F2203/04101

摘要： This disclosure generally provides an input device that includes a matrix sensor that includes a plurality of sensor electrodes arranged in rows on a common surface or plane. The input device may include a plurality of sensor modules coupled to the sensor electrodes that measure capacitive sensing signals corresponding to the electrodes. Instead of measuring sensor electrodes that are in the same column, the embodiments herein simultaneously measure capacitive sensing signals on at least two sensor electrodes that are in the same row. In one example, the sensor electrodes in the row being measured are spaced the same distance from a side of a substrate coupling the electrodes to the sensor modules and may have approximately the same electrical time constant.

公开(公告)号：US20160209897A1

公开(公告)日：2016-07-21

申请号：US14980209

申请日：2015-12-28

申请人： VIA TECHNOLOGIES, INC.

发明人： G. GLENN HENRY ,  DARIUS D. GASKINS

IPC分类号： G06F1/26

CPC分类号： G06F1/26 ,  G06F1/24 ,  G06F1/3243 ,  G06F1/3287 ,  G06F9/30076 ,  G06F9/30083 ,  G06F9/44505 ,  G06F9/5094 ,  G06F11/1423 ,  G06F11/3664 ,  G06F13/36 ,  G06F15/163 ,  G06F15/82 ,  Y02D10/14 ,  Y02D10/22

摘要： A multi-die package for a microprocessor provides a power management synchronization system. The package has a plurality of dies. Each die has a plurality of cores, including a single master core. A plurality of sideband non-system-bus inter-die communication wires communicatively couple the dies to each other for a purpose of synchronizing power management. The master core of each die is configured to use one and only one of the inter-die communication wires to transmit power management synchronization messages to each of the other master cores. The master core of each die is also configured to receive power management synchronization messages from each of the other master cores via one or more inter-die communication wires. The cores use this system of inter-die communication wires to synchronize management of resources that affect both the performance and power consumption of the cores.

摘要翻译： 用于微处理器的多管芯封装提供电源管理同步系统。 该封装具有多个管芯。 每个管芯具有多个芯，包括单个母芯。 为了同步电源管理的目的，多个边带非系统总线芯片间通信线通信地将管芯彼此连接。 每个管芯的主核心被配置为使用芯片间通信线中的一个且仅一个将功率管理同步消息发送到每个其他主核。 每个裸片的主核心还被配置为经由一个或多个芯片间通信线路从每个其他主核心接收功率管理同步消息。 内核使用这种芯片间通信线系统来同步影响内核性能和功耗的资源管理。

公开(公告)号：US09342407B2

公开(公告)日：2016-05-17

申请号：US13942761

申请日：2013-07-16

申请人： FUJITSU LIMITED

发明人： Yasuhiro Ogasawara ,  Shigeru Akiyama ,  Tsukasa Matsuda ,  Hitoshi Kosokabe

IPC分类号： G06F11/00 ,  G06F11/14 ,  G06F11/07

CPC分类号： G06F11/1423 ,  G06F11/0721 ,  G06F11/0793 ,  G06F11/142

摘要： A storage control apparatus includes a detection unit that detects a soft error of a memory for setting information included in a programmable logic circuit, when the soft error is detected, a communication control unit that changes a state of a communication path between the communication device and an upper device to a busy state, and a recovery processing unit that performs recovery processing of the memory for setting information of the programmable logic circuit, thereby efficiently resolving a soft error of the programmable logic circuit.

摘要翻译： 存储控制装置包括：检测单元，其检测用于设置可编程逻辑电路中包含的信息的存储器的软错误，当检测到软错误时，改变通信设备与通信设备之间的通信路径的状态的通信控制单元; 上位机到繁忙状态，以及恢复处理单元，执行用于设置可编程逻辑电路的信息的存储器的恢复处理，从而有效地解决可编程逻辑电路的软错误。

公开(公告)号：US09244759B2

公开(公告)日：2016-01-26

申请号：US14148348

申请日：2014-01-06

申请人： International Business Machines Corporation

发明人： Matthias A. Blumrich ,  Paul W. Coteus ,  Dong Chen ,  Alan Gara ,  Mark E. Giampapa ,  Philip Heidelberger ,  Dirk Hoenicke ,  Todd Takken ,  Burkhard Steinmacher-Burow ,  Pavlos M. Vranas

IPC分类号： G06F15/16 ,  G06F11/08 ,  H03M13/09 ,  G06F9/46 ,  G06F11/14 ,  H04L1/00 ,  H04L1/16

CPC分类号： H04L1/08 ,  G06F9/46 ,  G06F11/08 ,  G06F11/1423 ,  H03M13/09 ,  H04L1/0061 ,  H04L1/1607 ,  H04L1/1867 ,  H04L2001/0093 ,  H04L2001/0097

摘要： An error-recovery method to enable error-free message transfer between nodes of a computer network. A first node of the network sends a packet to a second node of the network over a link between the nodes, and the first node keeps a copy of the packet on a sending end of the link until the first node receives acknowledgment from the second node that the packet was received without error. The second node tests the packet to determine if the packet is error free. If the packet is not error free, the second node sets a flag to mark the packet as corrupt. The second node returns acknowledgement to the first node specifying whether the packet was received with or without error. When the packet is received with error, the link is returned to a known state and the packet is sent again to the second node.

摘要翻译： 一种错误恢复方法，可在计算机网络的节点之间实现无错误的消息传输。 网络的第一节点通过节点之间的链路将分组发送到网络的第二节点，并且第一节点在链路的发送端保持分组的副本，直到第一节点从第二节点接收到确认 该数据包被收到没有错误。 第二个节点测试数据包以确定数据包是否无错误。 如果数据包不是无错误的，则第二个节点设置一个标志，以将数据包标记为已损坏。 第二个节点向第一个节点返回确认，指定该数据包是否被接收到有或没有错误。 当分组被接收到错误时，链路返回到已知状态，并且分组被再次发送到第二节点。

公开(公告)号：US09141139B2

公开(公告)日：2015-09-22

申请号：US14507408

申请日：2014-10-06

申请人： Arnouse Digital Devices Corporation

发明人： Michael Arnouse

IPC分类号： H05K7/14 ,  H05K7/18 ,  G06F1/16 ,  G06F11/14 ,  H05K7/20 ,  H05K9/00

CPC分类号： H05K7/1488 ,  G06F1/1628 ,  G06F11/1423 ,  G06F11/2023 ,  H05K7/1489 ,  H05K7/1492 ,  H05K7/20709 ,  H05K7/20736 ,  H05K9/0007

摘要： A portable and mobile deployable data center (DDC) is disclosed, which includes various components that enables the DDC to have multiple functions including, computing, data storage and retrieval, communications and routing. A DDC includes a rugged case that suitable for harsh environments, an interconnection mechanism, a plurality of hot swappable readers, a plurality of hot swappable portable computing devices, and a plurality of hot swappable power supplies.

摘要翻译： 公开了一种便携式和移动可部署数据中心（DDC），其中包括使DDC具有多种功能的各种组件，包括计算，数据存储和检索，通信和路由。 DDC包括适用于恶劣环境的坚固外壳，互连机构，多个可热插拔的读取器，多个热插拔便携式计算设备和多个热插拔电源。