摘要:
There is provided a method of detecting a block sync signal in which a sync signal and code sequence can be distinguished from each other to recognize the head of a block composed of a plurality of code words at the time of data reading or reception. A sync word detector (10) is supplied with a window signal Sync_window generated based on a parity OK signal supplied from a parity check circuit (12) and indicating a period between the sync word included in signal read from the medium (1) and the ID information, and detects the sync word as to a bit string detected by a PRML Viterbi detector (6) with the use of the Sync_window signal.
摘要:
The present invention is directed to a digital data error correcting apparatus in which an error correction capability can be considerably improved in a digital signal transmission system when a digital modulation code is decoded. In a minimum distance decoding method, when a plurality of reference samples having equal minimum Hamming distance relative to a digital modulation code exist, on the basis of the probability that an error will occur in the respective bits, respective bits are weighted, and a reference sample having the minimum distance from the input sample is selected from a plurality of reference samples to thereby correct an error. Further, the present invention is directed to a digital sync. detection apparatus in which an ability for detecting a sync. pattern can be considerably improved without degrading the probability that a pseudo-sync. signal will occur. A detection interval of a predetermined cycle is set in a sync. pattern of a predetermined cycle whose Hamming distance between it and a digital modulation code is larger than k by a detection window signal generator circuit (40), and (k-1) bit error of the sync. pattern can be corrected during this detection interval.
摘要:
A clock regeneration circuit for use in data reproducing apparatus which reproduces and demodulates digital data that has been recorded on a magnetic medium in accordance with different types of modulation having different recording densities, such as biphase-mark modulation and 8-10 modulation, respectively. The clock regeneration circuit includes a phase locked loop for regenerating a clock signal from the clock component included in the reproduced data and comprises a switchable voltage controlled oscillator for selecting the frequency of a reference signal generated thereby in correspondence with the type of modulation which had been used for recording. Also included in the clock regeneration circuit is a phase comparator and a switchable low pass filter for supplying the output of the phase comparator to the voltage controlled oscillator, the time constant of the filter being selected in correspondence with the type of modulation that was used for recording. A control circuit controls the frequency selection of the voltage controlled oscillator and the time constant selection of the low pass filter in accordance with data signals supplied thereto.
摘要:
A system of encoding an original binary digital video signal comprised of a plurality of first 8-bit words having an absolute value and a digital sum variation, to produce an encoded binary digital video signal, converts each first 8-bit word into a second 8-bit word also having an absolute value and a digital sum variation such that, with respect to predetermined groups of correlative first 8-bit words, that is, first 8-bit words having absolute values which are close to each other, second 8-bit words corresponding to the first 8-bit words in each respective group have the same digital sum variation; and then inverts every alternate m second 8-bit words, where m=1, 2, 3 . . . , to form the encoded binary digital video signal with substantially reduced DC content while maintaining the same recording bit rate.
摘要:
The present invention is relative with a method for recording further data on a recording medium on which there re pre-recorded data obtained on modulating M-bit data to N-bit data, where M
摘要:
A data conversion method, wherein a sequence of first r-bit datawords is divided into groups of x bits where x is the least common multiple of r and m, an arbitrary first dataword selected from x/r groups of first datawords is divided into x/m, an m-bit second dataword is formed by appending r/(x/m)-bit data, obtained by dividing the first dataword into x/m, to the LSB or MSB side of one or other of the non-divided first datawords, and the word-converted m-bit second dataword is converted to an n-bit codeword (m
摘要:
A data conversion method from m bits of data words into n bits of code words in recording or transmission, in which n is larger than m. A number of bit "0" arranged between one bit "1" and a next bit "1" is restricted to at most 4 in a code string of each code word, and a pair of groups of the n bits of code words corresponding to CDSs (code word digital sum) of two codes +1 and -1 are allowed to correspond to the m bits of data words. One of the two codes +1 and -1 is selectively used according to a DSV (digital sum variation) control signal to convert the m bits of data word into the n bits of code word. A pilot signal formation method using the data conversion method for obtaining a tracking error signal in a magnetic recording and reproducing apparatus, and a rotary magnetic head device for use in a magnetic recording and reproducing apparatus are also disclosed.
摘要:
Digital data recording/reproducing apparatus which uses a simple coding scheme for DC channel codes of the form M/N where M=N-1 and M and N are positive integers.
摘要:
A method and apparatus are provided for encoding successive n-bit information words into successive m-bit code words wherein m>n. Each n-bit information word is assigned with a respective set of m-bit code words. Each set of code words is comprised of either two or four words. The words in each two-word set have zero disparity, and their first bits are of opposite logical sets. In the four-word sets, two words have positive disparity and their first bits are of opposite logical sense, and the other two words have negative disparity and their first bits also are of opposite logical sense. The particular m-bit code word that is selected from the set associated with the n-bit word commences with the same bit as the last bit of the immeditely preceding code word, and the selected code word exhibits a disparity that, when combined with the digital sum variation of the preceding encoded code words, reduces the overall digital sum variation toward zero.
摘要:
Main data and a sub code supplied from input terminals 1a and 1b are processed by encoders 2a and 2b, respectively. The encoded main data and sub code are supplied to an EFM modulating portion 4 through a multiplexer 3. The EFM modulating portion 4 is composed of an 8-14 converting portion 5a and a connection bit selecting portion 5b. For the EFM modulating portion 4, a DSV normal controlling portion 7a and a DSV special controlling portion 7b are disposed. In only a predetermined region designated on an optical disc, the DSV special control is performed. The DSV special control causes the absolute value of the DSV to increase so that data will be prevented from being normally reproduced. The normal control causes the absolute value of the DSV to converge at 0. When data is reproduced from the optical disc, if the reproduction state of the predetermined region is abnormal, it is determined that the disc is an original disc. An encryption key can be recorded in the predetermined region.