公开(公告)号：US20170323860A1

公开(公告)日：2017-11-09

申请号：US15287202

申请日：2016-10-06

申请人： Qorvo US, Inc.

发明人： Julio C. Costa ,  George Maxim ,  Dirk Robert Walter Leipold ,  Baker Scott

IPC分类号： H01L23/64 ,  H01L23/31 ,  H01L23/18 ,  H01L23/29 ,  H01L23/00 ,  H01L23/66

CPC分类号： H01L21/565 ,  H01L21/31051 ,  H01L23/18 ,  H01L23/293 ,  H01L23/295 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/645 ,  H01L23/66 ,  H01L24/16 ,  H01L24/81 ,  H01L28/10 ,  H01L2224/16225 ,  H01L2924/01012 ,  H01L2924/0103 ,  H01L2924/07025 ,  H01L2924/186 ,  H01L2924/19042

摘要： The present disclosure relates to a microelectronics package with an inductive element and a magnetically enhanced mold compound component, and a process for making the same. The disclosed microelectronics package includes a module substrate, a thinned flip-chip die with an upper surface that includes a first surface portion and a second surface portion surrounding the first surface portion, the magnetically enhanced mold compound component, and a mold compound component. The thinned flip-chip die is attached to the module substrate and includes a device layer with an inductive element embedded therein. Herein, the inductive element is underlying the first surface portion and not underlying the second surface portion. The magnetically enhanced mold compound component is formed over the first surface portion. The mold compound component is formed over the second surface portion, not over the first surface portion, and surrounding the magnetically enhanced mold compound component.

公开(公告)号：US09704768B2

公开(公告)日：2017-07-11

申请号：US15021836

申请日：2013-12-17

申请人： Mitsubishi Electric Corporation

发明人： Yasuto Kawaguchi

IPC分类号： H01L23/18 ,  H01L23/48 ,  H01L23/00 ,  H01L23/373 ,  H01L23/552 ,  H01L23/24 ,  H01L23/31 ,  H01L23/29 ,  H01L23/492 ,  H01L23/498

CPC分类号： H01L23/18 ,  H01L23/24 ,  H01L23/298 ,  H01L23/3135 ,  H01L23/3735 ,  H01L23/48 ,  H01L23/492 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/552 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/29101 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/43 ,  H01L2224/85399 ,  H01L2224/05599

摘要： It is an object of the present invention to achieve reduced faults in manufacturing steps and increased reliability by relieving electric field strength of a surface of a power semiconductor chip. The present invention includes: a power semiconductor chip disposed on an insulating substrate; wiring connected to a surface conductor pattern in an element region of the power semiconductor chip; a low dielectric constant film disposed between the wiring and the peripheral region; and a sealing material formed so as to cover the insulating substrate, the power semiconductor chip, the wiring, and the low dielectric constant film. The low dielectric constant film has a dielectric constant lower than that of the sealing material.

公开(公告)号：US09698088B2

公开(公告)日：2017-07-04

申请号：US15135364

申请日：2016-04-21

申请人： Samsung Electronics Co., Ltd.

发明人： Heungkyu Kwon ,  Kang Joon Lee ,  JaeWook Yoo ,  Su-Chang Lee

IPC分类号： H01L23/498 ,  H01L23/488 ,  H01L23/16 ,  H01L23/18 ,  H01L25/065 ,  H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L23/13

CPC分类号： H01L23/49811 ,  H01L23/13 ,  H01L23/16 ,  H01L23/18 ,  H01L23/3157 ,  H01L23/488 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/13541 ,  H01L2224/13561 ,  H01L2224/13583 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/13616 ,  H01L2224/13624 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13649 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/1366 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13669 ,  H01L2224/1367 ,  H01L2224/13671 ,  H01L2224/13672 ,  H01L2224/13679 ,  H01L2224/1368 ,  H01L2224/13681 ,  H01L2224/13684 ,  H01L2224/1401 ,  H01L2224/1403 ,  H01L2224/14135 ,  H01L2224/14136 ,  H01L2224/14181 ,  H01L2224/14505 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/1712 ,  H01L2224/17181 ,  H01L2224/175 ,  H01L2224/1751 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1082 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15787 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/206 ,  H01L2924/014 ,  H01L2224/05552

摘要： Semiconductor packages include a first substrate including a central portion and a peripheral portion, at least one first central connection member attached to the central portion of the first substrate, and at least one first peripheral connection member attached to the peripheral portion of the first substrate. The first central connection member includes a first supporter and a first fusion conductive layer surrounding the first supporter.

公开(公告)号：US20170186719A1

公开(公告)日：2017-06-29

申请号：US15368755

申请日：2016-12-05

申请人： FUJITSU LIMITED

发明人： Hidehiko Kira ,  Naoaki Nakamura ,  TAKASHI KUBOTA

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L21/56 ,  H01L25/00 ,  H01L21/48 ,  H01L23/498 ,  H01L23/18

CPC分类号： H01L24/32 ,  H01L21/4803 ,  H01L21/563 ,  H01L23/13 ,  H01L23/18 ,  H01L23/49811 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/26145 ,  H01L2224/26175 ,  H01L2224/2919 ,  H01L2224/32058 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/83191 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/10156 ,  H01L2924/15151 ,  H01L2924/1816 ,  H01L2924/18301 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01049 ,  H01L2924/01083 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/01029

摘要： A semiconductor device includes a first substrate, a second substrate, a connection portion, and resin. The second substrate faces the first substrate, and has a recess at a position corresponding to an edge portion of the first substrate. The connection portion is interposed between the first substrate and the second substrate, and electrically connects the first substrate and the second substrate. Resin is disposed to remain between the first substrate and the second substrate, and covers the connection portion. Part of the resin is present in the recess of the second substrate. The recess serves as a resin reservoir for resin that is caused to flow upon bonding, and prevents the resin from flowing along a side surface of the first substrate to a back surface thereof, thereby preventing contamination by the resin.

公开(公告)号：US20170154792A1

公开(公告)日：2017-06-01

申请号：US15164228

申请日：2016-05-25

申请人： SAMSUNG DISPLAY CO., LTD.

发明人： Jeong Hun GO ,  Yeon Sun NA ,  Jeong Mo NAM ,  Hyun Seok HONG

IPC分类号： H01L21/54 ,  H01L23/498 ,  H01L23/18 ,  H01L21/48 ,  H01L21/52

CPC分类号： H01L21/54 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/52 ,  H01L23/18 ,  H01L23/49811 ,  H01L23/49838

摘要： A method of mounting an electronic device includes: preparing a printed circuit board including a base substrate, connection pads disposed on the base substrate and spaced apart from each other, and a solder resist including contact holes exposing a portion of the connection pads; disposing preliminary bumps on the exposed portion of the connection pads via the contact holes; disposing under-fill patterns in areas between the preliminary bumps on the solder resist; disposing an electronic device on the preliminary bumps and the under-fill patterns; and mounting the electronic device onto the printed circuit board by reflowing the preliminary bumps and the under-fill patterns. The disposing of the under-fill patterns may include: providing an under-fill film including a base film having openings spaced apart from each other, and the under-fill patterns disposed within the openings; applying pressure to the under-fill film; and removing the base film from the under-fill film.

公开(公告)号：US20170040238A1

公开(公告)日：2017-02-09

申请号：US15296995

申请日：2016-10-18

申请人： Intel Corporation

发明人： Yoshihiro Tomita ,  Jiro Kubota ,  Omkar G. Karhade ,  Shawna M. Liff ,  Kinya Ichikawa ,  Nitin A. Deshpande

IPC分类号： H01L23/18 ,  H01L23/498 ,  H01L23/538 ,  H01L21/56 ,  H01L25/10

CPC分类号： H01L23/18 ,  H01L21/566 ,  H01L21/568 ,  H01L23/16 ,  H01L23/3135 ,  H01L23/481 ,  H01L23/49805 ,  H01L23/49838 ,  H01L23/5226 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15192 ,  H01L2924/15313 ,  H01L2924/18161 ,  H01L2924/3511

摘要： A microelectronic package may be formed with a picture frame stiffener surrounding a microelectronic die for reducing warpage of the microelectronic package. An embodiment for fabricating such a microelectronic package may include forming a microelectronic die having an active surface and an opposing back surface, wherein the microelectronic die active surface may be attached to a microelectronic substrate. A picture frame stiffener having an opening therethrough may be formed and placed on a release film, wherein a mold material may be deposited over the picture frame stiffener and the release film. The microelectronic die may be inserted into the mold material, wherein at least a portion of the microelectronic die extends into the picture frame opening. The release film may be removed and a portion of the mold material extending over the microelectronic die back surface may then be removed to form the microelectronic package.

摘要翻译： 微电子封装可以形成有围绕微电子管芯的图框加强件，以减少微电子封装的翘曲。 用于制造这种微电子封装的实施例可以包括形成具有有源表面和相对背面的微电子管芯，其中微电子管芯有源表面可以附接到微电子衬底。 可以形成具有穿过其中的开口的相框加强件并将其放置在脱模膜上，其中模塑材料可以沉积在画框加强件和释放膜上。 微电子管芯可以插入模具材料中，其中微电子管芯的至少一部分延伸到相框开口中。 可以去除剥离膜，然后可以移除在微电子管芯背表面上延伸的一部分模具材料以形成微电子封装。

公开(公告)号：US20160372426A1

公开(公告)日：2016-12-22

申请号：US15251209

申请日：2016-08-30

申请人： STMICROELECTRONICS PTE LTD

发明人： Jing-En Luan

IPC分类号： H01L23/00 ,  H01L23/18 ,  H01L21/78 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/367 ,  H01L23/31

CPC分类号： H01L23/562 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/4871 ,  H01L21/4882 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/78 ,  H01L23/18 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/3672 ,  H01L23/3675 ,  H01L23/373 ,  H01L23/3737 ,  H01L23/498 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16235 ,  H01L2224/18 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2924/3511

摘要： A method includes forming a molded panel that includes a number of integrated circuits, fan-out components and stiffeners embedded in an encapsulation material. A redistribution layer is formed over the integrated circuits and the fan-out components. The redistribution layer is electrically coupled to contacts of the integrated circuits. The molded panel is singulated to form electronic devices. Each electronic device each an integrated circuit that is separated from a fan-out component by a portion of the encapsulation material and a stiffener separated from the fan-out component by a second portion of the encapsulation material.

摘要翻译： 一种方法包括形成包括多个集成电路，嵌入在封装材料中的扇出部件和加强件的模制板。 在集成电路和扇出组件上形成再分配层。 再分配层电耦合到集成电路的触点。 将模制板分割成电子装置。 每个电子设备各自具有通过封装材料的一部分与扇出部件分离的集成电路，以及通过封装材料的第二部分与扇出部件分离的加强件。

公开(公告)号：US20160372339A1

公开(公告)日：2016-12-22

申请号：US15256801

申请日：2016-09-06

申请人： FREESCALE SEMICONDUCTOR, INC.

发明人： TRENT S. UEHLING

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L23/29

CPC分类号： H01L21/56 ,  H01L23/18 ,  H01L23/28 ,  H01L23/29 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/186 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

摘要： A packaged electronic device includes a package substrate, an electronic component die mounted to the package substrate, and an encapsulant bonded to a portion of the package substrate at a catechol group adhesion promoted interface that includes benzene rings bonded with the package substrate and the encapsulant.

摘要翻译： 封装的电子器件包括封装衬底，安装到封装衬底的电子部件裸片，以及封闭衬底，该封装材料在包含与封装衬底和密封剂结合的苯环的儿茶酚基团粘合促进界面处结合到封装衬底的一部分。

公开(公告)号：US20160247736A1

公开(公告)日：2016-08-25

申请号：US14828256

申请日：2015-08-17

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Yoshimitsu KUWAHARA

IPC分类号： H01L23/053 ,  H01L25/07 ,  H01L23/367 ,  H01L23/18 ,  H01L23/08

CPC分类号： H01L23/053 ,  H01L23/02 ,  H01L23/051 ,  H01L23/08 ,  H01L23/18 ,  H01L23/3675 ,  H01L23/562 ,  H01L23/62 ,  H01L24/72 ,  H01L25/072 ,  H01L25/117 ,  H01L2224/06181 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/13055 ,  H01L2924/13091

摘要： A semiconductor device includes a housing with a fragile portion. The fragile unit or portion has a resistance to a pressure or a melting point temperature that is lower than other portions of the housing. The semiconductor device further includes a plurality of semiconductor elements disposed inside the housing. Each semiconductor element includes a semiconductor element region having a first surface and a second surface opposite to the first surface. A first electrode is provided on the first surface and a second electrode is provided on the second surface.

摘要翻译： 半导体器件包括具有脆弱部分的壳体。 脆性单元或部分具有低于壳体的其它部分的压力或熔点温度的阻力。 半导体器件还包括设置在壳体内的多个半导体元件。 每个半导体元件包括具有第一表面和与第一表面相对的第二表面的半导体元件区域。 第一电极设置在第一表面上，第二电极设置在第二表面上。

公开(公告)号：US09263358B2

公开(公告)日：2016-02-16

申请号：US14331779

申请日：2014-07-15

申请人： Progress Rail Services Corporation

发明人： Mark Joseph Bartonek

IPC分类号： H01L23/16 ,  H05K5/06 ,  H05K5/02 ,  H01L23/15 ,  H01L23/18

CPC分类号： H01L23/15 ,  H01L23/18 ,  H01L2924/0002 ,  H05K5/0213 ,  H05K5/062 ,  H01L2924/00

摘要： A memory module is disclosed. The memory module may have an insulator. The memory module may also have a device disposed within the insulator. The memory module may further have a filler disposed on the device. The filler may be configured to expand and flow into one or more cracks in the insulator, when the filler is subjected to a threshold temperature.

摘要翻译： 公开了一种存储器模块。 存储器模块可以具有绝缘体。 存储器模块还可以具有设置在绝缘体内的器件。 存储器模块还可以具有设置在设备上的填充物。 当填料经受阈值温度时，填料可被构造成膨胀并流入绝缘体中的一个或多个裂纹。