公开(公告)号：US20160133736A1

公开(公告)日：2016-05-12

申请号：US14945936

申请日：2015-11-19

申请人： STMICROELECTRONICS, INC.

发明人： Pierre Morin ,  John Hongguang Zhang

IPC分类号： H01L29/772 ,  H01L29/06 ,  H01L29/16

CPC分类号： H01L29/7722 ,  H01L21/0475 ,  H01L21/0485 ,  H01L21/308 ,  H01L27/0225 ,  H01L27/14679 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0843 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/66068 ,  H01L29/66416

摘要： A static induction transistor is formed on a silicon carbide substrate doped with a first conductivity type. First recessed regions in a top surface of the silicon carbide substrate are filled with epitaxially grown gate regions in situ doped with a second conductivity type. Epitaxially grown channel regions in situ doped with the first conductivity type are positioned between adjacent epitaxial gate regions. Epitaxially grown source regions in situ doped with the first conductivity type are positioned on the epitaxial channel regions. The bottom surface of the silicon carbide substrate includes second recessed regions vertically aligned with the channel regions and silicided to support formation of the drain contact. The top surfaces of the source regions are silicided to support formation of the source contact. A gate lead is epitaxially grown and electrically coupled to the gate regions, with the gate lead silicided to support formation of the gate contact.

摘要翻译： 在掺杂有第一导电类型的碳化硅衬底上形成静电感应晶体管。 在碳化硅衬底的顶表面中的第一凹陷区域填充有原位掺杂有第二导电类型的外延生长栅极区域。 原位掺杂有第一导电类型的外延生长沟道区位于相邻的外延栅区之间。 原位掺杂有第一导电类型的外延生长的源极区位于外延沟道区上。 碳化硅衬底的底表面包括与沟道区垂直对准的第二凹陷区域并硅​​化以支持漏极接触的形成。 源区的顶表面被硅化以支持源接触的形成。 栅极引线外延生长并电耦合到栅极区域，栅极引线硅化以支持栅极接触的形成。

公开(公告)号：US4506281A

公开(公告)日：1985-03-19

申请号：US295816

申请日：1981-08-24

申请人： Jun-ichi Nishizawa ,  Tadahiro Ohmi

发明人： Jun-ichi Nishizawa ,  Tadahiro Ohmi

IPC分类号： H01L29/80 ,  H01L21/314 ,  H01L21/8222 ,  H01L21/8226 ,  H01L21/8252 ,  H01L27/02 ,  H01L27/06 ,  H01L27/082 ,  H01L29/739 ,  H03K19/094 ,  H01J27/02

CPC分类号： H01L21/8252 ,  H01L21/3144 ,  H01L27/0225 ,  H01L29/739

摘要： This invention relates to a GaAs semiconductor device and more particularly to a GaAs static induction transistor integrated circuit which operates at a very high speed. Gallium arsenide has the features that the mobility of electrons is higher than that in silicon and that the band structure has a direct gap. The mobility of electrons in gallium arsenide is several times as high as that in silicon; this is very suitable for the manufacture of a semiconductor device of high-speed operation. Further, since gallium arsenide has the direct gap, the electron-hole recombination rate is high and the minority carrier storage effect is extremely small. By causing the recombination at the direct gap, light emission can be achieved more efficiently. Accordingly, a light receiving and emitting semiconductor device can be obtained through the use of gallium arsenide. As the propagation velocity of light is very fast, signal transfer between semiconductor chips can be achieved at ultra-high speed. By combining this with the high mobility of electrons in gallium arsenide, an ultra-high speed logical operation device can be realized.

摘要翻译： 本发明涉及一种GaAs半导体器件，更具体地说，涉及以非常高的速度工作的GaAs静态感应晶体管集成电路。 砷化镓具有电子迁移率高于硅中的迁移率，并且带结构具有直接间隙的特征。 砷化镓中电子的迁移率是硅中的几倍; 这非常适合制造高速运行的半导体器件。 此外，由于砷化镓具有直接间隙，电子 - 空穴复合率高，少数载流子的保存效果极小。 通过在直接间隙引起复合，可以更有效地实现发光。 因此，可以通过使用砷化镓来获得光接收和发射半导体器件。 由于光的传播速度非常快，半导体芯片之间的信号传输可以以超高速度实现。 通过将其与砷化镓中的电子的高迁移率组合，可以实现超高速逻辑运算装置。

公开(公告)号：US4270059A

公开(公告)日：1981-05-26

申请号：US907318

申请日：1978-05-18

申请人： Jun-ichi Nishizawa ,  Tadahiro Ohmi

发明人： Jun-ichi Nishizawa ,  Tadahiro Ohmi

IPC分类号： H01L29/80 ,  H01L21/8222 ,  H01L27/02 ,  H01L27/06 ,  H01L27/07 ,  H01L27/098 ,  H01L29/739 ,  H03K19/091 ,  H03K19/094 ,  H01L27/04 ,  H03K19/20

CPC分类号： H01L29/739 ,  H01L27/0225 ,  H01L27/0722 ,  H01L27/098 ,  H03K19/091

摘要： A static induction transistor logic circuit comprising: an injector transistor having a control electrode held at a reference potential, a first electrode, and a second electrode applied with a potential to thereby cause a current having a value determined by the potential applied to flow through the first electrode; a driver static induction transistor having a gate connected to said first electrode of the injector transistor, a drain, and a source held at said reference potential; and a bypath static induction transistor having a gate, a drain connected to both the gate of the bypath transistor and said gate of said driver transistor, and a source held at said reference potential, said bypath transistor being operative so that when said driver transistor is in its conductive state, the bypath transistor becomes conductive to allow a part of said current supplied from said first electrode to flow through the bypath transistor, with a certain potential developed at the drain of the bypath transistor, said certain potential, when applied at said gate of said driver transistor, allowing said driver transistor to turn to be conductive, and having a value associated with that of said current supplied from said first electrode.

摘要翻译： 一种静电感应晶体管逻辑电路，包括：具有保持在参考电位的控制电极的注入器晶体管，第一电极和施加电位的第二电极，从而使具有由施加的电位确定的值流过 第一电极; 驱动器静电感应晶体管，其具有连接到所述注入晶体管的所述第一电极的栅极，漏极和保持在所述参考电位的源极; 以及具有栅极的旁路静电感应晶体管，连接到所述旁路晶体管的栅极和所述驱动晶体管的所述栅极的漏极以及保持在所述参考电位的源极，所述通路晶体管的操作使得当所述驱动晶体管为 在其导通状态下，旁路晶体管导通，以允许来自所述第一电极的所述电流的一部分流过所述旁路晶体管，在所述旁路晶体管的漏极处产生一定电位，所述特定电位在施加在所述旁路晶体管时在所述 所述驱动晶体管的栅极，允许所述驱动晶体管变为导通，并且具有与从所述第一电极提供的所述电流相关联的值。

公开(公告)号：US4994872A

公开(公告)日：1991-02-19

申请号：US225870

申请日：1988-07-29

申请人： Jun-ichi Nishizawa ,  Tadahiro Ohmi

发明人： Jun-ichi Nishizawa ,  Tadahiro Ohmi

IPC分类号： H01L27/02 ,  H01L27/088 ,  H01L27/092 ,  H01L29/10 ,  H01L29/423 ,  H01L29/772 ,  H01L29/78

CPC分类号： H01L29/7816 ,  H01L27/0225 ,  H01L27/0883 ,  H01L27/092 ,  H01L29/1033 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/7722 ,  H01L29/7801 ,  H01L29/4236 ,  H01L29/42368

摘要： An insulated-gate static induction transistor is formed by establishing a potential barrier in a semiconductor region of one conductivity type between the source and the drain regions of the other conductivity type. The height of the potential barrier should be sensitive to the drain voltage as well as to the gate voltage. Therefore, the semiconductor region should have a low impurity concentration and short length. The potential barrier can be established by varying the field effect of the gate voltage in the semiconductor region and/or by the built-in potential between the source region and the semiconductor region.

公开(公告)号：US4608582A

公开(公告)日：1986-08-26

申请号：US515462

申请日：1983-07-20

申请人： Jun-ichi Nishizawa

发明人： Jun-ichi Nishizawa

IPC分类号： H01L21/762 ,  H01L21/763 ,  H01L27/02 ,  H01L27/07 ,  H01L29/739 ,  H01L29/80

CPC分类号： H01L21/76224 ,  H01L21/76232 ,  H01L21/763 ,  H01L27/0225 ,  H01L27/0716 ,  H01L27/0722 ,  H01L29/739

摘要： The new kind of field effect transistor having a non-saturating characteristic, i.e. static induction transistor (SIT), proposed by the present inventor is modified to serve as a substitute of any conventional bipolar transistor in a given circuitry. That is, the gate-to-gate distance and the impurity concentration of the channel region of an SIT are so selected that the channel is pinched off by the depletion layer at a predetermined forward gate bias. When the forward gate bias applied is below a certain level, the drain current will increase fundamentally exponentially with an increase of the drain voltage above some threshold voltage, whereas when the gate bias applied is above the certain value, the drain current will increase rapidly with a small increase in the drain voltage.

摘要翻译： 本发明人提出的具有非饱和特性的新型场效应晶体管即静电感应晶体管（SIT）被修改，以用作给定电路中任何常规双极晶体管的替代物。 也就是说，选择SIT的沟道区域的栅极到栅极间距和杂质浓度，以便在预定的正向栅极偏压下通过耗尽层夹持沟道。 当施加的正向栅极偏置低于一定电平时，漏极电流随着漏极电压增加到一定阈值电压的上升势头将呈指数增长，而当施加的栅极偏置高于某一值时，漏极电流将随着 漏极电压小幅增加。

公开(公告)号：US4320410A

公开(公告)日：1982-03-16

申请号：US35460

申请日：1979-05-03

申请人： Jun-ichi Nishizawa ,  Tadahiro Ohmi

发明人： Jun-ichi Nishizawa ,  Tadahiro Ohmi

IPC分类号： H01L29/80 ,  H01L21/314 ,  H01L21/8222 ,  H01L21/8226 ,  H01L21/8252 ,  H01L27/02 ,  H01L27/06 ,  H01L27/082 ,  H01L29/739 ,  H03K19/094

CPC分类号： H01L21/8252 ,  H01L21/3144 ,  H01L27/0225 ,  H01L29/739

摘要： This invention relates to a GaAs semiconductor device and more particularly to a GaAs static induction transistor integrated circuit which operates at a very high speed. Gallium arsenide has the features that the mobility of electrons is higher than that in silicon and that the band structure has a direct gap. The mobility of electrons in gallium arsenide is several times as high as that in silicon; this is very suitable for the manufacture of a semiconductor device of high-speed operation. Further, since gallium arsenide has the direct gap, the electron-hole recombination rate is high and the minority carrier storage effect is extremely small. By causing the recombination at the direct gap, light emission can be achieved more efficiently. Accordingly, a light receiving and emitting semiconductor device can be obtained through the use of gallium arsenide. As the propagation velocity of light is very fast, signal transfer between semiconductor chips can be achieved at ultra-high speed. By combining this with the high mobility of electrons in gallium arsenide, an ultra-high speed logical operation device can be realized.

摘要翻译： 本发明涉及一种GaAs半导体器件，更具体地说，涉及以非常高的速度工作的GaAs静态感应晶体管集成电路。 砷化镓具有电子迁移率高于硅中的迁移率，并且带结构具有直接间隙的特征。 砷化镓中电子的迁移率是硅中的几倍; 这非常适合制造高速运行的半导体器件。 此外，由于砷化镓具有直接间隙，电子 - 空穴复合率高，少数载流子的保存效果极小。 通过在直接间隙引起复合，可以更有效地实现发光。 因此，可以通过使用砷化镓来获得光接收和发射半导体器件。 由于光的传播速度非常快，半导体芯片之间的信号传输可以以超高速度实现。 通过将其与砷化镓中的电子的高迁移率组合，可以实现超高速逻辑运算装置。

公开(公告)号：US4284997A

公开(公告)日：1981-08-18

申请号：US920542

申请日：1978-06-29

申请人： Jun-ichi Nishizawa

发明人： Jun-ichi Nishizawa

IPC分类号： H01L27/02 ,  H01L29/739 ,  H01L29/772 ,  H01L29/80

CPC分类号： H01L29/739 ,  H01L27/0225 ,  H01L29/7722

摘要： In a static induction transistor, the gate structure is split into two separate gates facing each other to cooperatively define therebetween a channel or channels of this transistor. One of these two separate gates is operative as a driving gate for driving the transistor in response to a driving signal applied thereto, while the other one is operative as a non-driving gate which has no driving signal applied. The non-driving gate may be held at a certain potential or floated. Such split-gate structure provides a higher operating speed of the transistor, and can be effectively applied to semiconductor memory devices.In such a memory device having split-gate structures, a plurality of field effect type semiconductor memory cells are formed perpendicular to a surface of a semiconductor wafer to enhance a high packing density of the memory device. Charge carriers are transported in the semiconductor bulk through channels defined by the split-gate structure, thereby enhancing a high-speed operation of the memory device.

摘要翻译： 在静态感应晶体管中，栅极结构被分成两个彼此面对的分开的栅极，以在其间协同地限定该晶体管的沟道或沟道。 这两个分离栅中的一个作为响应于施加到其上的驱动信号而驱动晶体管的驱动栅，而另一个作为不施加驱动信号的非驱动栅可操作。 非驱动门可以保持在一定的潜力或漂浮。 这种分离栅结构提供了晶体管的更高的工作速度，并且可以有效地应用于半导体存储器件。 在具有分离栅结构的这种存储器件中，垂直于半导体晶片的表面形成多个场效应半导体存储单元，以提高存储器件的高封装密度。 电荷载体通过由分离栅结构限定的通道在半导体体中传输，从而增强存储器件的高速操作。

公开(公告)号：US4266238A

公开(公告)日：1981-05-05

申请号：US884214

申请日：1978-03-07

申请人： Jun-ichi Nishizawa

发明人： Jun-ichi Nishizawa

IPC分类号： H01L27/02 ,  H01L27/07 ,  H01L29/08 ,  H01L29/10 ,  H01L29/772 ,  H03K19/018 ,  H03K19/082 ,  H03K19/086 ,  H03K19/091 ,  H01L27/04

CPC分类号： H01L27/0716 ,  H01L27/0225 ,  H01L29/0821 ,  H01L29/1079 ,  H01L29/1083 ,  H01L29/7722 ,  H03K19/01806 ,  H03K19/082 ,  H03K19/086 ,  H03K19/091

摘要： An improved transistor comprising an embedded electrode formed in a semiconductor substrate and having a high resistivity semiconductor region intervening between the embedded electrode and the substrate. The dimension and the impurity concentration of the high resistivity region are selected to insure that this latter region is substantially pinched off in the operative state of this transistor by the depletion layer growing from either the embedded electrode or the substrate, the width of said depletion layer varying in good faith without delay with the quick changes in the voltage of the embedded electrode. This provides an effective reduction mainly in the capacitance between the embedded electrode and the substrate, and also in the conductance in high-speed operation, which jointly bring about a high speed operation and a large driving ability. This transistor is extremely useful when adopted in a semiconductor integrated circuit.

摘要翻译： 一种改进的晶体管，包括形成在半导体衬底中并且具有插入在所述嵌入电极和所述衬底之间的高电阻率半导体区域的嵌入电极。 选择高电阻率区域的尺寸和杂质浓度以确保后者区域在该晶体管的操作状态下被从嵌入式电极或衬底生长的耗尽层基本上被夹断，所述耗尽层的宽度 随着嵌入式电极电压的快速变化，不遗余力地不断变化。 这主要是在嵌入式电极和基板之间的电容以及高速运转的电导中有效地降低，共同带来高速运转和大的驱动能力。 该晶体管在半导体集成电路中采用时非常有用。

公开(公告)号：US4198648A

公开(公告)日：1980-04-15

申请号：US902965

申请日：1978-05-04

申请人： Jun-ichi Nishizawa

发明人： Jun-ichi Nishizawa

IPC分类号： H01L29/80 ,  H01L21/331 ,  H01L21/8222 ,  H01L27/02 ,  H01L27/06 ,  H01L27/07 ,  H01L27/098 ,  H01L29/73 ,  H01L29/739 ,  H03K19/091 ,  H03K19/094

CPC分类号： H01L27/0722 ,  H01L27/0225 ,  H01L27/098 ,  H01L29/739 ,  H03K19/091

摘要： An integrated semiconductor device comprising: a first and a second static induction transistor each including a drain and a source, each having a first conductivity type, a current channel having the first conductivity type and located between the drain and the source, and a gate having a second conductivity type opposite to the first conductivity type and located adjacent to the current channel; and a third bipolar transistor including a collector and an emitter each having the second conductivity type, and a base having the first conductivity type and located between the collector and the emitter, the collector being connected to the gates of the first and second transistors and also to the drain of the second transistor, the source of the second transistor being connected to the source of the first transistor. The second transistor is operative for suppressing the occurrence of an unrequired excessive minority carrier injection in the first transistor.

摘要翻译： 一种集成半导体器件，包括：第一和第二静电感应晶体管，每个包括漏极和源极，每个具有第一导电类型，具有第一导电类型并位于漏极和源极之间的电流沟道，以及栅极， 与第一导电类型相反并且位于与当前通道相邻的第二导电类型; 以及包括具有第二导电类型的集电极和发射极的第三双极晶体管，以及具有第一导电类型并位于集电极和发射极之间的基极，集电极连接到第一和第二晶体管的栅极，并且还 到第二晶体管的漏极，第二晶体管的源极连接到第一晶体管的源极。 第二晶体管用于抑制第一晶体管中不需要的过量少量载流子注入的发生。

公开(公告)号：US09490355B2

公开(公告)日：2016-11-08

申请号：US14945936

申请日：2015-11-19

申请人： STMicroelectronics, Inc.

发明人： Pierre Morin ,  John Hongguang Zhang

IPC分类号： H01L29/772 ,  H01L29/66 ,  H01L27/02 ,  H01L29/16 ,  H01L29/08 ,  H01L21/04 ,  H01L21/308 ,  H01L27/146 ,  H01L29/417 ,  H01L29/06

CPC分类号： H01L29/7722 ,  H01L21/0475 ,  H01L21/0485 ,  H01L21/308 ,  H01L27/0225 ,  H01L27/14679 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0843 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/66068 ,  H01L29/66416

摘要： A static induction transistor is formed on a silicon carbide substrate doped with a first conductivity type. First recessed regions in a top surface of the silicon carbide substrate are filled with epitaxially grown gate regions in situ doped with a second conductivity type. Epitaxially grown channel regions in situ doped with the first conductivity type are positioned between adjacent epitaxial gate regions. Epitaxially grown source regions in situ doped with the first conductivity type are positioned on the epitaxial channel regions. The bottom surface of the silicon carbide substrate includes second recessed regions vertically aligned with the channel regions and silicided to support formation of the drain contact. The top surfaces of the source regions are silicided to support formation of the source contact. A gate lead is epitaxially grown and electrically coupled to the gate regions, with the gate lead silicided to support formation of the gate contact.