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    Silicon carbide bipolar junction transistor including shielding regions
    5.
    发明授权
    Silicon carbide bipolar junction transistor including shielding regions 有权
    碳化硅双极结晶体管包括屏蔽区域

    公开(公告)号：US09515176B2

    公开(公告)日：2016-12-06

    申请号：US13938006

    申请日：2013-07-09

    申请人： Fairchild Semiconductor Corporation

    发明人： Andrei Konstantinov

    IPC分类号： H01L29/66 ,  H01L29/73 ,  H01L29/04 ,  H01L29/10 ,  H01L29/16 ,  H01L29/732 ,  H01L29/06

    CPC分类号： H01L29/73 ,  H01L29/045 ,  H01L29/06 ,  H01L29/0611 ,  H01L29/1004 ,  H01L29/1608 ,  H01L29/66053 ,  H01L29/66068 ,  H01L29/66234 ,  H01L29/7325

    摘要： A silicon carbide (SiC) bipolar junction transistor (BJT) and a method of manufacturing such a SiC BJT is provided. The SiC BJT can include a collector region having a first conductivity type, a base region having a second conductivity type opposite the first conductivity type, and an emitter region having the first conductivity type, the collector region, the base region and the emitter region being arranged as a stack. The emitter region defining an elevated structure defined at least in part by an outer sidewall on top of the stack. The base region having a portion capped by the emitter region and defining an intrinsic base region where the intrinsic base region includes a portion extending from the emitter region to the collector region. The SiC BJT can include a first shielding region and a second shield region each having the second conductivity type.

    摘要翻译： 提供了碳化硅（SiC）双极结型晶体管（BJT）和制造这种SiC BJT的方法。 SiC BJT可以包括具有第一导电类型的集电极区域，具有与第一导电类型相反的第二导电类型的基极区域和具有第一导电类型的发射极区域，集电极区域，基极区域和发射极区域是 排列成堆叠。 所述发射极区限定至少部分地由所述堆叠顶部的外侧壁限定的升高的结构。 该基极区域具有由发射极区域覆盖的部分并且限定本征基极区域，其中本征基极区域包括从发射极区域延伸到集电极区域的部分。 SiC BJT可以包括具有第二导电类型的第一屏蔽区域和第二屏蔽区域。

    Method for manufacturing a vertical bipolar transistor compatible with CMOS manufacturing methods
    6.
    发明授权
    Method for manufacturing a vertical bipolar transistor compatible with CMOS manufacturing methods 有权
    制造与CMOS制造方法兼容的垂直双极晶体管的方法

    公开(公告)号：US09257526B2

    公开(公告)日：2016-02-09

    申请号：US14313836

    申请日：2014-06-24

    申请人： STMicroelectronics SA

    发明人： Pierre Boulenc

    IPC分类号： H01L29/66 ,  H01L21/8249 ,  H01L29/732 ,  H01L29/06 ,  H01L29/739 ,  H01L29/08

    CPC分类号： H01L29/66333 ,  H01L21/8249 ,  H01L29/0692 ,  H01L29/0821 ,  H01L29/66272 ,  H01L29/7325 ,  H01L29/7395

    摘要： The present disclosure relates to a method for manufacturing a bipolar transistor. The method forms a trench to isolate a first region from a second region in a semiconductor wafer, and to isolate these regions from the rest of the wafer. The method forms first P-doped well in the second region and produces a collector region of second and third wells by a P doping in the first region. The second well is in contact with the first well below the trench. The method also produces an N-doped base well on the collector region and, at the wafer surface, and forms a CMOS transistor gate on the first region and delimiting a third region and a fourth region. The method also forms a P+-doped collector contact region in the first well, forms a P+ doped emitter region in the third region, and forms an N+-doped base contact region in the fourth region.

    摘要翻译： 本公开涉及一种用于制造双极晶体管的方法。 该方法形成沟槽以将第一区域与半导体晶片中的第二区域隔离，并将这些区域与晶片的其余部分隔离。 该方法在第二区域中形成第一P掺杂阱，并且在第一区域中通过P掺杂产生第二阱和第三阱的集电极区。 第二个井与沟槽下面的第一个井接触。 该方法还在集电极区域和晶片表面上产生N掺杂的基极阱，并在第一区域上形成CMOS晶体管栅极并限定第三区域和第四区域。 该方法还在第一阱中形成P +掺杂的集电极接触区，在第三区中形成P +掺杂的发射极区，并在第四区中形成N +掺杂的基极接触区。

    BIPOLAR JUNCTION TRANSISTORS WITH REDUCED BASE-COLLECTOR JUNCTION CAPACITANCE
    7.
    发明申请
    BIPOLAR JUNCTION TRANSISTORS WITH REDUCED BASE-COLLECTOR JUNCTION CAPACITANCE 有权
    具有降低的基极集电极结电容的双极晶体管

    公开(公告)号：US20150311283A1

    公开(公告)日：2015-10-29

    申请号：US14734713

    申请日：2015-06-09

    申请人： International Business Machines Corporation

    发明人： James W. Adkisson ,  James R. Elliott ,  David L. Harame ,  Marwan H. Khater ,  Robert K. Leidy ,  Qizhi Liu ,  John J. Pekarik

    IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/08 ,  H01L29/732

    CPC分类号： H01L29/0649 ,  H01L29/045 ,  H01L29/0804 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/66242 ,  H01L29/66257 ,  H01L29/66287 ,  H01L29/73 ,  H01L29/7325 ,  H01L29/7375

    摘要： Device structures for a bipolar junction transistor. The device structure includes a collector region, an intrinsic base formed on the collector region, an emitter coupled with the intrinsic base and separated from the collector by the intrinsic base, and an isolation region extending through the intrinsic base to the collector region. The isolation region is formed with a first section having first sidewalls that extend through the intrinsic base and a second section with second sidewalls that extend into the collector region. The second sidewalls are inclined relative to the first sidewalls. The isolation region is positioned in a trench that is formed with first and second etching process in which the latter etches different crystallographic directions of a single-crystal semiconductor material at different etch rates.

    摘要翻译： 双极结型晶体管的器件结构。 器件结构包括集电极区域，形成在集电极区域上的本征基极，与本征基极耦合并与集电极与本征基极分离的发射极，以及延伸穿过本征基极到集电极区域的隔离区域。 隔离区形成有具有延伸穿过本征基底的第一侧壁的第一部分和具有延伸到收集器区域中的第二侧壁的第二部分。 第二侧壁相对于第一侧壁倾斜。 隔离区域位于形成有第一和第二蚀刻工艺的沟槽中，其中后者以不同的蚀刻速率蚀刻单晶半导体材料的不同晶体方向。

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    8.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20150060885A1

    公开(公告)日：2015-03-05

    申请号：US14473158

    申请日：2014-08-29

    申请人： Kabushiki Kaisha Toshiba

    发明人： Mariko SUZUKI ,  Tadashi SAKAI ,  Chiharu OTA ,  Kazuto TAKAO ,  Takashi SHINOHE

    IPC分类号： H01L29/16 ,  H01L29/66 ,  H01L21/02 ,  H01L29/868

    CPC分类号： H01L29/1602 ,  H01L21/02376 ,  H01L21/02433 ,  H01L21/02527 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/041 ,  H01L21/042 ,  H01L29/045 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/6603 ,  H01L29/66037 ,  H01L29/7325 ,  H01L29/861 ,  H01L29/868

    摘要： A semiconductor device according to an embodiment includes an i-type or a p-type first diamond semiconductor layer, an n-type second diamond semiconductor layer provided on the first diamond semiconductor layer, a mesa structure and an n-type first diamond semiconductor region provided on the side surface. The mesa structure includes the first diamond semiconductor layer, the second diamond semiconductor layer, a top surface with a plane orientation of ±10 degrees or less from a {100} plane, and a side surface inclined by 20 to 90 degrees with respect to a direction of ±20 degrees from the {100} plane. The first diamond semiconductor region is in contact with the second diamond semiconductor layer and has an n-type impurity concentration lower than an n-type impurity concentration of the second diamond semiconductor layer.

    摘要翻译： 根据实施例的半导体器件包括i型或p型第一金刚石半导体层，设置在第一金刚石半导体层上的n型第二金刚石半导体层，台面结构和n型第一金刚石半导体区 设置在侧面。 台面结构包括第一金刚石半导体层，第二金刚石半导体层，具有与{100}平面成±10度以下的平面取向的顶表面和相对于第一金刚石半导体层倾斜20度至90度的侧表面 方向距离{100}平面<011>±20度。 第一金刚石半导体区域与第二金刚石半导体层接触，并且具有比第二金刚石半导体层的n型杂质浓度低的n型杂质浓度。

    BIPOLAR JUNCTION TRANSISTOR WITH SPACER LAYER
    10.
    发明申请
    BIPOLAR JUNCTION TRANSISTOR WITH SPACER LAYER 有权
    具有间隔层的双极结型晶体管

    公开(公告)号：US20140034968A1

    公开(公告)日：2014-02-06

    申请号：US14048940

    申请日：2013-10-08

    申请人： Fairchild Semiconductor Corporation

    发明人： Andrei KONSTANTINOV

    IPC分类号： H01L29/73 ,  H01L29/16

    CPC分类号： H01L29/73 ,  H01L29/045 ,  H01L29/0692 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7325

    摘要： New designs for silicon carbide (SiC) bipolar junction transistors (BJTs) and new methods of manufacturing such SiC BJTs are described. The SiC BJT comprises a collector region, a base region and an emitter region disposed as a stack, the emitter region and part of the base region forming a mesa. The intrinsic part of the base region includes a first portion having a first doping concentration and a second portion having a second doping concentration lower than the first doping concentration. Further, the second portion is vertically disposed between the first portion and the emitter region in the stack.

    摘要翻译： 描述了碳化硅（SiC）双极结晶体管（BJT）的新设计和制造这种SiC BJT的新方法。 SiC BJT包括集电极区域，基极区域和作为堆叠设置的发射极区域，发射极区域和基极区域的一部分形成台面。 基区的本征部分包括具有第一掺杂浓度的第一部分和具有低于第一掺杂浓度的第二掺杂浓度的第二部分。 此外，第二部分垂直地设置在堆叠中的第一部分和发射极区域之间。