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公开(公告)号：US20240348224A1
公开(公告)日：2024-10-17
申请号：US18755971
申请日：2024-06-27
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Hiroto MOTOYAMA
CPC classification number: H03H7/0161 , H03H7/0115 , H03H2001/0085
Abstract: A filter device includes a dielectric, first and second electrodes in the dielectric and connected to a ground terminal, and first to third resonators. The first and second resonators are between the first and second electrodes. The first resonator is connected to an input terminal, and the second resonator is connected to an output terminal. The third resonator is between the first and second resonators. The first resonator includes a first plate conductor connected to the input terminal and the ground terminal. The second resonator includes a second plate conductor connected to the output terminal and the ground terminal. The first and second plate conductors extend in the dielectric in an X-axis direction. The first to third resonators are arranged in a Y-axis direction. The third resonator includes a capacitor electrode opposite to the second electrode, and an inductor via connected to the capacitor electrode and the first electrode.
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公开(公告)号：US20240305261A1
公开(公告)日：2024-09-12
申请号：US18180123
申请日：2023-03-07
Inventor： Mladen Mitrovic , Wolfgang Gaberl , Gunther Steinle , Milos Davidovic
IPC: H03H7/01 , G01S7/4863 , G01S7/487 , G01S7/527
CPC classification number: H03H7/0161 , G01S7/4863 , G01S7/4876 , G01S7/5273
Abstract: The present invention is directed to electrical circuits. In a specific embodiment, a first interface circuit is coupled to a first plurality of ports for processing signals at a first frequency range, and a second interface circuit is coupled to a second plurality of ports for processing signals at a second frequency range. The first interface circuit is coupled to a timing channel circuit. The second interface circuit is coupled to an energy channel circuit. There are other embodiments as well.
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公开(公告)号：US20240223168A1
公开(公告)日：2024-07-04
申请号：US18148845
申请日：2022-12-30
Applicant: Texas Instruments Incorporated
Inventor： Tolga Dinc , Sachin Kalia , Swaminathan Sankaran
CPC classification number: H03K5/00006 , G06F1/08 , H03H7/0115 , H03H7/0161
Abstract: Described embodiments include a circuit having a quadrature phase generator circuit having differential generator inputs, in-phase differential generator outputs and quadrature-phase differential generator outputs. A first frequency multiplier circuit has first differential multiplier inputs and a first multiplier output, wherein the first differential multiplier inputs are coupled to the in-phase differential generator outputs. A second frequency multiplier circuit has second differential multiplier inputs and a second multiplier output. The second multiplier differential inputs are coupled to the quadrature-phase differential generator outputs. A transformer includes a primary inductor and a secondary inductor, wherein the primary inductor is coupled between the first and second multiplier outputs, and the second inductor is coupled between an output voltage terminal and a ground terminal.
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公开(公告)号：US11984902B2
公开(公告)日：2024-05-14
申请号：US18201896
申请日：2023-05-25
Applicant: SIGMASENSE, LLC.
Inventor： Grant Howard McGibney , Patrick Troy Gray , Gerald Dale Morrison , Daniel Keith Van Ostrand
CPC classification number: H03M1/0626 , G06F3/044 , H03H7/0161 , H03M1/1245 , H03M3/462 , G06F3/041
Abstract: A digital decimation filtering circuit of an analog to digital conversion circuit includes an n-tap anti-aliasing filter operable to receive a 1-bit analog to digital converter (ADC) output signal at an oversampling rate and filter the 1-bit ADC output signal to remove frequencies higher than a selected cut-off frequency to produce an n-bit filtered signal at a first data output rate. The digital decimation filtering circuit further includes a decimator operable to receive the n-bit filtered signal at the first data output rate, decimate the n-bit filtered signal by a decimation factor to produce a set of output signals, and sum the set of outputs to produce a decimated signal at a second data output rate. The first data output rate is greater than the second data output rate.
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公开(公告)号：US20240128945A1
公开(公告)日：2024-04-18
申请号：US18492357
申请日：2023-10-23
Applicant: pSemi Corporation
Inventor： Emre Ayranci , Miles Sanner , Ke Li , James Francis McElwee , Tero Tapio Ranta , Kevin Roberts , Chih-Chieh Cheng
IPC: H03H7/01 , H04B1/00 , H04W72/0453
CPC classification number: H03H7/0161 , H04B1/0053 , H04B1/006 , H04B1/0067 , H04W72/0453 , H04W28/065
Abstract: A flexible multi-path RF adaptive tuning network switch architecture that counteracts impedance mismatch conditions arising from various combinations of coupled RF band filters, particularly in a Carrier Aggregation-based (CA) radio system. In one version, a digitally-controlled tunable matching network is coupled to a multi-path RF switch in order to provide adaptive impedance matching for various combinations of RF band filters. Optionally, some or all RF band filters include an associated digitally-controlled filter pre-match network to further improve impedance matching. In a second version, some or all RF band filters coupled to a multi-path RF switch include a digitally-controlled phase matching network to provide necessary per-band impedance matching. Optionally, a digitally-controlled tunable matching network may be included on the common port of the multi-path RF switch to provide additional impedance matching capability. In a third version, CA direct mapped adaptive tuning networks include filter tuning blocks for selected lower frequency bands.
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公开(公告)号：US20240048112A1
公开(公告)日：2024-02-08
申请号：US18361410
申请日：2023-07-28
Applicant: TDK CORPORATION
Inventor： Yuta ASHIDA , Shuhei SAWAGUCHI , Masahiro TATEMATSU , Keigo SHIBUYA , Tomonori TERUI , Tetsuzo GOTO
IPC: H03H7/01
CPC classification number: H03H7/0115 , H03H7/0161 , H03H2001/0085
Abstract: In a multilayer filter, first to fourth resonant circuits are connected to an input/output portion. The input/output portion includes an input/output port group including an unbalanced port and a pair of balanced ports or an input/output port group including two pairs of balanced ports. Each of the first to fourth resonant circuits includes an inductor conductor and first and second capacitor conductors. The inductor conductor includes first and second ends. The first capacitor conductor is connected to the first end. The second capacitor conductor is connected to the second end. The second and third resonant circuits are magnetically coupled to each other. The second and third resonant circuits are arranged between the first resonant circuit and the fourth resonant circuit in a first direction. Each of first and second electrodes of a jump capacitor conductor is connected to the inductor conductors of the first and fourth resonant circuits.
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公开(公告)号：US20240039501A1
公开(公告)日：2024-02-01
申请号：US18257274
申请日：2022-09-07
Applicant: ANHUI ANUKI TECHNOLOGIES CO., LTD
Inventor： Xiaodong WANG , Chenggong HE , Chengjie ZUO , Jun HE
CPC classification number: H03H7/0161 , H03H7/0115 , H03H9/581
Abstract: Provided are a band-pass filter circuit and a multiplexer. The band-pass filter circuit includes an electromagnetic LC filter circuit and acoustic resonance units. At least one of the acoustic resonance units each includes at least one first acoustic resonator and at least one second acoustic resonator. The first acoustic resonator is connected in series between the band-pass filter circuit and the electromagnetic LC filter circuit. Each of the at least one second acoustic resonator is connected to a terminal of the at least one first acoustic resonator, where the first terminal of the band-pass filter circuit serves as an input terminal or output terminal of the band-pass filter circuit. One or more of the acoustic resonance units are connected on an input side of the electromagnetic LC filter circuit; and the remaining of the acoustic resonance units are connected on an output side of the electromagnetic LC filter circuit.
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公开(公告)号：US20230378910A1
公开(公告)日：2023-11-23
申请号：US18362925
申请日：2023-07-31
Inventor： Chi-Hsien LIN , Ho-Hsiang CHEN , Hsien-Yuan LIAO , Tzu-Jin YEH , Ying-Ta LU
CPC classification number: H03B5/1228 , H03B5/1212 , H03B5/1296 , H03B5/1203 , H03B5/1243 , H03B1/04 , H03H7/0161 , H03B5/1206 , H03B2200/009
Abstract: A band-pass filter (BPF) includes first and second windings. The first winding includes first and second terminals, a first outer extending portion extending from the first terminal, a second outer extending portion extending from the second terminal, and a first conductive structure configured to electrically connect the first and second outer extending portions to each other at a location opposite the first and second terminals. The second winding includes third and fourth terminals positioned between the first and second terminals, and a second conductive structure electrically connected to the third and fourth terminals and extending between the first conductive structure and each of the first and second outer extending portions.
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公开(公告)号：US20230369756A1
公开(公告)日：2023-11-16
申请号：US18199130
申请日：2023-05-18
Applicant: Skyworks Solutions, Inc.
Inventor： Stephane Richard Marie Wloczysiak
CPC classification number: H01Q1/521 , H04B1/0458 , H03H7/0161 , H04B1/18 , H04B2001/045
Abstract: Radio frequency (RF) systems with tunable filters are provided herein. In certain embodiments, an RF system includes a first RF processing circuit configured to process a first frequency band of a first communication standard and a second frequency band of a second communication standard. The first frequency band and the second frequency band are close in frequency and/or partially overlapping in frequency. The first RF processing circuit includes a tunable filter for changing the bandwidth of the first RF processing circuit to enhance the robustness of the first RF processing circuit to blocker or jammer signals of a third frequency band.
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公开(公告)号：US11784628B2
公开(公告)日：2023-10-10
申请号：US17933958
申请日：2022-09-21
Applicant: Qorvo US, Inc.
Inventor： Jyothi Swaroop Sadhu , Ralph Rothemund , Alireza Tajic
CPC classification number: H03H9/17 , H03H7/0161 , H03H9/02007 , H03H9/54 , H03H2009/02173
Abstract: An acoustic device includes a foundation structure and a transducer provided over the foundation structure. The foundation structure includes a piezoelectric layer between a top electrode and a bottom electrode. The piezoelectric layer has an active portion within an active region of the transducer, and a bi-polar border portion within a border region of the transducer. The piezoelectric material in the active portion has a first polarization. The bi-polar border portion has a first sub-portion and a second sub-portion, which resides either above or below the first sub-portion. The piezoelectric material in the first sub-portion has the first polarization, and the piezoelectric material in the second sub-portion has a second polarization, which is opposite the first polarization.
