Systems and methods for driving a bipolar junction transistor by adjusting base current with time
    1.
    发明授权
    Systems and methods for driving a bipolar junction transistor by adjusting base current with time 有权
    通过随时间调整基极电流来驱动双极结型晶体管的系统和方法

    公开(公告)号:US08723558B2

    公开(公告)日:2014-05-13

    申请号:US13213931

    申请日:2011-08-19

    IPC分类号: H03K3/00

    摘要: System and method for driving a bipolar junction transistor for a power converter. The system includes a current generator configured to output a drive current signal to a bipolar junction transistor to adjust a primary current flowing through a primary winding of a power converter. The current generator is further configured to output the drive current signal to turn on the bipolar junction transistor during a first time period, a second time period, and a third time period, the second time period separating the first time period from the third time period, drive the bipolar junction transistor to operate in a hard-saturation region during the first time period and the second time period, and drive the bipolar junction transistor to operate in a quasi-saturation region during the third time period.

    摘要翻译: 用于驱动功率转换器的双极结型晶体管的系统和方法。 该系统包括电流发生器,其被配置为将驱动电流信号输出到双极结型晶体管,以调节流过功率转换器的初级绕组的初级电流。 电流发生器还被配置为输出驱动电流信号以在第一时间段,第二时间段和第三时间段内导通双极结晶体管,第二时间段将第一时间段与第三时间段 在第一时间段和第二时间段期间驱动双极结晶体管在硬饱和区域中工作,并且在第三时间段期间驱动双极结晶体管在准饱和区域中工作。

    IGBT-DRIVER CIRCUIT FOR DESATURATED TURN-OFF WITH HIGH DESATURATION LEVEL
    3.
    发明申请
    IGBT-DRIVER CIRCUIT FOR DESATURATED TURN-OFF WITH HIGH DESATURATION LEVEL 有权
    IGBT驱动电路,具有高度精度的去饱和电压

    公开(公告)号:US20080106319A1

    公开(公告)日:2008-05-08

    申请号:US11552038

    申请日:2006-10-23

    申请人: Reinhold Bayerer

    发明人: Reinhold Bayerer

    IPC分类号: H03K17/687

    摘要: A driver circuit comprising an insulated gate bipolar transistor having a collector coupled to a voltage supply, an emitter coupled to a source of reference potential, and a gate configured to receive a control signal from a driver circuit, and a desaturation circuit conductively coupled between an insulated gate and a collector of the insulated gate bipolar transistor to desaturate the insulated gate. The desaturation circuit includes a series coupled bias voltage source, uni-directionally conducting element and switch.

    摘要翻译: 一种驱动器电路,包括绝缘栅双极晶体管,其具有耦合到电压源的集电极,耦合到参考电位源的发射极和被配置为从驱动器电路接收控制信号的栅极以及导电耦合在 绝缘栅极和绝缘栅双极晶体管的集电极,使绝缘栅极去饱和。 去饱和电路包括串联耦合偏置电压源,单向导电元件和开关。

    Charge pump circuit
    4.
    发明授权
    Charge pump circuit 有权
    电荷泵电路

    公开(公告)号:US06850111B1

    公开(公告)日:2005-02-01

    申请号:US10390874

    申请日:2003-03-17

    申请人: Udo Ausserlechner

    发明人: Udo Ausserlechner

    摘要: A charge pump circuit provides an output voltage greater than a supply voltage of the charge pump circuit. The charge pump circuit has a first and a second charge storage device driven and connected up to one another such that the output voltage is higher than the dielectric strength of the individual capacitors. Switching devices are alternately switched on and off dependent on a high-frequency signal, so that the first charge storage device is charged during a first clock phase and the charge of the first charge storage device is transferred to the second charge storage device during a second clock phase. The charge pump circuit is distinguished by a low current demand, high output voltages and the provision of an output voltage with a low internal resistance. In a preferred embodiment, the switching devices have bipolar transistors, equipped with anti-saturation circuits.

    摘要翻译: 电荷泵电路提供大于电荷泵电路的电源电压的输出电压。 电荷泵电路具有驱动并相互连接的第一和第二电荷存储装置,使得输出电压高于各个电容器的介电强度。 切换装置根据高频信号交替地接通和关断,使得第一充电存储装置在第一时钟相位期间被充电,并且第一充电存储装置的充电在第二时间期间被传送到第二充电存储装置 时钟阶段 电荷泵电路的特征在于低电流需求,高输出电压和提供具有低内阻的输出电压。 在优选实施例中,开关器件具有配备有抗饱和电路的双极晶体管。

    Dual polarity voltage regulator circuits and methods for providing
voltage regulation
    5.
    发明授权
    Dual polarity voltage regulator circuits and methods for providing voltage regulation 失效
    双极性稳压电路和电压调节方法

    公开(公告)号:US5589761A

    公开(公告)日:1996-12-31

    申请号:US472538

    申请日:1995-06-07

    摘要: A dual polarity voltage regulator circuit that is capable of regulating either positive or negative voltages is disclosed. The regulator circuitry of the present invention provides dual polarity regulation while requiring only one additional pin over a single polarity regulator. The present invention utilizes a single error amplifier, a negative feedback network, and an overshoot recovery circuit in providing dual polarity regulation. One advantage of the negative feedback network of the present invention is that the regulator circuit uses the same error amplifier (i.e., only one error amplifier) to regulate both positive and negative input voltages. The negative feedback network actively affects signals input into the error amplifier during negative regulation, but is essentially disabled during positive regulation. Thus, positive and negative voltage regulation are provided using a single error amplifier that retains its multiple functions (for example, oscillator frequency shifting, overshoot improvement and loop frequency compensation).

    摘要翻译: 公开了能够调节正或负电压的双极性调压电路。 本发明的调节器电路提供双极性调节,同时在单个极性调节器上仅需要一个附加引脚。 本发明利用单误差放大器,负反馈网络和过冲恢复电路来提供双极性调节。 本发明的负反馈网络的一个优点是调节器电路使用相同的误差放大器(即,仅一个误差放大器)来调节正输入电压和负输入电压。 负反馈网络在负调节期间主动影响输入到误差放大器的信号,但在正调节期间基本上禁用。 因此,使用保持其多个功能的单个误差放大器(例如,振荡器频率偏移,过冲改善和环路频率补偿)来提供正和负电压调节。

    Circuit for preventing saturation of a transistor
    6.
    发明授权
    Circuit for preventing saturation of a transistor 失效
    用于防止晶体管饱和的电路

    公开(公告)号:US5373252A

    公开(公告)日:1994-12-13

    申请号:US920469

    申请日:1992-10-15

    申请人: Hayato Naito

    发明人: Hayato Naito

    摘要: The present invention concerns a current amplifier which is formed by a transistor, with a view to preventing oversaturation of the transistor. The transistor saturation preventing circuit, according to the invention, includes a second transistor (Q.sub.2) which constitutes a current mirror circuit with respect to a first transistor (Q.sub.1) forming the current amplifier, a saturation detecting element (R.sub.1) connected to the second transistor (Q.sub.2) to detect saturation of the first transistor (Q.sub.1), and a current feedback element (D.sub.1), so as to decrease the base current of the first transistor (Q.sub.1).

    摘要翻译: PCT No.PCT / JP91 / 00219 Sec。 371日期:1992年10月15日 102(e)日期1992年10月15日PCT 1991年2月21日PCT PCT。 公开号WO91 / 13491 日期1991年9月5日。本发明涉及由晶体管形成的电流放大器,以防止晶体管的过饱和。 根据本发明的晶体管饱和防止电路包括相对于形成电流放大器的第一晶体管(Q1)构成电流镜电路的第二晶体管(Q2),连接到第二晶体管的饱和检测元件(R1) (Q1),以检测第一晶体管(Q1)的饱和度和电流反馈元件(D1),以便降低第一晶体管(Q1)的基极电流。

    Schottky-diode emulator for BiCMOS logic circuit
    7.
    发明授权
    Schottky-diode emulator for BiCMOS logic circuit 失效
    用于BiCMOS逻辑电路的肖特基二极管仿真器

    公开(公告)号:US5077490A

    公开(公告)日:1991-12-31

    申请号:US647794

    申请日:1991-01-30

    IPC分类号: H03K17/0422

    CPC分类号: H03K17/0422

    摘要: A BiCMOS logic circuit with Schottky-diode emulator is formed from three NMOS field-effect transistors, a PMOS field-effect transistor, a npn bipolar transistor and a load element. First and second NMOS transistors and the PMOS transistor are connected serially between ground and a positive supply voltage. The input signal to the circuit is connected to the gate of the first NMOS transistor and the gate of the PMOS transistor, each of which sits on an opposite side of the second NMOS transistor. The drain and gate of the second NMOS transistor are connected to each other and to the drain and gate of the third NMOS transistor. The drain of the first NMOS transistor is connected to the base of the npn transistor, which has its collector connected through a load to the supply voltage. The source of the third NMOS transistor is also connected to the collector of the npn transistor. In this circuit, the second and third NMOS transistors act together to provide a feedback to limit the maximum base voltage experienced by the npn transistor when the input signal to the circuit goes low, thereby serving a similar function to that served by Schottky diodes in some bipolar circuits. A complementary circuit may be constructed for use with a negative supply voltage.

    摘要翻译: 具有肖特基二极管仿真器的BiCMOS逻辑电路由三个NMOS场效应晶体管,PMOS场效应晶体管,npn双极晶体管和负载元件形成。 第一和第二NMOS晶体管和PMOS晶体管串联连接在地和正电源电压之间。 到电路的输入信号连接到第一NMOS晶体管的栅极和PMOS晶体管的栅极,每个栅极位于第二NMOS晶体管的相反侧。 第二NMOS晶体管的漏极和栅极彼此连接并连接到第三NMOS晶体管的漏极和栅极。 第一NMOS晶体管的漏极连接到npn晶体管的基极,该晶体管的集电极通过负载连接到电源电压。 第三NMOS晶体管的源极也连接到npn晶体管的集电极。 在该电路中,当电路的输入信号变低时,第二和第三NMOS晶体管一起作用以提供反馈以限制npn晶体管所经受的最大基极电压,从而起到与肖特基二极管在某些情况下所服务的功能相似的功能 双极电路。 可以构造用于负电源电压的互补电路。

    Self-regulating drive circuit for the base current of a power transistor
with saturation level control
    9.
    发明授权
    Self-regulating drive circuit for the base current of a power transistor with saturation level control 失效
    用于具有饱和电平控制的功率晶体管的基极电流的自调节驱动电路

    公开(公告)号:US4987362A

    公开(公告)日:1991-01-22

    申请号:US444037

    申请日:1989-11-30

    申请人: Peter Zwanziger

    发明人: Peter Zwanziger

    CPC分类号: H03K17/0422 H03K17/0826

    摘要: An arrangement for controlling the base current of a power transistor comprising an adjustable driver stage which provides the drive power for switching on the power transistor at its base lead. A coupling diode is provided which taps off the voltage at the output of the power transistor. A saturation level control operates in parallel to the adjustable driver stage. A control current is supplied through a coupling diode when the voltage at the output of the power transistor signifies a system variable. The control current forms an auxiliary manipulated variable which adjusts the driver's output so as to supply the power transistor with exactly the right amount of drive power. The power transistor is thereby operated with the desired level of saturation, and particularly at the edge of saturation.

    摘要翻译: 一种用于控制功率晶体管的基极电流的装置,包括可调节驱动级,其提供用于在其基极上接通功率晶体管的驱动功率。 提供一个耦合二极管,可以在功率晶体管的输出端截取电压。 饱和电平控制与可调驱动器级平行运行。 当功率晶体管输出端的电压表示系统变量时,通过耦合二极管提供控制电流。 控制电流形成辅助调节变量,调整驱动器的输出,以便为功率晶体管提供正确的驱动功率。 因此功率晶体管以所需的饱和水平运行,特别是在饱和边缘。

    Amplifier stage with collector output
    10.
    发明授权
    Amplifier stage with collector output 失效
    放大器级采集器输出

    公开(公告)号:US4878032A

    公开(公告)日:1989-10-31

    申请号:US180743

    申请日:1988-04-12

    CPC分类号: H03K17/0422 H03K17/667

    摘要: This amplifier stage has saturation control and high dynamics. The stage comprises a pair of input current sources connected in series between a pair of reference voltage lines, a pair of output transistors, connected between the pair of reference voltage lines and defining an intermediate output terminal and a driving circuit comprising active elements and interposed between the input current sources and the output transistors. Saturation control is achieved through a pair of control circuits, one for each output transistor, comprising each a resistor interposed between the driving circuit and the respective output transistor so as to preset the balance saturation gain of the respective output transistor, and a transistor connected with its base to the driving circuit and with its collector and emitter between the output of the amplifier stage and the intermediate connection point between the input current sources, so as to define a negative feedback reducing imbalances existing between the currents fed by the input current sources, and therefore prevent high saturation levels of the transistors.

    摘要翻译: 该放大器级具有饱和控制和高动态特性。 该级包括串联连接在一对参考电压线之间的一对输入电流源,一对输出晶体管,连接在该对参考电压线之间并且限定中间输出端和包括有源元件的驱动电路并且插入在 输入电流源和输出晶体管。 通过一对控制电路来实现饱和度控制,一对每个输出晶体管,每个控制电路包括插入在驱动电路和相应的输出晶体管之间的电阻器,以便预设相应输出晶体管的平衡饱和增益,以及与 其基极到驱动电路,并且其集电极和发射极在放大器级的输出端和输入电流源之间的中间连接点之间,以便限定负反馈,减少由输入电流源馈送的电流之间存在的不平衡, 并因此防止晶体管的高饱和度。