公开(公告)号：US20170163279A1

公开(公告)日：2017-06-08

申请号：US14959064

申请日：2015-12-04

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Martin Kinyua

IPC分类号： H03M1/46 ,  G04F10/00

CPC分类号： H03M1/0607 ,  G04F10/005 ,  H03M1/1245 ,  H03M1/145 ,  H03M1/468 ,  H03M1/54

摘要： A hybrid SAR-ADC that uses a combination of voltage-based signal processing and time-based signal processing to convert an analog input signal to a digital output signal is disclosed. In some embodiments, the hybrid SAR-ADC has a voltage-based signal processing element configured to convert an analog input signal to a first digital signal having a plurality of MSBs and to generate a residue voltage from an input voltage and the first digital signal. A voltage-to-time conversion element is configured to convert the residue voltage to a time domain representation. A time-based signal processing element is configured to convert the time domain representation to a second digital signal comprising a plurality of LSBs. By determining the plurality of MSBs using voltage-based signal processing and determining the plurality of LSBs using time-based signal processing, the hybrid SAR-ADC is able to achieve low power and compact area.

公开(公告)号：US08782474B2

公开(公告)日：2014-07-15

申请号：US13966025

申请日：2013-08-13

申请人： Micron Technology, Inc.

发明人： Larry J. Koudele ,  Robert B. Eisenhuth

IPC分类号： G06K5/04 ,  H04L7/033 ,  G11C11/56 ,  G11C29/12 ,  G11C11/4076 ,  G11C29/02

CPC分类号： H04L7/0331 ,  G04F10/005 ,  G06F11/0793 ,  G11C11/4076 ,  G11C11/5642 ,  G11C29/02 ,  G11C29/12015 ,  G11C2211/5644 ,  H03M1/207 ,  H03M1/54

摘要： A counter configuration operates in cooperation with a delay configuration such that the counter configuration counts an input interval based on a given clock speed and a given clock interval while the delay configuration provides an enhanced data output that is greater than what would otherwise be provided by the given clock speed. The counter configuration counts responsive to a selected edge in the clock interval. An apparatus in the form of a correction arrangement and an associated method are configured to monitor at least the delay configuration output for detecting a particular time relationship between an endpoint of the input interval and a nearest occurrence of the selected clock edge in the given clock signal that is indicative of at least a potential error in the enhanced data output and determining if the potential error is an actual error for subsequent use in correcting the enhanced data output.

摘要翻译： 计数器配置与延迟配置协同工作，使得计数器配置基于给定的时钟速度和给定的时钟间隔对输入间隔进行计数，而延迟配置提供的增强数据输出大于由 给定时钟速度。 计数器配置响应于时钟间隔中的选定边沿计数。 校正装置和相关方法形式的装置被配置为至少监视延迟配置输出，用于检测输入间隔的端点与给定时钟信号中所选择的时钟沿的最近出现之间的特定时间关系 这表明增强数据输出中至少存在潜在的错误，并且确定潜在误差是否是后续用于校正增强数据输出的实际误差。

公开(公告)号：US20130141261A1

公开(公告)日：2013-06-06

申请号：US13309194

申请日：2011-12-01

申请人： Tracy Johancsik ,  Ryan James Kier ,  Yusuf Haque

发明人： Tracy Johancsik ,  Ryan James Kier ,  Yusuf Haque

IPC分类号： H03M1/06 ,  H03M1/10 ,  H03M1/12

CPC分类号： H03M1/54 ,  H03M1/1061 ,  H03M1/1215 ,  H03M1/1245

摘要： A time-interleaved Analog-to-Digital Converter (ADC) includes a set of sub-ADC circuits. Each sub-ADC circuit comprises a sample-and-hold circuit. Each sample-and-hold circuit includes a bootstrap circuit for maintaining a constant voltage level between an input terminal of a switch and a gate terminal of the switch, the switch for switching between a sample mode and a hold mode. Each sample and hold circuit also includes a capacitor bank associated with the bootstrap circuit such that a setting of the capacitor bank affects an ON state intrinsic resistance of the switch by affecting the voltage level.

摘要翻译： 时间交织的模数转换器（ADC）包括一组子ADC电路。 每个子ADC电路包括采样和保持电路。 每个采样和保持电路包括一个自举电路，用于在开关的输入端和开关的栅极端之间保持恒定的电压电平，用于在采样模式和保持模式之间切换的开关。 每个采样和保持电路还包括与自举电路相关联的电容器组，使得电容器组的设置通过影响电压电平来影响开关的导通状态固有电阻。

公开(公告)号：US20090323758A1

公开(公告)日：2009-12-31

申请号：US12327450

申请日：2008-12-03

申请人： Jong-Man Im

发明人： Jong-Man Im

IPC分类号： G01K1/00 ,  H03M1/12

CPC分类号： G01K7/01 ,  G01K2219/00 ,  H03M1/54

摘要： There is provided an analog-digital converter, including: a counting control unit configured to output a counting control signal which is activated while an input voltage is discharged to a predetermined voltage; and a counting unit configured to count an input clock during an activated section of the counting control signal, and output a digital code.

摘要翻译： 提供了一种模拟数字转换器，包括：计数控制单元，被配置为输出在输入电压被放电到预定电压时被激活的计数控制信号; 以及计数单元，被配置为在计数控制信号的激活部分期间对输入时钟进行计数，并输出数字代码。

公开(公告)号：US20080174464A1

公开(公告)日：2008-07-24

申请号：US11970730

申请日：2008-01-08

申请人： Patrick ROBERT

发明人： Patrick ROBERT

IPC分类号： H03M1/12

CPC分类号： H03M1/162 ,  H03M1/54

摘要： A method of digitizing an analog quantity from an electromagnetic radiation detector including a matrix of juxtaposed elementary sensors, including, for each line or column of the matrix, the steps of: integrating the analog quantity using an integrator stage; converting the integrated analog quantity to a first numerical value via a binary counter and a memory element connected to the output of a comparator stage; converting the first numerical value to an analog signal via an analog-to-digital converter; subtracting the analog signal from the analog quantity to be digitized; amplifying the signal resulting from the subtraction with a gain representing the first numerical value; integrating to produce a second numerical value proportional to the analog signal thereby amplified and forming a second binary number representing the least significant bits; and adding said first and second numerical values to form a number representative of the analog quantity to be integrated.

摘要翻译： 一种从包括并置矩阵的基本传感器的电磁辐射检测器数字化模拟量的方法，包括对矩阵的每一行或列进行以下步骤：使用积分器级积分模拟量; 通过二进制计数器和连接到比较器级的输出的存储元件将积分模拟量转换成第一数值; 经由模数转换器将第一数值转换为模拟信号; 从要数字化的模拟量中减去模拟信号; 用代表第一数值的增益放大由减法产生的信号; 积分以产生与模拟信号成比例的第二数值，从而被放大并形成表示最低有效位的第二二进制数; 以及添加所述第一和第二数值以形成表示要被积分的模拟量的数字。

公开(公告)号：US20070176816A1

公开(公告)日：2007-08-02

申请号：US11696184

申请日：2007-04-03

申请人： John WOOD

发明人： John WOOD

IPC分类号： H03M1/12

CPC分类号： G11C27/026 ,  G04F10/005 ,  G11C27/024 ,  H03M1/1004 ,  H03M1/54

摘要： A system and method for converting an analog signal to a digital signal is disclosed. The system includes a multiphase oscillator preferable a rotary oscillator, a sample and hold circuit, an integrator and a time-to-digital converter. The multiphase oscillator has a plurality of phases that are used in the time-to-digital converter to measure the time of a pulse created by the integrator. The edges of the pulse may optionally be sharpened by passing the pulse through a non-linear transmission line to improve the accuracy of the measurement process. To cut down on noise a tuned power network provides power to the switching devices of the rotary oscillator. Calibration is performed by fragmenting the sample and hold circuit and integrator and performing a closed loop calibration cycle on one of the fragments while the other fragments are joined together for the normal operation of the sample and hold and integrator circuits.

摘要翻译： 公开了一种将模拟信号转换为数字信号的系统和方法。 该系统包括优选旋转振荡器，采样和保持电路，积分器和时间 - 数字转换器的多相振荡器。 多相振荡器具有在时间 - 数字转换器中用于测量由积分器产生的脉冲的时间的多个相位。 可以通过使脉冲通过非线性传输线来选择性地削尖脉冲的边缘，以提高测量过程的精度。 为了减少噪音，调谐电源网为旋转振荡器的开关装置提供电源。 校准是通过对采样和保持电路和积分器进行分片来执行的，并在其中一个片段上执行闭环校准周期，而其他片段连接在一起用于采样和保持和积分电路的正常工作。

公开(公告)号：US20060071844A1

公开(公告)日：2006-04-06

申请号：US11191231

申请日：2005-07-26

申请人： John Wood

发明人： John Wood

IPC分类号： H03M1/12

CPC分类号： G11C27/026 ,  G04F10/005 ,  G11C27/024 ,  H03M1/1004 ,  H03M1/54

摘要： A system and method for converting an analog signal to a digital signal is disclosed. The system includes a multiphase oscillator preferable a rotary oscillator, a sample and hold circuit, an integrator and a time-to-digital converter. The multiphase oscillator has a plurality of phases that are used in the time-to-digital converter to measure the time of a pulse created by the integrator. The edges of the pulse may optionally be sharpened by passing the pulse through a non-linear transmission line to improve the accuracy of the measurement process. To cut down on noise a tuned power network provides power to the switching devices of the rotary oscillator. Calibration is performed by fragmenting the sample and hold circuit and integrator and performing a closed loop calibration cycle on one of the fragments while the other fragments are joined together for the normal operation of the sample and hold and integrator circuits.

摘要翻译： 公开了一种将模拟信号转换为数字信号的系统和方法。 该系统包括优选旋转振荡器，采样和保持电路，积分器和时间 - 数字转换器的多相振荡器。 多相振荡器具有在时间 - 数字转换器中用于测量由积分器产生的脉冲的时间的多个相位。 可以通过使脉冲通过非线性传输线来选择性地削尖脉冲的边缘，以提高测量过程的精度。 为了减少噪音，调谐电源网为旋转振荡器的开关装置提供电源。 校准是通过对采样和保持电路和积分器进行分片来执行的，并在其中一个片段上执行闭环校准周期，而其他片段连接在一起用于采样和保持和积分电路的正常工作。

公开(公告)号：US4965578A

公开(公告)日：1990-10-23

申请号：US257051

申请日：1988-10-13

申请人： Robert Poujois

发明人： Robert Poujois

IPC分类号： G01T1/17 ,  H03M1/00 ,  H03M1/60

CPC分类号： H03M1/14 ,  G01T1/171 ,  H03M1/54 ,  H03M1/60

摘要： An analog to digital converter comprises coarse (15, 16) and fine (24, 19) quantization. The coarse quantization is of the frequency-current type or frequency-voltage frequency type. The fine quantization measures the discharge period of a residual charge stored in an integration capacitor (3) at the end of the coarse quantization phase. The discharger of this capacitor includes a capacitor (14) for quantifying this discharge.

摘要翻译： 模数转换器包括粗（15,16）和精（24,19）量化。 粗略量化是频率电流型或频率电压频率型。 精细量化测量在粗量化阶段结束时存储在积分电容器（3）中的剩余电荷的放电周期。 该电容器的放电器包括用于量化该放电的电容器（14）。

公开(公告)号：US4779074A

公开(公告)日：1988-10-18

申请号：US96742

申请日：1987-09-14

申请人： Rowland E. Whitford ,  Edward Bastijanic

发明人： Rowland E. Whitford ,  Edward Bastijanic

IPC分类号： H03M1/54 ,  H03M1/00 ,  H03M1/52

CPC分类号： H03M1/54

摘要： A convertor for converting an analog signal to a digital pulse comprises a switching capacitor which is charged by a differential analog signal supplied to the switching capacitor over an input circuit. The capacitor is discharged over an output circuit with the aid of a constant current supply. The charge level of the capacitor is proportional to the analog signal so that the time it takes the capacitor to discharge to a selected low charge level, is proportional to the analog signal. This time period is used by a microprocessor control to generate a digital pulse having a pulse equal to the discharge time for the capacitor. The microprocessor also selectively connects the input and output circuits to the capacitor for respectively charging and discharging the capacitor.

摘要翻译： 用于将模拟信号转换为数字脉冲的转换器包括通过输入电路提供给开关电容器的差分模拟信号而充电的开关电容器。 借助于恒定电流源，电容器在输出电路上放电。 电容器的充电电平与模拟信号成比例，使得电容放电到选定的低电荷电平所需的时间与模拟信号成比例。 这个时间段由微处理器控制使用以产生具有等于电容器的放电时间的脉冲的数字脉冲。 微处理器还选择性地将输入和输出电路连接到电容器，以分别对电容器充电和放电。

公开(公告)号：US20180212616A1

公开(公告)日：2018-07-26

申请号：US15739206

申请日：2016-07-14

申请人： DENSO CORPORATION

发明人： Tomohiro NEZUKA

IPC分类号： H03M1/12 ,  H03M1/54 ,  H03M1/52 ,  H03M1/46 ,  H03M3/00

CPC分类号： H03M1/1245 ,  H03M1/466 ,  H03M1/52 ,  H03M1/54 ,  H03M3/454

摘要： An A/D converter is provided with: an integrator that includes an operational amplifier provided with a first input terminal and an output terminal, and an integration capacitor; a quantizer that outputs a quantization result obtained by quantizing an output signal from the operational amplifier; and a DAC that is connected to the first input terminal and determines DAC voltage. The integrator has a feedback switch between the integration capacitor and the output terminal of the operational amplifier. An analog signal as an input signal is inputted between the integration capacitor and the feedback switch. The integration capacitor samples the analog signal. The quantizer performs the quantization based on the output of the operational amplifier. The DAC sequentially subtracts electric charge accumulated in the integration capacitor to thereby change the analog signal to a digital value.