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    Generalized service protection systems and methods
    1.
    发明授权
    Generalized service protection systems and methods 有权
    广泛的服务保护体系和方法

    公开(公告)号：US09264254B2

    公开(公告)日：2016-02-16

    申请号：US13435225

    申请日：2012-03-30

    Applicant: Marc Holness ,  Stephen Daniel Shew ,  David Gilson

    Inventor： Marc Holness ,  Stephen Daniel Shew ,  David Gilson

    IPC: H04L12/437 ,  H04L12/42 ,  H04L12/931 ,  H04L12/64

    CPC classification number: H04B10/032 ,  H04J3/167 ,  H04L12/42 ,  H04L12/437 ,  H04L45/22 ,  H04L49/00 ,  H04L2012/6437 ,  H04Q11/0066 ,  H04Q2011/0081

    Abstract: A node includes a first port configured to be selectively blocked and unblocked; a second port configured to be selectively blocked and unblocked; a forwarder between the first port and the second port; a management channel between the first port and the second port, wherein the selective blocking and unblocking of the first port and the second port is based on the management channel; and a data channel between the first port and the second port, wherein the data channel utilizes an arbitrary service identifier. A method can include operating a ring with Ring Protection Switching comprising a forwarding mechanism and a blocking mechanism that are independent and decoupled entities therebetween, wherein the ring includes a management channel and a data channel that each utilize an arbitrary service identifier.

    Abstract translation: 节点包括配置为选择性地阻塞和解除阻塞的第一端口; 被配置为选择性地阻塞和解锁的第二端口; 第一端口和第二端口之间的转发器; 所述第一端口和所述第二端口之间的管理信道，其中所述第一端口和所述第二端口的选择性阻塞和解除阻塞基于所述管理信道; 以及第一端口和第二端口之间的数据信道，其中数据信道利用任意的服务标识符。 一种方法可以包括操作具有环保护交换的环，其包括在其间独立和去耦实体的转发机制和阻塞机制，其中所述环包括管理信道和每个利用任意服务标识符的数据信道。

    GENERALIZED SERVICE PROTECTION SYSTEMS AND METHODS
    2.
    发明申请
    GENERALIZED SERVICE PROTECTION SYSTEMS AND METHODS 有权
    一般服务保护系统和方法

    公开(公告)号：US20130258840A1

    公开(公告)日：2013-10-03

    申请号：US13435225

    申请日：2012-03-30

    Applicant: Marc HOLNESS ,  Stephen Daniel SHEW ,  David GILSON

    Inventor： Marc HOLNESS ,  Stephen Daniel SHEW ,  David GILSON

    IPC: H04L12/437 ,  H04L12/42

    CPC classification number: H04B10/032 ,  H04J3/167 ,  H04L12/42 ,  H04L12/437 ,  H04L45/22 ,  H04L49/00 ,  H04L2012/6437 ,  H04Q11/0066 ,  H04Q2011/0081

    Abstract: A node includes a first port configured to be selectively blocked and unblocked; a second port configured to be selectively blocked and unblocked; a forwarder between the first port and the second port; a management channel between the first port and the second port, wherein the selective blocking and unblocking of the first port and the second port is based on the management channel; and a data channel between the first port and the second port, wherein the data channel utilizes an arbitrary service identifier. A method can include operating a ring with Ring Protection Switching comprising a forwarding mechanism and a blocking mechanism that are independent and decoupled entities therebetween, wherein the ring includes a management channel and a data channel that each utilize an arbitrary service identifier.

    Abstract translation: 节点包括配置为选择性地阻塞和解除阻塞的第一端口; 被配置为选择性地阻塞和解锁的第二端口; 第一端口和第二端口之间的转发器; 所述第一端口和所述第二端口之间的管理信道，其中所述第一端口和所述第二端口的选择性阻塞和解除阻塞基于所述管理信道; 以及第一端口和第二端口之间的数据信道，其中数据信道利用任意的服务标识符。 一种方法可以包括操作具有环保护交换的环，其包括在其间独立和去耦实体的转发机制和阻塞机制，其中所述环包括管理信道和每个利用任意服务标识符的数据信道。

    APPARATUS AND METHOD FOR MAPPING A CLIENT SIGNAL
    3.
    发明申请
    APPARATUS AND METHOD FOR MAPPING A CLIENT SIGNAL 有权
    用于映射客户信号的装置和方法

    公开(公告)号：US20120134674A1

    公开(公告)日：2012-05-31

    申请号：US13305882

    申请日：2011-11-29

    Applicant: Jong Yoon SHIN ,  Jong Ho KIM ,  Ji Wook YOUN

    Inventor： Jong Yoon SHIN ,  Jong Ho KIM ,  Ji Wook YOUN

    IPC: H04B10/20

    CPC classification number: H04J3/167 ,  H04J3/0623 ,  H04J2203/0089

    Abstract: Disclosed are an apparatus and a method for mapping an SDH signal and other 40-Gbps client signals through a single data path. The mapping apparatus supports both a justification byte mapping scheme and a sigma-delta distribution mapping scheme and implements a single data path. Accordingly, power consumption may be reduced by changing each mapping mode in a hitless manner or minimizing logic capacity according to a mapping mode used in the mapping apparatus.

    Abstract translation: 公开了一种用于通过单个数据路径映射SDH信号和其他40Gbps客户端信号的装置和方法。 映射设备支持对齐字节映射方案和Σ-Δ分布映射方案，并且实现单个数据路径。 因此，可以通过根据映射设备中使用的映射模式以无中断的方式改变每个映射模式或最小化逻辑容量来降低功耗。

    Method and apparatus for synchronous switching of optical transport network signals
    6.
    发明申请
    Method and apparatus for synchronous switching of optical transport network signals 有权
    光传输网络信号同步切换的方法和装置

    公开(公告)号：US20060245450A1

    公开(公告)日：2006-11-02

    申请号：US11116510

    申请日：2005-04-28

    Applicant: Bernd Bleisteiner ,  Manfred Loeffler ,  Gerhard Meyer

    Inventor： Bernd Bleisteiner ,  Manfred Loeffler ,  Gerhard Meyer

    IPC: H04J3/22

    CPC classification number: H04J3/167 ,  H04J3/1611 ,  H04J2203/0094

    Abstract: The invention includes a method and apparatus for synchronously switching at least one plesiochronous signal within a network element. Specifically, a method according to one embodiment of the invention includes receiving the at least one plesiochronous signal, and mapping the at least one plesiochronous signal into at least one synchronous signal. The at least one synchronous signal includes at least one virtually-concatenated signal, where each of the at least one virtually-concatenated signal includes a plurality of sub-signals, and each of the sub-signals is adapted for being synchronously switched within the network element.

    Abstract translation: 本发明包括一种在网络元件内同步切换至少一个同步信号的方法和装置。 具体地，根据本发明的一个实施例的方法包括：接收所述至少一个同步信号，以及将所述至少一个准同步信号映射到至少一个同步信号中。 所述至少一个同步信号包括至少一个虚拟级联信号，其中所述至少一个虚拟级联信号中的每一个包括多个子信号，并且每个子信号适于在网络内同步地切换 元件。

    DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
    8.
    发明申请
    DATA PROCESSING DEVICE AND DATA PROCESSING METHOD 审中-公开

    公开(公告)号：US20180013505A1

    公开(公告)日：2018-01-11

    申请号：US15619843

    申请日：2017-06-12

    Applicant: FUJITSU LIMITED

    Inventor： Ken ATSUMI

    IPC: H04J3/06 ,  H04J3/16

    CPC classification number: H04J3/0623 ,  H04J3/167 ,  H04J2203/0085

    Abstract: A data processing device includes: a FIFO buffer; a write circuit writing data in the buffer according to a write clock signal; a read circuit reading data from the buffer according to a read clock signal, a PLL circuit conducting a phase synchronization processing of the read clock signal based on a phase difference between the write and read clock signals and outputting a notification signal when the phase difference becomes within a predetermined range; a write control circuit controlling a timing when the write circuit starts writing based on the notification signal; a read control circuit comparing an address in which data is written and a reference address and controlling a timing when the read circuit starts reading based on a comparison result; and a correction circuit correcting the reference address with a value corresponding to the phase difference obtained when the notification signal has been output.

    Method and apparatus for forming and processing data units
    9.
    发明授权
    Method and apparatus for forming and processing data units 有权

    公开(公告)号：US09813176B2

    公开(公告)日：2017-11-07

    申请号：US13807571

    申请日：2010-08-23

    Applicant: Sergio Lanzone ,  Orazio Toscano

    Inventor： Sergio Lanzone ,  Orazio Toscano

    IPC: H04J3/14 ,  H04J3/16 ,  H04J3/06

    CPC classification number: H04J3/14 ,  H04J3/0647 ,  H04J3/1652 ,  H04J3/167

    Abstract: The invention relates to data networks, and in particular relates to a method and apparatus for forming and processing data units to enable the transfer of clock quality information in data networks. A method of forming a higher order data unit, comprising payload data and overhead data, from a plurality of lower order data units, is disclosed. The payload of the higher order data unit is formed by combining the plurality of lower order data units. The overhead data of the higher order data unit includes clock quality information relating to clocks associated with the plurality of lower order data units. Embodiments provide a way of transporting clock quality information relating to clocks associated with a number of lower order data units within a single higher order data unit, and enables intermediate networks easily to access the clock quality information.

    Transmission apparatus and method for controlling the transmission apparatus
    10.
    发明授权
    Transmission apparatus and method for controlling the transmission apparatus 有权

    公开(公告)号：US09755748B2

    公开(公告)日：2017-09-05

    申请号：US14525248

    申请日：2014-10-28

    Applicant: FUJITSU LIMITED

    Inventor： Makoto Ohtou ,  Mitsuo Yoneda

    IPC: H04B10/27 ,  H04B10/077 ,  H04J3/16 ,  H04B10/50

    CPC classification number: H04B10/27 ,  H04B10/0779 ,  H04B10/50 ,  H04B2210/072 ,  H04J3/167 ,  H04J2203/0057

    Abstract: A transmission apparatus includes: a data signal processor to add first data of a control signal to a data signal received, and transmit the data signal; a first signal output module to output second data of the control signal; an update controller to control an update of a function included in the first signal output module; and a second signal output module, when receiving a notice of an instruction for updating the function from the update controller, to output the first data that is the second data held therein when the notice thereof is received, wherein the second signal output module, when receiving a notice of a completion for updating the function from the update controller, outputs the first data that is the second data received from the first signal output module updated by the update controller.

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