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公开(公告)号：US20240196530A1
公开(公告)日：2024-06-13
申请号：US18284643
申请日：2022-03-17
Applicant: MITSUI MINING & SMELTING CO., LTD.
Inventor： Yukiko KITABATAKE , Mikiko KOMIYA , Yoshinori MATSUURA
CPC classification number: H05K1/111 , H01L24/13 , H01L24/81 , H05K1/0306 , H05K1/036 , H05K3/26 , H01L24/16 , H01L2224/13147 , H01L2224/16238 , H01L2224/80013 , H01L2224/81203 , H01L2924/3511 , H01L2924/3841 , H05K2201/099
Abstract: Provided is a method for manufacturing a multilayer substrate capable of suppressing short circuits between bumps and the warpage of substrates. This method includes: providing a first substrate being a rigid substrate including first bumps, and a second substrate or semiconductor device including second bumps, the first bumps and the second bumps being composed of a metal or alloy having a melting point of 600° C. or more, and having a height of 0.3 μm or more; performing cleaning treatment on bonding surfaces of the first bumps and the second bumps under a pressure of 1×10−3 Pa or less, and subsequently stacking the first substrate and the second substrate or semiconductor device so that the bonding surfaces of the first bumps and the second bumps abut each other, and pressure-welding the first bumps and the second bumps at a temperature of 90° C. or less to form a multilayer substrate.
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公开(公告)号：US11792929B2
公开(公告)日：2023-10-17
申请号：US17588457
申请日：2022-01-31
Applicant: IBIDEN CO., LTD.
Inventor： Takema Adachi , Daisuke Minoura
IPC: H05K1/02 , H05K1/09 , H05K3/10 , H05K3/26 , H05K3/38 , H01L23/13 , H01L23/60 , H01L23/498 , H05K1/11 , H05K3/42
CPC classification number: H05K1/116 , H05K3/26 , H05K3/389 , H05K3/422 , H05K2201/0989
Abstract: A wiring substrate includes a first insulating layer, a first conductor layer, a second insulating layer, a second conductor layer, a connection conductor penetrating through the second insulating layer and connecting the first and second conductor layers, and a coating film formed on a surface of the first conductor layer such that the coating film is adhering the first conductor layer and the second insulating layer. The first conductor layer includes a conductor pad and a wiring pattern such that the conductor pad is in contact with the connection conductor and the wiring pattern is covered by the coating film, the conductor pad of the first conductor layer has a surface facing the second insulating layer and having a first surface roughness higher than a surface roughness of a surface of the wiring pattern, and the coating film has opening such that the opening is exposing the conductor pad entirely.
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公开(公告)号：US20180346781A1
公开(公告)日：2018-12-06
申请号：US16054493
申请日：2018-08-03
Applicant: HONEYWELL INTERNATIONAL INC.
Inventor： Robert C. Johnson , Hsueh S. Tung , Rajiv R. Singh , Ian Shankland
IPC: C09K5/04 , B01F17/00 , C10M171/00 , C09K3/00 , C09K21/08 , A62D1/06 , C11D7/50 , C11D11/00 , C23G5/028 , C10M101/02 , G03F7/42 , F25B31/00 , F25B1/00 , C11D3/43 , C08J9/14 , C11D7/30 , H05K3/26
CPC classification number: C09K5/044 , A62D1/06 , B01F17/0035 , C08J9/144 , C09K3/00 , C09K5/045 , C09K21/08 , C09K2205/102 , C09K2205/104 , C09K2205/12 , C09K2205/122 , C09K2205/126 , C10M101/02 , C10M171/008 , C10M2203/003 , C10N2220/302 , C10N2240/30 , C11D3/43 , C11D7/30 , C11D7/5018 , C11D11/0047 , C23G5/02809 , C23G5/02825 , F25B1/00 , F25B31/002 , G03F7/426 , H05K3/26 , Y02C20/30
Abstract: Compositions and methods based on the use of fluoroalkene containing from 3 to 4 carbon atoms and at least one carbon-carbon double bond, such as HFO-1214, HFO-HFO-1233, or HFO-1354 having properties highly beneficial in foaming and blowing agent applications, articles and methods.
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公开(公告)号：US20180330874A1
公开(公告)日：2018-11-15
申请号：US16040699
申请日：2018-07-20
Applicant: JAQUET TECHNOLOGY GROUP AG , FRAUNHOFER-GESELLSCHAFT ZUR FÖRDERUNG DER ANGEWANDTEN FORSCHUNG E.V
Inventor： Andreas Tuor , Oliver Hirsch , Martin Ihle , Steffen Ziesche
CPC classification number: H01F41/043 , F02B39/00 , F02B39/16 , F02C6/12 , F02M26/02 , F04D27/001 , F04D29/023 , F04D29/284 , F05D2220/40 , F05D2240/14 , F05D2240/30 , F05D2270/80 , F05D2270/821 , F05D2300/50 , G01P1/026 , G01P3/49 , H01F27/2804 , H01F27/29 , H01F2027/2809 , H02K3/26 , H02K15/0407 , H02K2203/03 , H05K1/0306 , H05K1/165 , H05K3/0029 , H05K3/005 , H05K3/107 , H05K3/1216 , H05K3/1225 , H05K3/26 , H05K3/4061 , H05K3/4629 , H05K2201/09672 , H05K2203/0278 , H05K2203/107 , H05K2203/1476
Abstract: A method for manufacturing a sensor module having a passive electrical component comprises punching a plurality of holes in a first green sheet of a plurality of green sheets, and forming a plurality of channels and a plurality of passageways in a second green sheet of the plurality of green sheets by using a laser on the second green sheet. A metallization paste is printed in the plurality of holes, the plurality of channels, and the plurality of passageways, and the first green sheet and the second green sheet are dried with the metallization paste. The method further comprises aligning, stacking, laminating, and sintering the plurality of green sheets together to create a sintered tile, and separating a plurality of coils of the sintered tile in order to obtain the sensor module.
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公开(公告)号：US10057992B2
公开(公告)日：2018-08-21
申请号：US14422477
申请日：2013-08-15
Applicant: HITACHI METALS, LTD.
Inventor： Hiroyuki Teshima , Hisayuki Imamura , Junichi Watanabe
IPC: B23K31/02 , H05K3/02 , C23F1/02 , C23F1/44 , C23F1/30 , B23K1/00 , B23K1/19 , C04B37/02 , H05K3/06 , H05K3/26 , H05K1/03
CPC classification number: H05K3/022 , B23K1/0016 , B23K1/19 , C04B37/026 , C04B2237/125 , C04B2237/366 , C04B2237/368 , C04B2237/402 , C04B2237/407 , C04B2237/68 , C04B2237/70 , C23F1/02 , C23F1/30 , C23F1/44 , H05K1/0306 , H05K3/06 , H05K3/26 , H05K2203/04 , H05K2203/0766 , Y10T428/12056
Abstract: A method for producing a ceramic circuit substrate comprising the steps of forming brazing regions each comprising brazing material powder and an organic binder on a ceramic substrate; setting metal plates on the ceramic substrate via the brazing regions, and heating the ceramic substrate, the brazing regions and the metal plates to bond the metal plates to the ceramic substrate via brazing layers made of the brazing material, thereby forming a bonded body; and cleaning the bonded body with a hypochlorite-containing agent.
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6.发明申请
公开(公告)号：US20180056422A1
公开(公告)日：2018-03-01
申请号：US15348787
申请日：2016-11-10
Applicant: Hyundai Motor Company
Inventor： Jeejung KIM , Min Gun Jeong
CPC classification number: B23K1/0016 , B23K1/203 , B23K35/0227 , B23K35/025 , B23K35/262 , B23K35/3601 , B23K35/3613 , B23K35/3618 , B23K35/362 , B23K2101/42 , H05K3/26 , H05K3/3484 , H05K3/3489
Abstract: A soldering flux composition containing a resin, a solvent, and carbon particles is provided herein.
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公开(公告)号：US09869027B2
公开(公告)日：2018-01-16
申请号：US15134672
申请日：2016-04-21
Applicant: Samsung Display Co., Ltd. , LTCAM CO., LTD.
Inventor： Bong-Yeon Kim , Jin-Ho Ju , Jun-Hyuk Woo , Jung-Hwan Song , Seok-Ho Lee , Seong-Sik Jeon , Jong-Su Han
IPC: C09K13/04 , C23F1/16 , C11D11/00 , H01L21/02 , H05K3/26 , C11D7/32 , C11D7/26 , C11D7/08 , C11D7/06 , C23F11/04 , H05K3/06 , H05K1/03 , H05K3/38
CPC classification number: C23F1/16 , C11D7/06 , C11D7/08 , C11D7/265 , C11D7/3209 , C11D7/3245 , C11D11/0047 , C23F11/04 , H01L21/02068 , H05K1/0306 , H05K3/064 , H05K3/26 , H05K3/388 , H05K2201/0317 , H05K2201/0341 , H05K2203/124 , H05K2203/125
Abstract: A cleaning composition includes about 0.01 to about 5 wt % of a chelating agent; about 0.01 to about 0.5 wt % of an organic acid; about 0.01 to about 1.0 wt % of an inorganic acid; about 0.01 to about 5 wt % of an alkali compound; and deionized water.
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公开(公告)号：US20170342566A1
公开(公告)日：2017-11-30
申请号：US15537963
申请日：2015-09-17
Applicant: MEC COMPANY LTD.
Inventor： Yuko SHIBANUMA , Tatsuya GODA , Jojiro NIGORO , Tomoko ICHIHASHI , Keisuke JOKO , Takahiro YAMADA , Tsuyoshi AMATANI
CPC classification number: C23C18/1689 , C23C18/1834 , C23C18/54 , H05K3/187 , H05K3/24 , H05K3/26 , H05K2203/072 , H05K2203/0789
Abstract: The invention relates to a washing solution for a tin plating film after electroless tin plating and before water washing. The invention also relates to a method for forming a tin plating film, the method includes a step of washing step using the washing solution. The washing solution according to the present invention is an acidic aqueous solution containing an acid, a complexing agent, a stabilizer and a chloride ion. The washing solution has a chloride ion concentration of 2 wt % or more, and a tin concentration of 0.5 wt % or less. The washing solution according to the present invention has good washing property for a tin plating film surface, and allows a tin plating film to easily maintain its properties. In addition the washing solution causes little influence on a tin plating film surface even when continuously used and is excellent in temporal stability.
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公开(公告)号：US20170294399A1
公开(公告)日：2017-10-12
申请号：US15509492
申请日：2015-09-28
Applicant: MITSUBISHI MATERIALS CORPORATION
Inventor： Shuji Nishimoto , Yoshiyuki Nagatomo
IPC: H01L23/00
CPC classification number: H01L24/32 , H01L23/12 , H01L23/36 , H01L23/3735 , H01L23/40 , H01L23/473 , H01L25/07 , H01L25/18 , H01L2224/32225 , H01L2924/01047 , H01L2924/12041 , H01L2924/13055 , H01L2924/141 , H05K1/0203 , H05K3/24 , H05K3/248 , H05K3/26 , H05K3/32 , H05K2201/10106 , H05K2201/10166
Abstract: A power module substrate with a Ag underlayer of the invention includes: a circuit layer that is formed on one surface of an insulating layer; and a Ag underlayer that is formed on the circuit layer, in which the Ag underlayer is composed of a glass layer that is formed on the circuit layer side and a Ag layer that is formed by lamination on the glass layer, and regarding the Ag underlayer, in a Raman spectrum obtained by a Raman spectroscopy with incident light made incident from a surface of the Ag layer on a side opposite to the glass layer, when a maximum value of intensity in a wavenumber range of 3,000 cm−1 to 4,000 cm−1 indicated by IA, and a maximum value of intensity in a wavenumber range of 450 cm−1 to 550 cm−1 is indicated by IB, IA/IB is 1.1 or greater.
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公开(公告)号：US20170164481A1
公开(公告)日：2017-06-08
申请号：US15039372
申请日：2014-10-09
Inventor： Johannes Stahr , Mike Morianz
CPC classification number: H05K1/185 , H01L23/5384 , H01L23/5389 , H01L24/24 , H01L24/25 , H01L24/82 , H01L24/96 , H01L2224/04105 , H01L2224/05647 , H01L2224/24137 , H01L2224/24195 , H01L2224/244 , H01L2224/2518 , H01L2224/8201 , H01L2224/82039 , H01L2224/82359 , H01L2224/82379 , H01L2924/1203 , H01L2924/13055 , H01L2924/13091 , H05K1/0298 , H05K1/115 , H05K1/189 , H05K3/0035 , H05K3/0038 , H05K3/0055 , H05K3/108 , H05K3/26 , H05K3/46 , H05K2201/09509 , H05K2201/10166 , H05K2201/10174 , H05K2203/0392 , H05K2203/125
Abstract: A printed circuit board structure that includes at least one insulation layer, at least one conductor layer, and at least one embedded component having a contact pad that has an outer barrier layer, in which structure at least two conductor paths/conductor layers are connected to at least two connections using vias, and each via runs from a conductor path/conductor layer directly to the barrier contact layer of the corresponding connection of the component.
