公开(公告)号：US25403A

公开(公告)日：1859-09-13

申请号：US25403D

CPC分类号： A01B35/06 ,  Y10S336/01 ,  Y10S505/858 ,  Y10S505/859

公开(公告)号：US4749888A

公开(公告)日：1988-06-07

申请号：US45152

申请日：1987-05-04

申请人： Shigeki Sakai ,  Hiroshi Akoh ,  Hisao Hayakawa ,  Akihiko Yagi

发明人： Shigeki Sakai ,  Hiroshi Akoh ,  Hisao Hayakawa ,  Akihiko Yagi

IPC分类号： G11C19/32 ,  H01L39/22 ,  H03K3/38 ,  H03K19/195

CPC分类号： H03K3/38 ,  G11C19/32 ,  H01L39/223 ,  H03K19/195 ,  Y10S505/857 ,  Y10S505/858

摘要： A Josephson transmission line device comprising a Josephson transmission line consisting of a pair of superconducting layers and a junction layer disposed between the superconducting layers to constitute a Josephson junction; a fluxon stopping position constituted by at least one resistor element in at least a part of the Josephson transmission line; a fluxon driving current source connected to the resistor element; a fluxon generating current source connected to the Josephson transmission line for generating fluxons therein; and an output circuit for extracting the fluxons generated in the Josephson transmission line as output signals. Fluxons generated in the Josephson transmission line can be made to stop at and depart from the stopping positions by selective application of fluxon driving current. Therefore, the Josephson transmission line can, alone or in combination with other such lines, be made to operate as compact, high-speed, low power-dissipation Josephson electronic circuit devices capable of functioning as logic circuits, memories, pulse generators, etc.

摘要翻译： 约瑟夫逊传输线装置，包括由一对超导层和布置在超导层之间的结层组成的约瑟夫逊传输线，以构成约瑟夫逊结; 在约瑟夫逊传输线的至少一部分中由至少一个电阻元件构成的磁通停止位置; 连接到电阻元件的磁通驱动电流源; 连接到约瑟夫逊传输线的用于产生其中的助剂的通量产生电流源; 以及用于提取在约瑟夫逊传输线中产生的磁通的输出电路作为输出信号。 通过选择性地施加助熔剂驱动电流，可以在约瑟夫逊输电线路中产生的助焊剂停止并停止停止位置。 因此，约瑟夫逊传输线可以单独或与其他线路组合，使其能够作为能够用作逻辑电路，存储器，脉冲发生器等的紧凑型，高速度，低功耗的约瑟夫森电子电路器件。

公开(公告)号：US4623804A

公开(公告)日：1986-11-18

申请号：US575523

申请日：1984-01-31

申请人： Eiichi Goto

发明人： Eiichi Goto

IPC分类号： H01L39/22 ,  H03K19/195

CPC分类号： H03K19/1952 ,  Y10S505/858

摘要： Disclosed is a fluxoid type superconducting logic element essentially comprising a pair of SQUIDs connected with each other so as to put one of said SQUIDs into its "firing state" and the other into its "extinction state" in response to an input signal in the form of magnetic flux, thereby representing a binary digit at its output terminals.

摘要翻译： 公开了一种基本上包括彼此连接的一对SQUID的磁通型超导逻辑元件，以便响应于形式的输入信号将所述SQUID中的一个置于其“触发状态”，而另一个SQUID进入其“消光状态” 的磁通量，从而在其输出端子处表示二进制数字。

公开(公告)号：US3119100A

公开(公告)日：1964-01-21

申请号：US70166857

申请日：1957-12-09

申请人： THOMPSON RAMO WOOLDRIDGE INC

发明人： NYBERG JAMES J

IPC分类号： G11C11/44

CPC分类号： G11C11/44 ,  Y10S505/858

公开(公告)号：US5099152A

公开(公告)日：1992-03-24

申请号：US651528

申请日：1991-02-06

申请人： Hideo Suzuki

发明人： Hideo Suzuki

IPC分类号： H03K19/0175 ,  H03K19/195

CPC分类号： H03K19/017509 ,  H03K19/017545 ,  H03K19/1952 ,  Y10S505/858

摘要： A superconducting circuit for performing a logic operation and producing an output indicative of the result of the logic operation with a logic amplitude suitable for processing by an external circuit, is provided by a Josephson processing circuit which performs the logic operation and produces an output logic signal with a first logic amplitude, a voltage amplification circuit which is supplied with the output logic signal from the Josephson processing circuit and produces an output signal having a second logic amplitude which is substantially larger than the first logic amplitude, and an impedance conversion circuit which is supplied with the output signal of the voltage amplification means and produces the output of the superconducting circuit, with an output impedance suitable for transferring to the external circuit. The voltage amplification circuit includes a plurality of superconducting quantum devices connected in series and produces the output signal of the second logic amplitude as a sum of the voltage transitions caused in response to the respective transitions of the Josephson junctions included therein. The impedance conversion circuit provides a high input impedance such that the operation of the voltage amplification circuit is not influenced by the current associated with the output signal to the impedance conversion circuit.

公开(公告)号：US4859879A

公开(公告)日：1989-08-22

申请号：US194688

申请日：1988-05-16

申请人： John X. Przybysz

发明人： John X. Przybysz

IPC分类号： H03K5/02 ,  H03K19/195

CPC分类号： H03K19/1956 ,  Y10S505/858 ,  Y10S505/861

摘要： This is a superconducting digital logic amplifier for interfacing superconductor circuits with semiconductor circuits. It provides a gigahertz amplifier to convert low voltage superconducting logic signals to higher voltage signals, suitable for semiconductor signal processing circuits. It may, for example, provide a factor of ten voltage gain to raise the 2.5 mV Josephson logic signals of conventional metallic superconductor circuitry to 25 mV signals for input into inexpensive semiconductor amplifiers which, in turn, can power semiconductor logic circuitry. Generally, it utilizes a first series string of Josephson junctions in series with an input Josephson junction to provide a series combination which is then connected in parallel with a second string of higher critical current Josephson junctions. The input signal is introduced between the first series string and the input Josephson junction, and the output terminal is connected at the common connection opposite the input Josephson junction. A pulsed DC current source is also connected at the common connection with the output terminal. The current from Josephson junction logic circuitry is introduced through the input Josephson junction, exceeding its critical current and switching this Josephson junction to the resistive state, the combined input and current from the DC current source, then switch the Josephson junctions in the second series to the resistive state, and the DC current source finally switches Josephson junctions in the first string to the resistive state, giving an output voltage of the sum of all of the voltages across the Josephson junctions in the series strings. Thus, with nine Josephson junction in the first series string, plus the input Josephson junction in series with the first series string, and with ten Josephson junctions in the second series string, for example, the amplifier provides a factor of 10 in voltage between its input and output.

摘要翻译： 这是一种用于将超导体电路与半导体电路连接的超导数字逻辑放大器。 它提供一个千兆赫兹放大器，将低电压超导逻辑信号转换成适用于半导体信号处理电路的更高电压信号。 例如，它可以提供10倍的电压增益，以将常规金属超导体电路的2.5mV约瑟夫逊逻辑信号提升到25mV信号，以便输入到便宜的半导体放大器中，这又可以为半导体逻辑电路供电。 通常，它使用与输入约瑟夫逊结串联的约瑟夫逊结的第一串串串，以提供串联组合，然后与第二串较高临界电流约瑟夫逊结并联连接。 输入信号被引入到第一串联串和输入约瑟夫逊结之间，输出端连接在与输入约瑟夫逊结相对的公共连接处。 在与输出端子的公共连接处也连接有脉冲直流电流源。 来自约瑟夫逊结逻辑电路的电流通过输入约瑟夫逊结引入，超过其临界电流并将该约瑟夫逊结切换到电阻状态，即来自直流电流源的组合输入和电流，然后将第二系列中的约瑟夫逊结转换为 电阻状态和DC电流源最终将第一串中的约瑟夫逊结切换到电阻状态，给出串联串中的约瑟夫逊结上的所有电压之和的输出电压。 因此，在第一串串中的九个约瑟夫逊结，加上与第一串串串联的输入约瑟夫逊结，并且在第二串串中具有十个约瑟夫逊结，例如，放大器在其之间的电压提供10倍 输入和输出。

公开(公告)号：US4496854A

公开(公告)日：1985-01-29

申请号：US362581

申请日：1982-03-29

申请人： Cheng-Chung J. Chi ,  Arthur Davidson ,  Chang-Chyi Tsuei

发明人： Cheng-Chung J. Chi ,  Arthur Davidson ,  Chang-Chyi Tsuei

IPC分类号： H03F19/00 ,  G01R33/035 ,  H01L39/22 ,  H03H7/38 ,  H03K17/92 ,  H03K3/38

CPC分类号： G01R33/0354 ,  H03H7/38 ,  Y10S505/858 ,  Y10S505/865

摘要： A superconducting circuit including at least two DC SQUID stages integrated on the same superconducting chip and coupled by a circuit providing efficient transfer of current from the first SQUID stage to the second SQUID stage with large bandwidth. Each SQUID stage is comprised of a superconducting loop having at least two Josephson devices therein, there being shunt resistors across the Josephson devices to render them nonhysteretic. The coupling means between stages is directly connected to the shunt resistors of the first stage and includes a transmission line and an impedance circuit for matching the impedance of the transmission line, where the impedance circuit provides a real impedance over a large frequency range up to approximately the frequency of Josephson oscillation of the Josephson devices in DC SQUID. Feedback from the second SQUID stage to the first SQUID stage improves the input dynamic range and linearity of the circuit.

摘要翻译： 一种超导电路，其包括集成在同一超导芯片上的至少两个DC SQUID级，并通过电路耦合，从而提供电流从第一SQUID级到具有大带宽的第二SQUID级的有效传输。 每个SQUID级由其中具有至少两个约瑟夫逊器件的超导回路组成，在约瑟夫逊器件上存在分流电阻器，以使其不滞后。 级之间的耦合装置直接连接到第一级的分流电阻器，并且包括用于匹配传输线的阻抗的传输线和阻抗电路，其中阻抗电路在大的频率范围内提供实际阻抗，直到大约 约瑟夫逊器件在DC SQUID中的约瑟夫逊振荡频率。 从第二SQUID阶段到第一SQUID阶段的反馈改善了电路的输入动态范围和线性度。

公开(公告)号：US4371796A

公开(公告)日：1983-02-01

申请号：US181855

申请日：1980-08-27

申请人： Susumu Takada

发明人： Susumu Takada

IPC分类号： H01L39/22 ,  H03K17/92 ,  H03K19/195

CPC分类号： H03K19/1956 ,  H03K17/92 ,  Y10S505/858

摘要： A Josephson logic gate device comprises a closed loop of four Josephson junctions, a gate line and a ground line connected to the closed loop at symmetrically opposite points, and a control line connected to the closed loop at the intermediate joint between the gate line and ground line. This logic gate produces a switching function in which the gate current fed to the gate line is steered from the gate to the load by the transition between the zero-voltage state and the voltage state of the device when a control current is supplied into the control line.

摘要翻译： 约瑟夫森逻辑门装置包括四个约瑟夫逊结的闭环，栅极线和连接到对称相对点处的闭环的接地线，以及连接到栅极线和地之间的中间接合处的闭环的控制线 线。 该逻辑门产生开关功能，其中当控制电流提供给控制器时，通过零电压状态和器件的电压状态之间的转变，馈送到栅极线的栅极电流从栅极转向负载 线。

公开(公告)号：US4149097A

公开(公告)日：1979-04-10

申请号：US865815

申请日：1977-12-30

申请人： Sadeg M. Faris

发明人： Sadeg M. Faris

IPC分类号： G11C11/44 ,  H03K5/1534 ,  H03K17/92 ,  H03K19/195 ,  H03K5/153

CPC分类号： G11C11/44 ,  H03K17/92 ,  H03K19/1952 ,  H03K5/1534 ,  Y10S505/858

摘要： A waveform transition sensitive Josephson junction circuit having sense bus and logic applications is disclosed. In a preferred embodiment, a device capable of carrying Josephson current is shunted by a utilization circuit. Current flowing in the device is diverted to the utilization circuit in response to only one of a pair of transitions of a pulsed input applied to the device. On one transition of the applied pulsed input current, a current is induced in a current path which follows the input until the threshold of a switchable device in the current path is exceeded. The switchable device switches and the induced current drops to zero. If the current generated by the transition is in the opposite direction to current in the Josephson device, the Josephson device remains in its unswitched state. On the other transition of the pulsed input, the induced current follows the input and appears as an oppositely directed current in the Josephson device causing it to switch and deliver current to the utilization circuit. The switching of the switchable device when its threshold is exceeded reduces the induced current to zero. The current applied to the Josephson device and the input applied thereto may both be derived from pulsed sources with the Josephson devices of the circuit operating in latching or self-resetting modes.

摘要翻译： 公开了具有感测总线和逻辑应用的波形转换敏感约瑟夫逊结电路。 在优选实施例中，能够携带约瑟夫逊电流的装置由利用电路分流。 响应于施加到该装置的脉冲输入的一对转换中的一个，流过装置的电流被转移到利用电路。 在所施加的脉冲输入电流的一个转变中，在电流路径中感应电流，该电流跟随输入，直到超过当前路径中的可切换装置的阈值。 可切换设备切换，感应电流下降到零。 如果由转换产生的电流与约瑟夫逊器件中的电流相反，则约瑟夫逊器件保持在其未切换状态。 在脉冲输入的另一个转换中，感应电流跟随输入，并且在约瑟夫逊器件中显示为相反方向的电流，从而使其切换并将电流传递到利用电路。 可切换装置在超过阈值时的切换将感应电流降至零。 施加到约瑟夫森装置的电流和施加到其上的输入可以由电路中的约瑟夫逊器件以锁存或自复位模式工作的脉冲源得到。

公开(公告)号：US3978351A

公开(公告)日：1976-08-31

申请号：US592000

申请日：1975-06-30

申请人： Hans Helmut Zappe

发明人： Hans Helmut Zappe

IPC分类号： H03K19/195 ,  H01L39/22 ,  H03K17/92 ,  H03K3/38

CPC分类号： H01L39/223 ,  Y10S505/858 ,  Y10S505/865

摘要： A quantum interference Josephson junction logic device is disclosed which comprises three or more junctions connected in parallel which are capable of carrying Josephson current and includes means integral with at least one of the junctions for carrying a larger maximum Josephson current than the remaining junctions. This integral means includes means for carrying a maximum Josephson current which is twice as large as the maximum Josephson current in the remaining junctions. While the spacing between the lobes of the threshold curve (I.sub.m vs. I.sub.c) is increased over that of a two junction interferometer by adding another junction resulting in an increased operating region in which logic circuits switch to the voltage state, good current gains with large lobe separation could not be achieved by the mere addition of junctions. Current gain with large lobe separation is obtained if the two outer junctions having a zero field threshold current, I.sub.o, are connected via an inductance, L, to the center junction with a maximum Josephson current, 2I.sub.o. The gain is maximized if the gate current, I.sub.g, is fed into the device through inductances, L.sub.p, having a value of inductance approximately equal to 3L in the center of inductances L which are disposed between pairs of junctions forming a symmetrical dual feed. Increased gain and operating range can be achieved using the symmetrical dual feed and interferometer arrangements where the maximum Josephson current in all the junctions thereof is the same.

摘要翻译： 1534785超导布置国际商业公司1976年6月4日[1975年6月30日] 23291/76标题H3X在包含三个或更多个并联连接和负载的约瑟夫逊结的超导干涉仪电路中，获得栅极电流I的极限 通过在切换之前将具有零施加场的交点的相位差＃设定为基本相同的值，使得有效切换控制变得无关紧要，并且增益得到改善。 在其最简单的形式中，3个约瑟夫逊结J 1至J 3的最外面通过相应的电感器L提供栅极电流，而接点J2被直接馈入，并且具有比（2）最大约瑟夫逊电流I 0高的 其他路口，图。 2B（未示出）。 改进之处在于通过连接到电感器L上的抽头的分割路径将栅极电流I g提供给3个结。 如图3B所示，每个路径分支包括值为L p = 3L的电感器L p。 这种布置可以形成为一体的结构，并且可选地所有的结可以具有相同的最大值。 还使用4个连接点描述了一个实施例。