公开(公告)号：US12092654B2

公开(公告)日：2024-09-17

申请号：US17663865

申请日：2022-05-18

Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.

Inventor： Jinrong Huang

IPC: G01R1/04 ,  G01R1/02 ,  G01R1/067 ,  G01R1/073 ,  G01R31/20 ,  G01R31/28

CPC classification number: G01R1/0425 ,  G01R1/0416 ,  G01R31/2884 ,  G01R31/2893 ,  G01R31/2896

Abstract: The present disclosure discloses an assembly for carrying a chip, and a device and a method for testing a chip. The assembly for carrying a chip is configured to fasten chips of different sizes, and includes a rotatable vertical rod, a cross beam, a first sidewall, and a second sidewall. The rotatable vertical rod is provided with a gear that surrounds the rotatable vertical rod with gear teeth. The cross beam is internally provided with a first through hole and a first chute. A top of the first sidewall is connected to a first connecting rod located in the first chute. A top of the second sidewall is connected to a second connecting rod located in the first chute. A side surface of the first connecting rod is provided with a plurality of first tooth grooves arranged linearly.

公开(公告)号：US11841381B2

公开(公告)日：2023-12-12

申请号：US17950467

申请日：2022-09-22

Applicant: CHROMA ATE INC.

Inventor： Tsun-I Wang ,  I-Shih Tseng ,  Min-Hung Chang ,  Tzu-Tu Chao

IPC: G01R31/20 ,  G01R1/073 ,  G01R1/067 ,  G01R1/28 ,  G01R31/3185

CPC classification number: G01R1/07385 ,  G01R1/06766 ,  G01R1/28 ,  G01R31/318511

Abstract: A wafer inspection method and inspection apparatus are provided. On a wafer having layout lines connecting electrode points of individual dies in series, the dies within a matrix range are inspected one after another in turn in a column/row control means by a first switch group and a second switch group of a probe card, so that each die is selectively configured in a test loop of a test process by turning on/off of a corresponding switch. Thus, after inspection of a die under inspection (a selected die) within the matrix range is complete, the column/row control means is used to switch to a next die to achieve fast switching. Accordingly, for the inspection procedure of each die within the matrix region, a conventional procedure of moving one after another in turn can be eliminated, significantly reducing the total test time needed and enhancing inspection efficiency.

公开(公告)号：US11821942B2

公开(公告)日：2023-11-21

申请号：US17461961

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chuan-Hsiang Sun ,  Bo-You Chen ,  Chi-Chang Lai ,  Hsiou-Yu He ,  Peiwei Lin

IPC: G01R1/02 ,  G01R1/04 ,  G01R1/067 ,  G01R1/073 ,  G01R1/44 ,  G01R31/00 ,  G01R31/20 ,  G01R31/26 ,  G01R31/28

CPC classification number: G01R31/2889 ,  G01R1/06772

Abstract: An apparatus for probing a device-under-test (DUT) includes a fixture disposed over the DUT, a circuitry film disposed along a contour of the fixture, a first signal connector, and a plurality of probing tips disposed on the circuitry film and extending toward the device-under-test. The circuitry film includes a first portion attached to a top sidewall of the fixture, and the first signal connector is disposed on and electrically connected to the first portion of the circuitry film. The first signal connector is electrically coupled to the probing tips through the circuitry film. A method for probing a DUT is also provided.

公开(公告)号：US11719740B2

公开(公告)日：2023-08-08

申请号：US17656205

申请日：2022-03-23

Applicant: Aptiv Technologies Limited

Inventor： Biswadeep Das Gupta ,  Syed An Nazmus Saqueb ,  Ridhwan Khalid Mirza ,  Sophie Macfarland

IPC: G01R31/20 ,  G01R1/02 ,  G01R1/04 ,  G01R1/067 ,  G01R1/073 ,  G01R1/20 ,  G01R29/08 ,  G01R31/28

CPC classification number: G01R31/2808

Abstract: A test fixture for PCB components is described herein. The test fixture comprises a shim with an aperture configured to direct RF energy from a component of a PCB, via an end of the PCB, and to a top clamp of the test fixture. The end of the PCB may correspond to a cut line of a destructive test. The test fixture also comprises the top clamp with a test port and a taper configured to direct the RF energy from the aperture to the test port. The test fixture also comprises a bottom clamp attached to the top clamp to retain the PCB between the top and bottom clamps for testing. The test fixture allows for quick mounting of the PCB and testing of the component without modifying a design of the PCB or requiring specific drilling of the PCB.

公开(公告)号：US11675010B1

公开(公告)日：2023-06-13

申请号：US17537732

申请日：2021-11-30

Applicant: International Business Machines Corporation

Inventor： David Michael Audette ,  Grant Wagner ,  Jacob Louis Moore ,  Peter William Neff

IPC: G01R31/20 ,  G01R31/26 ,  G01R31/28 ,  G01R1/04 ,  G01R1/067 ,  G01R1/073 ,  G01R31/3185

CPC classification number: G01R31/318511 ,  G01R1/067

Abstract: Aspects of the invention include a wafer test device with a conformal laminate and rigid probes extending from the laminate to form an electrical connection with a microcircuit under test. The wafer test device also includes a spring plate on a side of the laminate that is opposite a side from which the rigid probes extend. The spring plate includes a conformal inner frame and a rigid outer frame. The laminate is attached to the inner frame of the spring plate.

公开(公告)号：US11674999B2

公开(公告)日：2023-06-13

申请号：US17725164

申请日：2022-04-20

Applicant: Advantest Test Solutions, Inc.

Inventor： Samer Kabbani ,  Paul Ferrari ,  Ikeda Hiroki ,  Kiyokawa Toshiyuki ,  Gregory Cruzan ,  Karthik Ranganathan

IPC: G01R31/20 ,  G01R31/26 ,  G01R31/28 ,  G01R1/04 ,  G01R1/067 ,  G01R1/073 ,  G01R1/44 ,  H01L23/473 ,  G01R31/3185

CPC classification number: G01R31/2887 ,  G01R31/318511 ,  H01L23/473 ,  F28F2260/02

Abstract: A system for testing circuits of an integrated circuit semiconductor wafer includes a tester system for generating signals for input to the circuits and for processing output signals from the circuits for testing the wafer and a test stack coupled to the tester system. The test stack includes a wafer probe for contacting a first surface of the wafer and for probing individual circuits of the circuits of the wafer, a wafer thermal interposer (TI) layer operable to contact a second surface of the wafer and operable to selectively heat areas of the wafer, and a cold plate disposed under the wafer TI layer and operable to cool the wafer. The system further includes a thermal controller for selectively heating and maintaining temperatures of the areas of the wafer by controlling cooling of the cold plate and by controlling selective heating of the wafer TI layer.

公开(公告)号：US11209462B1

公开(公告)日：2021-12-28

申请号：US16950513

申请日：2020-11-17

Applicant: STAR TECHNOLOGIES, INC.

Inventor： Choon Leong Lou ,  Hsiao Ting Tseng ,  Li Min Wang ,  Chia Hao Tu ,  Chun Wei Peng

IPC: G01R1/04 ,  G01R1/067 ,  G01R1/073 ,  G01R31/00 ,  G01R31/20

Abstract: The present application provides a testing apparatus. The testing apparatus includes a base; a first printed circuit board, disposed above the base; a stiffener, disposed adjacent to the base, located at a center of the base and passing through the first printed circuit board; a second printed circuit board, disposed at a center of the stiffener; and a probe card, one part thereof disposed adjacent to the stiffener and the other part thereof passing through the base, the first printed circuit board, the stiffener and the second printed circuit board. The base, the stiffener and the second printed circuit board are integrated and the base carries the first circuit board.

公开(公告)号：US11169206B2

公开(公告)日：2021-11-09

申请号：US16619260

申请日：2018-04-16

Applicant: TOKYO ELECTRON LIMITED

Inventor： Jun Fujihara ,  Masanori Ueda ,  Kentaro Konishi

IPC: G01R31/20 ,  G01R31/26 ,  G01R31/28 ,  G01R1/067 ,  G01R1/073

Abstract: The present disclosure is provided with a probe card and a transfer stage for transferring an inspection target toward the probe card. The transfer stage is provided with a chuck top on which the inspection target is mounted, an aligner configured to be contacted to or separated from the chuck top, and an aligning mechanism for aligning the chuck top with the aligner. The aligning mechanism has radially-expandable positioning pins at a plurality of positions on the upper surface of the aligner, and pin insertion members at positions on the lower surface of the chuck top corresponding to the positioning pins, the pin insertion members having pin insertion holes of which diameters are larger than those of the positioning pins that are not radially expanded. The chuck top is aligned with the aligner by inserting the positioning pins into the pin insertion holes and radially expanding the positioning pins.

公开(公告)号：US11105841B2

公开(公告)日：2021-08-31

申请号：US16477763

申请日：2018-01-17

Applicant: SPEA S.P.A.

Inventor： Luciano Bonaria

IPC: G01R31/20 ,  G01R31/28 ,  G01R1/067

Abstract: Machine with flying probes for testing electronic boards comprising a conveyor for loading/unloading the boards into/from the testing station, a plurality of flying probes suitable to interact with predetermined points of each board and a plurality of contacting devices arranged at the sides of the working volume of the flying probes and suitable to cooperate with contact areas arranged on one edge of the board.

公开(公告)号：US20210018556A1

公开(公告)日：2021-01-21

申请号：US16512134

申请日：2019-07-15

Applicant: The Boeing Company

Inventor： Brian Jay Tillotson

IPC: G01R31/20 ,  G01R31/02 ,  H05H7/00 ,  G01R31/12

Abstract: An eddy current system and methods of performing operations on a structure using the eddy current system are presented. The eddy current system comprises an ion beam source and a magnetic field source with at least one of variable output intensity or variable output orientation.