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公开(公告)号：US20230138545A1
公开(公告)日：2023-05-04
申请号：US17979039
申请日：2022-11-02
发明人： Jih-szu WANG
摘要： The present invention provides a test connector device for testing a component to be tested having conductive portions. The test connector device includes a base, a terminal block, and a limiting member. The terminal block is disposed on the base. The terminal block includes a substrate and terminals arranged in multiple rows and formed in an integral form with the substrate. Each of the terminals includes a first contact end and a second contact end corresponding to each other. The component to be tested is placed on the limiting member and movably assembled to one side of the base. The limiting member includes a positioning assembly and limiting slots where the first contact ends protrude out. The positioning assembly is movably fastened to the base, so that the first contact ends contact the conductive portions. Accordingly, the present invention enhances reliability, stability, and transmission efficiency during tests.
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2.发明申请公开(公告)号：US20230128736A1
公开(公告)日：2023-04-27
申请号：US17699473
申请日：2022-03-21
发明人： Jang-Hsing HSIEH , Yi-Jin WEI
摘要： A method for testing a light-emitting diode (LED) includes steps of providing a plasma generating device in proximity to a device under test (DUT) that includes the LED and a conductive port which are electrically connected to each other, and utilizing the plasma generating device to emit a plasma beam toward the conductive port of the DUT to cause generation of a positive voltage on the LED for testing the LED.
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公开(公告)号：US11637044B2
公开(公告)日：2023-04-25
申请号：US17134128
申请日：2020-12-24
发明人： Hsiang-Wen Tang , Yu-Hung Lai
摘要： A micro LED display includes a display substrate, a first soldering layer, at least one second soldering layer, first micro LEDs and at least one second micro LED. The display substrate includes a substrate having a plurality of pixel areas, a first circuit layer and a second circuit layer, and the first circuit layer and the second circuit layer are arranged in each pixel area. The first soldering layer is disposed on the first circuit layer, and the second soldering layer is disposed on the second micro LED. An arranging area of the first soldering layer is greater than an arranging area of the second soldering layer. The first micro LEDs is bonding to the first circuit layer in each pixel area through the first soldering layer. The second micro LED is bonding to the second circuit layer of one of the pixel areas through the second soldering layer.
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公开(公告)号：US20230119550A1
公开(公告)日：2023-04-20
申请号：US18069233
申请日：2022-12-21
发明人： Frank MIELKE
IPC分类号： G01R31/26
摘要： The disclosure describes an apparatus for testing a component, wherein the apparatus is configured to apply a magnetic field with a magnetic field orientation from a set of magnetic field orientations to the component. The apparatus is further configured to perform a test on the component in the presence of the respective magnetic fields with the respective magnetic field orientations from the set of magnetic field orientations to obtain an information characterizing an operation of the component. The apparatus is also configured to determine a test result based on the information characterizing the operation of the component in the presence of different magnetic fields with different magnetic field orientations from the set of magnetic field orientations. The disclosure also describes a method of testing and a computer-readable storage device for implementing the method and provides more efficiency in view of reliability and costs.
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公开(公告)号：US11624772B2
公开(公告)日：2023-04-11
申请号：US17482552
申请日：2021-09-23
摘要： A method for identifying a malfunctioning current sensor in an electrical apparatus, in which an electrical power supply of the electrical apparatus is at least partly supplied by a switched-mode electrical power supply circuit connected to at least one current sensor which samples an electrical current in a phase conductor of an electrical installation, the power supply circuit delivering a regulated electrical voltage, the method including: determining a switching duty cycle of a power switch of the switched-mode electrical power supply; analysing the determined switching duty cycle; and identifying a failure condition if the behaviour of the switching duty cycle is representative of a malfunctioning of at least one of the current sensors.
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公开(公告)号：US11624768B2
公开(公告)日：2023-04-11
申请号：US16165540
申请日：2018-10-19
申请人： VEONEER US, INC.
摘要： A system for testing a subject transistor with constant power. The system may include an amplifier, a measurement voltage source, and a exercise voltage source. The amplifier may have an output connected to a gate of the subject transistor. The amplifier may have a first input and a second input. The measurement voltage source may be connected to the first input of the amplifier for use in measuring characteristics of the subject transistor. The exercise voltage source may be connected to the first input of the amplifier for exercising the subject transistor. The second input of the amplifier may be connected to a source of the subject transistor through a resistor.
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公开(公告)号：US11624767B2
公开(公告)日：2023-04-11
申请号：US17386032
申请日：2021-07-27
发明人： Yasushi Takaki , Kinya Yamashita , Masaki Ueno
摘要： A semiconductor test apparatus according to the present disclosure includes: a stage on which a wafer is to be mounted; a pressurizing wall disposed on a surface of a probe card opposing the stage, extending toward the stage, and having an opening; a mark disposed on a lower surface of the pressurizing wall opposing the stage; a probe disposed in the opening; an air tube to force air into the opening; a detector to detect first spacing between a tip of the probe and the mark; and a controller to control second spacing between the wafer and the lower surface of the pressurizing wall based on the first spacing, wherein, when an electrical property of each of chips of the wafer is measured, the second spacing is controlled to be predetermined spacing by the controller, and the air is forced into the opening through the air tube.
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公开(公告)号：US11614479B2
公开(公告)日：2023-03-28
申请号：US17409633
申请日：2021-08-23
摘要： A device includes FETs with control terminals. A gate driver circuit causes the FETs to turn on and to enter a high-impedance state in response to an OCP signal. A current sense circuit senses an FET current through the FETs and sends the OCP signal to the gate driver circuit when the FET current exceeds an OCP current for longer than an OCP deglitch period. A test sequencer, in response to receiving an external test mode signal, sets the OCP current to a preset OCP test current, sets the OCP deglitch period to a preset OCP deglitch test period, and causes the gate driver circuit to turn on the plurality of FETs.
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公开(公告)号：US11614478B2
公开(公告)日：2023-03-28
申请号：US17226924
申请日：2021-04-09
IPC分类号： G01R31/26 , H03K17/687 , H03K5/24
摘要： A fault detection circuit includes a short circuit comparison circuit which has a first input connected to the source of the second NFET, a second input, and an output. The circuit includes an over-current comparison circuit which has a first input connected to the source of the second NFET, a second input, and an output. The circuit includes a voltage divider circuit which has a first terminal connected to first input of the short circuit comparison circuit, a second terminal connected to the first input of the over-current comparison circuit, and a third terminal connected to a ground terminal. The circuit includes a delay circuit which has an input connected to the output of the over-current comparison circuit and has an output.
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公开(公告)号：US20230088979A1
公开(公告)日：2023-03-23
申请号：US17930619
申请日：2022-09-08
摘要： A method for determining electronic band structure includes partitioning, based on a location of each of a plurality of atoms forming a crystalline structure, a volume of the crystalline structure to obtain Voronoi tessellations. The method also includes constructing, based on the Voronoi tessellations, a plurality of crystal graphs and deriving, based on the plurality of crystal graphs, one or more local structural features of the crystalline structure. The method also includes feeding, into a trained machine-learning model, the one or more local structural features, one or more global structural features of the crystalline structure, and one or more species-based features of the crystalline structure. The trained machine-learning model, in response to said feeding, returns a plurality of energy values that sample a Brillouin zone of the crystalline structure.
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