公开(公告)号：US12124346B2

公开(公告)日：2024-10-22

申请号：US18068666

申请日：2022-12-20

申请人： NVIDIA Corporation

发明人： Jonah Alben ,  Sachin Idgunji ,  Jue Wu ,  Shantanu Sarangi

IPC分类号： G06F11/267 ,  G06F1/3296 ,  G06F11/22 ,  G06F11/27 ,  G06F11/273

CPC分类号： G06F11/267 ,  G06F1/3296 ,  G06F11/2236 ,  G06F11/27 ,  G06F11/2733

摘要： In various examples, one or more components or regions of a processing unit—such as a processing core, and/or component thereof—may be tested for faults during deployment in the field. To perform testing while in deployment, the state of a component subject to test may be retrieved and/or stored during the test to maintain state integrity, the component may be clamped to communicatively isolate the component from other components of the processing unit, a test vector may be applied to the component, and the output of the component may be compared against an expected output to determine if any faults are present. The state of the component may be restored after testing, and the clamp removed, thereby returning the component to its operating state without a perceivable detriment to operation of the processing unit in deployment.

公开(公告)号：US12117913B1

公开(公告)日：2024-10-15

申请号：US18186466

申请日：2023-03-20

申请人： Future Dial, Inc.

发明人： Angel Michelle Anderson ,  Hongshan Zhang

IPC分类号： G06F11/00 ,  G06F11/22 ,  G06F11/273

CPC分类号： G06F11/2733 ,  G06F11/2294

摘要： A method includes selecting a first of a plurality of devices-under-test that has been connected in electronic communication with the test device for a longest period of time compared to others of the plurality of devices-under-test. A first task is performed on the first of the plurality of devices-under-test. After completing the first task, determining whether the test device needs to perform the first task on a second of the plurality of devices-under-test. Causing the first task to be performed on the second of the plurality of devices-under-test or selecting a third of the plurality of devices-under-test that has been connected in electronic communication with the test device for a next longest period of time compared to others of the plurality of devices-under-test.

公开(公告)号：US12078678B2

公开(公告)日：2024-09-03

申请号：US18348110

申请日：2023-07-06

申请人： NVIDIA Corporation

发明人： Shantanu Sarangi ,  Jae Wu ,  Andi Skende ,  Rajith Mavila

IPC分类号： G01R31/317 ,  G01R31/3177 ,  G01R31/3181 ,  G01R31/3185 ,  G01R31/3187 ,  G06F11/14 ,  G06F11/22 ,  G06F11/267 ,  G06F11/27 ,  G06F11/273 ,  G06F11/36

CPC分类号： G01R31/31724 ,  G01R31/3177 ,  G01R31/31813 ,  G01R31/318555 ,  G01R31/3187 ,  G06F11/1417 ,  G06F11/2268 ,  G06F11/2273 ,  G06F11/267 ,  G06F11/27 ,  G06F11/273 ,  G06F11/3688

摘要： Manufacturers perform tests on chips before the chips are shipped to customers. However, defects can occur on a chip after the manufacturer testing and when the chips are used in a system or device. The defects can occur due to aging or the environment in which the chip is employed and can be critical; especially when the chips are used in systems such as autonomous vehicles. To verify the structural integrity of the IC during the lifetime of the product, an in-system test (IST) is disclosed. The IST enables self-testing mechanisms for an IC in working systems. The IST mechanisms provide structural testing of the ICs when in a functional system and at a manufacturer's level of testing. Unlike ATE tests that are running on a separate environment, the IST provides the ability to go from a functional world view to a test mode.

公开(公告)号：US20240211363A1

公开(公告)日：2024-06-27

申请号：US18069635

申请日：2022-12-21

申请人： Apollo Autonomous Driving USA LLC

发明人： Congshi Huang

IPC分类号： G06F11/263 ,  G06F11/273

CPC分类号： G06F11/263 ,  G06F11/273

摘要： A data processing system of an autonomous driving vehicle (ADV) may include a central processing unit (CPU) and a graphics processing unit (GPU). The CPU may be configured to monitor a behavior of a graphics processing unit (GPU), operate the GPU to perform a randomly controlled operation using a random number generator, operate the GPU to perform an idle period, and operate the GPU to repeat the randomly controlled operation. The idle period may be performed between each repetition of the randomly controlled operation, and each repetition may utilize the random number generator.

公开(公告)号：US20240211361A1

公开(公告)日：2024-06-27

申请号：US17907666

申请日：2022-03-30

申请人： Horizon Journey (Hangzhou) Artificial Intelligence Technology Co., Ltd.

发明人： Jing LI ,  Yi ZHOU ,  Luyang ZHANG ,  Wenxing LI

IPC分类号： G06F11/26 ,  G06F11/263 ,  G06F11/273

CPC分类号： G06F11/261 ,  G06F11/263 ,  G06F11/2733

摘要： Disclosed are a test circuit, method, and apparatus for a to-be-tested module. The circuit includes a test data generation module including a plurality of test data generation units, each of which is configured to generate test data consistent with a data type supported by itself based on raw data consistent with the data type; and a functional safety module electrically connected to the to-be-tested module and each test data generation unit; the functional safety module being configured to perform check operation processing on the test data to obtain a first processing result, and to perform check operation processing and fault injection processing on the test data to obtain a second processing result; and the to-be-tested module being configured to generate a test result based on test data, first processing result, and second processing result. Embodiments of this disclosure can achieve multi-channel testing, thereby satisfying application requirement for processing multi-channel inputs.

公开(公告)号：US20240193059A1

公开(公告)日：2024-06-13

申请号：US18062664

申请日：2022-12-07

申请人： Communications Test Design, Inc.

发明人： Austin Gunter ,  Patrick Dameron

IPC分类号： G06F11/273 ,  G06F8/61

CPC分类号： G06F11/273 ,  G06F8/61

摘要： This application relates to apparatus and methods for simultaneously servicing a plurality of computing devices. In one example, a testing system includes a testing frame with a plurality of cabinets, each of the plurality of cabinets housing a computing device under test. Further, the testing frame includes a control cabinet housing a testing computing device, where the testing computing device is communicatively coupled, through one or more hubs located in one or more networking cabinets of the testing frame, to each of the plurality of computing devices under test. The testing frame may also include a bracket that secures a monitor and a keyboard, where the monitor and keyboard are communicatively coupled to the testing computing device. The testing computing device can simultaneously service the plurality of computing devices, such as by causing the deletion of user data, the loading of software, and the testing of various functions.

公开(公告)号：US20240142345A1

公开(公告)日：2024-05-02

申请号：US18050383

申请日：2022-10-27

申请人： Rohde & Schwarz GmbH & Co. KG

发明人： Paul Gareth Lloyd

IPC分类号： G01M99/00 ,  G06F11/273

CPC分类号： G01M99/005 ,  G06F11/273

摘要： A measurement system includes a common port, the common port being connectable to a signal output of the device under test. The measurement system further includes a signal line being connected to the common port, wherein the signal line includes a first directional coupler portion and a second directional coupler portion. The measurement system further includes a signal processing circuit, wherein the signal processing circuit includes an IQ analysis circuit and an IQ synthesizer circuit. The IQ analysis circuit is connected with the common port via the first directional coupler portion so as to receive a forward-travelling signal from the common port. Further, a testing method of testing a device under test is described.

公开(公告)号：US20240126667A1

公开(公告)日：2024-04-18

申请号：US18223627

申请日：2023-07-19

申请人： Dell Products L.P.

发明人： Huijuan Fan

IPC分类号： G06F11/273 ,  G06F11/22

CPC分类号： G06F11/2733 ,  G06F11/2257

摘要： Methods, system, and non-transitory processor-readable storage medium for an Out of Memory test baseline system are provided herein. An example method includes executing a plurality of test cases on a system. A test score calculation module calculates a test case score for each of the executed test cases in a subset of the plurality of test cases. An Out of Memory (OOM) test baseline configuration system trains a machine learning system, using the subset test scores, to predict a baseline test score for an unexecuted test case. A test case score prediction module predicts the baseline test score for the unexecuted test case. A test case configuration tuning module tunes the unexecuted test case to determine a baseline configuration for the unexecuted test case, to identify OOM issues when the unexecuted test case is executed on a test system.

公开(公告)号：US11946970B2

公开(公告)日：2024-04-02

申请号：US16778249

申请日：2020-01-31

申请人： Tektronix, Inc.

发明人： Daniel S. Froelich ,  Shane A. Hazzard ,  Sarah R. Boen ,  Jed H. Andrews

IPC分类号： G01R31/317 ,  G06F11/273 ,  G06F13/20 ,  G06F13/40 ,  G06F13/42 ,  G06F30/398 ,  H04L43/50 ,  G06F115/12

CPC分类号： G01R31/31715 ,  G06F13/20 ,  G06F13/4068 ,  G06F13/4282 ,  G06F30/398 ,  G06F2115/12 ,  G06F2213/0026

摘要： Systems, devices and methods for high-speed I/O margin testing can screen high volumes of pre-production and production parts and identify cases where the electrical characteristics have changed enough to impact operation. The margin tester disclosed is lower cost, easier to use and faster than traditional BERT and scopes and can operate on the full multi-lane I/O links in their standard operating states with full loading and cross-talk. The margin tester assesses the electrical receiver margin of an operation multi-lane high speed I/O link of a device under test simultaneously in either or both directions. In a technology-specific form, an embodiment of the margin tester can be implemented as an add-in card margin tester to test motherboard slots of a mother board under test, or as a as a motherboard with slots to test add-in cards.

公开(公告)号：US20240104211A1

公开(公告)日：2024-03-28

申请号：US17936039

申请日：2022-09-28

申请人： HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

发明人： Sebastian Kaiser ,  Florian Buehr ,  Stefan Brock ,  Nigel J. Edwards

IPC分类号： G06F21/57 ,  G06F11/267 ,  G06F11/273

CPC分类号： G06F21/57 ,  G06F11/267 ,  G06F11/273

摘要： A process includes testing a motor vehicle using a distributed computing system. The distributed computing system includes a plurality of hardware components and a plurality of software components. The plurality of hardware components includes first hardware components of the vehicle and second hardware components that are separate from the vehicle. The plurality of software components includes first software components of the vehicle and second software components separate from the vehicle. The process includes, responsive to the testing, generating, by the distributed computing system, an audit record. Generating the audit record includes determining, by the distributed computing system, integrity measurements of the first hardware components, the second hardware components, the first software components and the second software components. Generating the audit record further includes comparing, by the distributed computing system, the integrity measurements to reference measurements that correspond to reference hardware configuration for the distributed computing system and a reference software configuration for the distributed computing system. Generating the audit record includes providing, by the distributed computing system, responsive to the comparison, digitally signed data for the audit record attesting to the distributed computing system having the reference hardware configuration and the reference software configuration in connection with the testing.