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    REGION-BASED DETERMINISTIC MEMORY SAFETY
    1.
    发明申请
    REGION-BASED DETERMINISTIC MEMORY SAFETY 有权

    公开(公告)号：US20250068776A1

    公开(公告)日：2025-02-27

    申请号：US18948099

    申请日：2024-11-14

    Applicant: Intel Corporation

    Inventor： Michael LeMay ,  David M. Durham

    IPC: G06F21/79 ,  G06F12/0871 ,  G06F12/0882 ,  G06F21/55 ,  G06F21/60

    Abstract: Methods and apparatus relating to techniques for region-based deterministic memory safety are described. In some embodiment, one or more instructions may be used to encrypt, decrypt, and/or check a pointer to a portion of the data stored in memory. The portion of the data is stored in a first region of the memory. The first region of the memory includes a plurality of identically sized allocation slots. Other embodiments are also disclosed and claimed.

    System for secure multi-protocol processing of cryptographic data
    2.
    发明授权
    System for secure multi-protocol processing of cryptographic data 有权

    公开(公告)号：US12236002B2

    公开(公告)日：2025-02-25

    申请号：US17454565

    申请日：2021-11-11

    Applicant: GRIDPLUS, INC.

    Inventor： Karl J. Kreder, III

    IPC: G06F21/79 ,  G06F21/60 ,  G06F21/72 ,  G06F21/83

    Abstract: A general computing environment (GCE) determines request data comprising payload data and instruction data to use cryptographic functions in a secure computing environment (SCE). The SCE provides secure input and output devices, allowing secure presentation to a user and acquisition of user input. The SCE receives the request data and processes the payload data using the instructions in the instruction data to produce cryptographic output data. The request data may be determined using schemas that specify the formatting, grammar, and other attributes of data associated with a transaction that utilizes cryptographic functions. By using schemas and the request data, the SCE may support any protocol that uses the cryptographic functions supported by that SCE to compose cryptographic output. To enhance user comprehensibility and security, the SCE may securely replace some data with human readable text or images and present this as abstracted request data.

    INFORMATION PROCESSING METHOD AND DEVICE AND PROCESSOR
    3.
    发明申请
    INFORMATION PROCESSING METHOD AND DEVICE AND PROCESSOR 有权

    公开(公告)号：US20250045468A1

    公开(公告)日：2025-02-06

    申请号：US18784378

    申请日：2024-07-25

    Applicant: Smarter Silicon (Shanghai) Technologies Co., Ltd.

    Inventor： Yongquan JIA

    IPC: G06F21/79 ,  G06F21/60

    Abstract: An information processing method implemented by a processor having at least two instruction modules. The method includes obtaining data reading information, the data reading information being used to read target data; obtaining a data type of the target data, different data types corresponding to different security levels; and based on the data type, triggering a target instruction module corresponding to the data type security level of the target data to generate an access request to access a target storage area where the target data is located.

    APPARATUS AND METHODS FOR BINDING A SYSTEM ON CHIP AND A MEMORY DEVICE WITH A KEY
    4.
    发明申请
    APPARATUS AND METHODS FOR BINDING A SYSTEM ON CHIP AND A MEMORY DEVICE WITH A KEY 有权

    公开(公告)号：US20250045420A1

    公开(公告)日：2025-02-06

    申请号：US18362122

    申请日：2023-07-31

    Applicant: QUALCOMM Incorporated

    Inventor： Yashavantha RAO ,  Debasish MANDAL ,  Manohar KALLUTLA

    IPC: G06F21/60 ,  G06F21/72 ,  G06F21/79

    Abstract: Methods and apparatuses directed to providing multi-key support within die architectures, such as System-on-a-Chips. In some examples, a die package includes key activation fuses, key revocation fuses, and key fuses for multiple keys. The die package also includes a processor electrically coupled to the key activation fuses, the key revocation fuses, and the plurality of key fuses. Further, the processor can generate a first key value and write the first key value to the key fuses to generate a first key. The processor can also write to the key activation fuses to activate the first key. The processor can further provision the first key to a first memory device. When the first memory device is replaced with a second memory device, the processor can write to the key revocation fuses to revoke the first key, and can provision a second key to the second memory device.

    SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREOF
    5.
    发明申请
    SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREOF 有权

    公开(公告)号：US20250021701A1

    公开(公告)日：2025-01-16

    申请号：US18767433

    申请日：2024-07-09

    Applicant: Renesas Electronics Corporation

    Inventor： Kenichi ITO

    IPC: G06F21/72 ,  G06F21/79 ,  G06F21/85

    Abstract: To provide a semiconductor device and a control method for a semiconductor device that realizes high-speed processing. The semiconductor device includes a storage unit, an encryption processing unit, and a hash processing unit. The data stored in the storage unit is transferred to the encryption processing unit for each pre-calculation data of the first calculation unit, the encryption processing unit applies the calculation processing to generate post-calculation data. The generated first calculation unit of the post-calculation data is transferred to the hash processing unit, the hash processing unit applies the hash calculation process to the post-calculation data of the second calculation unit. The post-calculation data is transferred to the storage unit, and the calculation processing and the hash calculation processing are performed in parallel.

    Undefined Lifecycle State Identifier for Managing Security of an Integrated Circuit Device
    7.
    发明申请
    Undefined Lifecycle State Identifier for Managing Security of an Integrated Circuit Device 有权

    公开(公告)号：US20240427944A1

    公开(公告)日：2024-12-26

    申请号：US18825815

    申请日：2024-09-05

    Applicant: Google LLC

    Inventor： Andrei Tudor Stratan ,  Olivier Jean Benoit

    IPC: G06F21/75 ,  G06F21/31 ,  G06F21/57 ,  G06F21/60 ,  G06F21/79

    Abstract: This document describes methods and systems that use an undefined lifecycle state identifier to manage security of a system-on-chip (SoC) integrated circuit (IC) device. As part of the described techniques, the SoC IC device may include a first set of logic integrated circuitry that determines that a first combination of bit values fails to correspond to a known lifecycle state identifier. The first set of logic integrated circuitry may then provide, to a second set of logic integrated circuitry, a second combination of bit values that corresponds to the undefined lifecycle state identifier. The second set of logic integrated circuitry may then place the SoC IC device into an undefined lifecycle state.

    Secure starting of an electronic circuit
    8.
    发明授权
    Secure starting of an electronic circuit 有权

    公开(公告)号：US12153721B2

    公开(公告)日：2024-11-26

    申请号：US18446132

    申请日：2023-08-08

    Applicant: PROTON WORLD INTERNATIONAL N.V.

    Inventor： Olivier Van Nieuwenhuyze

    IPC: G06F21/00 ,  G06F21/57 ,  G06F21/64 ,  G06F21/72 ,  G06F21/79 ,  G06F21/10

    Abstract: A method of checking the authenticity of at least a first portion of the content of a non-volatile memory of an electronic device including a microcontroller and an embedded secure element is disclosed. The method includes starting the microcontroller with instructions stored in a first secure memory area associated with the microcontroller and starting the secure element. The secure element has a plurality of decipher keys, each associated with a portion of the content of a second reprogrammable non-volatile memory area associated with the microcontroller. The secure element performs a signature check on a first portion of the content of the second area. If the signature is verified, the secure element sends the decipher key associated with the first portion to the microcontroller. If the signature is not verified, the secure element executes a signature check on another portion of the content of the second memory area.

    Undefined lifecycle state identifier for managing security of an integrated circuit device
    9.
    发明授权
    Undefined lifecycle state identifier for managing security of an integrated circuit device 有权

    公开(公告)号：US12141331B2

    公开(公告)日：2024-11-12

    申请号：US17636892

    申请日：2020-08-24

    Applicant: Google LLC

    Inventor： Andrei Tudor Stratan ,  Olivier Jean Benoit

    IPC: G06F21/00 ,  G06F21/31 ,  G06F21/57 ,  G06F21/60 ,  G06F21/75 ,  G06F21/79

    Abstract: This document describes methods and systems that use an undefined lifecycle state identifier to manage security of a system-on-chip (SoC) integrated circuit (IC) device. As part of the described techniques, the SoC IC device may include a first set of logic integrated circuitry that determines that a first combination of bit values fails to correspond to a known lifecycle state identifier. The first set of logic integrated circuitry may then provide, to a second set of logic integrated circuitry, a second combination of bit values that corresponds to the undefined lifecycle state identifier. The second set of logic integrated circuitry may then place the SoC IC device into an undefined lifecycle state.

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