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1.发明授权公开(公告)号：US11104825B2
公开(公告)日：2021-08-31
申请号：US16188523
申请日：2018-11-13
IPC分类号： G09G1/02 , C09G1/02 , C07F15/02 , C09K3/14 , H01L21/321
摘要： Metal compound chemically anchored colloidal particles wherein the metal compound is in molecular form are disclosed. A facile and fast process to chemically anchor metal compounds uniformly onto colloidal particle surfaces via chemical bonding has been developed. Metal compounds are chemically anchored to the surface of colloidal particles via an organic linking agent. Uniformly distributed metal compounds remain in molecular form after the process. The metal compound chemically anchored colloidal particles can be used as solid catalyst in metal chemical-mechanical planarization process.
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公开(公告)号：US20080111835A1
公开(公告)日：2008-05-15
申请号：US11621997
申请日：2007-01-11
申请人： Yu-Tsung Hu
发明人： Yu-Tsung Hu
IPC分类号： G09G1/02
CPC分类号： G09G3/3611 , G09G3/2025 , G09G2320/0252 , G09G2320/0261 , G09G2320/103 , G09G2340/16 , G09G2360/18
摘要： A method for driving an LCD monitor includes receiving image data corresponding to a pixel of the LCD monitor, comparing pixel values of a first frame data and a second frame data in the image data, dividing the second frame data into a plurality of sub-frame data when a difference between the first frame data and the second frame is greater than a predetermined value, adjusting pixel values of the sub-frame data according to the pixel value of the second frame data, and sequentially displaying the sub-frame data by the pixel.
摘要翻译： 一种用于驱动LCD监视器的方法包括接收与LCD监视器的像素对应的图像数据，比较图像数据中的第一帧数据和第二帧数据的像素值，将第二帧数据分成多个子帧 当第一帧数据和第二帧之间的差大于预定值时的数据，根据第二帧数据的像素值调整子帧数据的像素值，并且依次显示子帧数据 像素。
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公开(公告)号：US06897873B2
公开(公告)日：2005-05-24
申请号：US09821327
申请日：2001-03-29
申请人： Toru Sasaki
发明人： Toru Sasaki
摘要： A display control apparatus contains a video memory, a video memory controller, a color palette memory and a color palette replacer signal generator. The video memory stores display data that are read from a CD-ROM and contain header data (HA-HD), palette data (P0-P2) and bitmap data (BA-BD) in connection with four planes which are combined together to form one frame of picture. The header data contain a color palette pointer (CPP) and a color palette replacer instruction (CPP31) with respect to each of the planes. The video memory controller reads the palette data and bitmap data from the video memory in accordance with addresses designated by the header data. The color palette replacer signal generator generates a color palette replacer signal (COL) based on the header data so as to make determination whether to replace contents of color palettes with respect to the planes respectively. If the color palette replacer instruction designates color palette replacement, the video memory controller unconditionally replaces previous palette data with present palette data on the color palette memory. If the color palette replacer instruction does not designate color palette replacement, the video memory controller replaces the previous palette data with the present palette data on the color palette memory only when a present color palette pointer designating the present palette data differs from a previous color palette pointer designating the previous palette data. Thus, it is possible to considerably reduce time for replacement of contents of the color palettes.
摘要翻译： 显示控制装置包括视频存储器，视频存储器控制器，调色板存储器和调色板代替信号发生器。 视频存储器存储从CD-ROM中读取的显示数据，并且包含与四个平面组合在一起的标题数据（HA-HD），调色板数据（P 0 -P 2）和位图数据（BA-BD） 形成一帧画面。 标题数据包含相对于每个平面的调色板指针（CPP）和调色板替换指令（CPP 31）。 视频存储器控制器根据标题数据指定的地址从视频存储器读取调色板数据和位图数据。 调色板替代信号发生器基于标题数据生成调色板替换信号（COL），以便确定是否分别替换调色板的内容。 如果调色板替换器指令指定调色板替换，则视频存储器控制器无条件地使用调色板存储器上的当前调色板数据替换先前的调色板数据。 如果调色板替换器指令未指定调色板替换，则只有当指示当前调色板数据的当前调色板指针与先前调色板不同时，视频存储器控制器才将现有调色板数据替换为调色板上的当前调色板数据 指针指示以前的调色板数据。 因此，可以显着地减少更换调色板内容物的时间。
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公开(公告)号：US6094193A
公开(公告)日：2000-07-25
申请号：US989390
申请日：1997-12-12
申请人： Koyo Katsura , Hideo Maejima , Hiroshi Takeda
发明人： Koyo Katsura , Hideo Maejima , Hiroshi Takeda
IPC分类号： G06F3/153 , G06F3/14 , G09G1/02 , G09G5/14 , G09G5/32 , G09G5/36 , G09G5/377 , G09G5/39 , G09G5/395 , G09G5/397 , G09G5/00 , G09G5/04
摘要： In an image displaying field where there is a tendency which will increase the data to be handled in accordance with the high integration of a display device, a CRT controller according to the present invention improves the superposed display and the responsiveness of the display and drawing operations by dividing a unit clock into a predetermined number to function with high speed and a multifunctional display. When image data are to be inputted or outputted from a refresh memory corresponding to a display frame, the memory content and the display address are assigned at a ratio of 1:n to effect the processings in parallel. As a result, the time period utilized by the display cycle of the prior art can be assigned to the drawing operation so that the processing can be speeded up while making it easier than the prior art to effect the superposed display of letters, symbols and drawings. The resultant effect is that it is unnecessary to increase the number of refresh memories corresponding to the displayed frame and that the external parts can be simplified to contribute to the improvement in the reliability.
摘要翻译： 在根据显示装置的高集成度存在将增加要处理的数据的趋势的图像显示领域中，根据本发明的CRT控制器改进了叠加显示和显示和绘图操作的响应性 通过将单位时钟分割成预定数量以高速功能和多功能显示。 当从与显示帧相对应的刷新存储器输入或输出图像数据时，存储器内容和显示地址以1：n的比例被分配以并行地进行处理。 结果，可以将现有技术的显示循环所使用的时间段分配给绘制操作，使得可以加速处理，同时使现有技术更容易实现字母，符号和图纸的叠加显示 。 所产生的效果是不需要增加对应于所显示的帧的刷新存储器的数量，并且可以简化外部部件以有助于提高可靠性。
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公开(公告)号：US5926155A
公开(公告)日：1999-07-20
申请号：US287222
申请日：1994-08-08
申请人： Ikuya Arai , Kouji Kitou
发明人： Ikuya Arai , Kouji Kitou
CPC分类号： G06F3/14 , G09G2330/021 , G09G2340/02 , G09G2340/125 , G09G2370/04 , G09G2370/045 , G09G5/006
摘要： A digital video display system which includes a digital data output unit, such as a computer system, and a display unit coupled to receive digital data from the digital data output unit. In order to reduce the amount of data transferred on a signal line connecting the digital data output unit and the display unit, the digital data is transferred as a video drawing command. After the display unit receives this video drawing command, a drawing processing circuit within the display unit generates digital video data and a synchronizing signal based on the video drawing command. This digital video data is then stored, and subsequently converted to an analog video signal for display. Alternative embodiments are also provided which include audio processing, arrangements for simultaneously displaying multiple pictures, and arrangements for compression and decompression of the video data.
摘要翻译： 数字视频显示系统，其包括诸如计算机系统的数字数据输出单元和耦合以从数字数据输出单元接收数字数据的显示单元。 为了减少在连接数字数据输出单元和显示单元的信号线上传送的数据量，数字数据作为视频绘制命令传送。 在显示单元接收到该视频绘制命令之后，显示单元内的绘制处理电路基于视频绘制命令生成数字视频数据和同步信号。 然后存储该数字视频数据，随后将其转换为模拟视频信号进行显示。 还提供了另外的实施例，其包括音频处理，用于同时显示多个图像的布置，以及用于压缩和解压缩视频数据的布置。
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公开(公告)号：US5539430A
公开(公告)日：1996-07-23
申请号：US145483
申请日：1993-10-29
申请人： Curtis Priem , Shuen C. Chang , Hai D. Ho
发明人： Curtis Priem , Shuen C. Chang , Hai D. Ho
CPC分类号： G11C7/1039 , G09G5/024 , G09G5/395 , G09G2310/04 , G09G2360/126
摘要： A frame buffer including an array of memory cells for storing data indicating pixels to be displayed on the output display, row addressing decoding apparatus and column address decoding apparatus for selecting memory cells positioned in the array, apparatus for transferring a row address to the row addressing decoding apparatus upon the assertion of a row address strobe signal, apparatus for transferring a column address to the column address decoding apparatus for decoding upon the assertion of a first column address strobe signal, apparatus for latching a column address and any data necessary to complete the access during the first column address strobe signal, apparatus for accessing the particular column the address of which has been latched during the latching of a next subsequent address of a column to be accessed along with any data necessary to complete the next access during the next subsequent column address strobe signal following the first column address strobe signal.
摘要翻译： 一种帧缓冲器，包括用于存储指示要显示在输出显示器上的像素的数据的存储单元阵列，用于选择位于阵列中的存储单元的行寻址解码装置和列地址解码装置，用于将行地址传送到行寻址 解码装置，在断言行地址选通信号时，用于将列地址传送到列地址解码装置，用于在断言第一列地址选通信号时进行解码的装置，用于锁存列地址的装置和完成所述列地址选通信号所需的任何数据 在第一列地址选通信号期间的访问，用于访问特定列的装置，其特征列的地址已经在锁存待访问的列的下一个后续地址以及在下一次后续期间完成下一次访问所需的任何数据时被锁存 列地址选通信号跟随第一列地址选通信号。
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公开(公告)号：US5420608A
公开(公告)日：1995-05-30
申请号：US187823
申请日：1994-01-27
申请人： Sung M. Choi , Leon Lumelsky , Alan W. Peevers , John L. Pittas
发明人： Sung M. Choi , Leon Lumelsky , Alan W. Peevers , John L. Pittas
CPC分类号： G09G5/02
摘要： A display system is described which includes storage for receiving a compressed pixel image manifesting at least a pair of encoded colors and a bit MASK that defines which pixels of a pixel subset of the pixel image receive one of the colors. The system comprises a plurality of memory modules. The pixels in the subset are interleaved in the memory modules. A generator is provided for applying signals to cause data to be written into each of modules in parallel. Register means are provided for applying data manifesting the encoded colors to the modules. Control apparatus is responsive to the MASK bits for controlling the generator to write the encoded color data, in parallel and in a single memory cycle, into all pixel positions of the subset that are designated for the color(s) by MASK bit position values.
摘要翻译： 描述了一种显示系统，其包括用于接收呈现至少一对编码颜色的压缩像素图像的存储器和定义像素图像的像素子集的哪些像素接收一种颜色的位MASK。 该系统包括多个存储器模块。 子集中的像素在存储器模块中交错。 提供发生器用于施加信号以使数据被并行地写入每个模块。 提供寄存器装置用于将呈现编码颜色的数据应用于模块。 控制装置响应于MASK位，用于控制发生器并行并且在单个存储器周期中将经编码的颜色数据写入通过MASK位位置值为颜色指定的子集的所有像素位置。
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8.发明授权
公开(公告)号：US5379052A
公开(公告)日：1995-01-03
申请号：US858243
申请日：1992-03-26
摘要： A video controller board for supporting AX Japanese modes and enhanced VGA modes. The board includes two EGA video controllers to support the AX standard and a VGA video controller to support the enhanced VGA standard. Video memory sufficient to support the AX standard is shared by the VGA and EGA controllers. An interface renders the diverse protocols of the VGA and EGA controllers compatible with the shared memory so that each controller sees the memory in a configuration in accordance with its own protocol.
摘要翻译： 用于支持AX日本模式和增强VGA模式的视频控制器板。 该板包括两个支持AX标准的EGA视频控制器和一个支持VGA标准的VGA视频控制器。 足够支持AX标准的视频内存由VGA和EGA控制器共享。 一个接口使得VGA和EGA控制器的各种协议与共享存储器兼容，使得每个控制器根据其自己的协议在配置中看到存储器。
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公开(公告)号：US5345249A
公开(公告)日：1994-09-06
申请号：US115729
申请日：1993-09-02
CPC分类号： H04N9/12 , G06F3/1446 , G09G2300/026 , G09G2310/0283
摘要： In a picture display device having a plurality of adjacent display sections, vertically adjacent display sections are scanned in mutually opposite directions, so that at the transition between first and second rows of display sections, the perception of old picture information nicely fits in with the perception of old picture information, while at the transition between the second and third rows of display sections, the perception of new picture information nicely fits in with the perception of new picture information.
摘要翻译： 在具有多个相邻的显示部分的图像显示装置中，垂直相邻的显示部分沿彼此相反的方向被扫描，使得在第一和第二行显示部分之间的过渡处，旧的图像信息的感知很好地符合感知 的旧图片信息，而在第二行和第三行显示部分之间的转换时，新的图片信息的感觉很好地符合新的图片信息的感觉。
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公开(公告)号：US5311213A
公开(公告)日：1994-05-10
申请号：US946801
申请日：1992-09-16
申请人： Satoshi Kosugi
发明人： Satoshi Kosugi
CPC分类号： G09G5/222
摘要： A display control device according to the present invention includes a common memory having two functions, one as a refresh memory for outputting a character code and the other as a character generator for generating a character font, an output character code from which is stored in a line buffer. In this case, a display address generator circuit generates a character address for generating the character code and a raster address for designating the character font, which are in turn switched by an address selector and outputted to said common memory which then outputs a video signal to a video control circuit based upon said character font. Additionally, there is provided a line buffer control circuit for outputting a read/write access control signal to said line buffer based upon the raster address.
摘要翻译： 根据本发明的显示控制装置包括具有两个功能的公共存储器，一个作为用于输出字符代码的刷新存储器，另一个作为用于产生字符字体的字符发生器，另一个作为用于产生字符字体的字符发生器， 行缓冲区。 在这种情况下，显示地址发生器电路产生用于产生字符代码的字符地址和用于指定字符字体的光栅地址，该地址又由地址选择器切换并输出到所述公共存储器，然后将视频信号输出到 基于所述字符字体的视频控制电路。 另外，提供一种线缓冲器控制电路，用于基于光栅地址将读/写访问控制信号输出到所述行缓冲器。
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