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公开(公告)号：US20230139942A1
公开(公告)日：2023-05-04
申请号：US17721037
申请日：2022-04-14
发明人： Seung Heon Baek
摘要： A neuromorphic device including an electrode including a first terminal connected to a bit line through a write drive transistor and a second terminal connected to a source line, a plurality of unit weighting elements having different resistance values, each of the unit weighting elements including a free layer arranged on the top of the electrode, a tunnel barrier layer arranged on the top of the free layer, and a fixed layer arranged on the top of the tunnel barrier layer, and corresponding to each bit of a synapse weight, and a plurality of control electrodes connected to the bit line through a plurality of read drive transistors, respectively, a control voltage being applied between the free layer and the fixed layer of each of the plurality of unit weighting elements through each of the plurality of control electrodes.
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公开(公告)号：US20230119656A1
公开(公告)日：2023-04-20
申请号：US17911047
申请日：2021-02-25
发明人： Jin Pyo HONG , Jeong Hun SHIN , Jeong Woo CHOI
摘要： Disclosed is logic device using spin orbit torque. Two magnetic tunnel junctions have mutually opposite magnetization directions. The direction of the current flowing through the non-magnetic metal layer acts as an input, and the resistance states of the magnetic tunnel junctions are determined by the input program currents. Various logic devices are implemented by a method of setting the input program current to a logic high or a logic low.
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公开(公告)号：US11631797B2
公开(公告)日：2023-04-18
申请号：US17095379
申请日：2020-11-11
IPC分类号： H01L39/22 , G11B5/31 , G11C11/16 , G11C11/44 , H01F10/32 , H01F41/32 , H01L27/22 , H01L39/02 , H01L39/12 , H01L39/24 , H01L43/02 , H01L43/10 , H01L43/12
摘要： A buffer layer can be used to smooth the surface roughness of a galvanic contact layer (e.g., of niobium) in an electronic device, the buffer layer being made of a stack of at least four (e.g., six) layers of a face-centered cubic (FCC) crystal structure material, such as copper, the at least four FCC material layers alternating with at least three layers of a body-centered cubic (BCC) crystal structure material, such as niobium, wherein each of the FCC material layers and BCC material layers is between about five and about ten angstroms thick. The buffer layer can provide the smoothing while still maintaining desirable transport properties of a device in which the buffer layer is used, such as a magnetic Josephson junction, and magnetics of an overlying magnetic layer in the device, thereby permitting for improved magnetic Josephson junctions (MJJs) and thus improved superconducting memory arrays and other devices.
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公开(公告)号：US11631459B2
公开(公告)日：2023-04-18
申请号：US17282767
申请日：2018-10-30
发明人： John Alan Wickeraad
IPC分类号： G11C15/04 , G11C11/413 , G11C11/417 , G11C11/00 , G11C15/00 , G11C7/00 , G11C15/02 , G11C11/4093 , G11C11/411 , G11C11/16 , G11C11/412 , G11C11/408 , G11C11/4097
摘要： A ternary content addressable memory (TCAM) semiconductor device includes a first and second data storage portions each connected to a bit line. The first data storage portion is connected to a first word line, and to a first and third group of in series transistors. The second data storage portion is connected to a second word line, and to a second and fourth group of in series transistors. The first group and second group of in series transistors are each connected to a first match line. The first group is connected to a first search line bar, and the second group is connected to a first search line. A third and fourth group of in series transistors are each connected to a second match line. The third group is connected to a second search line, and the fourth group is connected to a second search line bar.
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公开(公告)号：US20230112113A1
公开(公告)日：2023-04-13
申请号：US18081109
申请日：2022-12-14
发明人： Yoshiaki OIKAWA , Atsushi MIYAGUCHI , Hideki UOCHI
IPC分类号： G11C11/16 , G11C11/419 , H01L29/786
摘要： A novel storage device is provided. The storage device includes a first wiring, a second wiring, and a first memory cell. The first memory cell includes a first transistor and a first magnetic tunnel junction device. One of a source or a drain of the first transistor is electrically connected to a first wiring. The other of the source or the drain of the first transistor is electrically connected to one terminal of the first magnetic tunnel junction device. Another terminal of the first magnetic tunnel junction device is electrically connected to the second wiring. The first transistor includes an oxide semiconductor in its channel formation region.
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公开(公告)号：US11624790B2
公开(公告)日：2023-04-11
申请号：US17668742
申请日：2022-02-10
申请人： TDK CORPORATION
发明人： Atsushi Tsumita , Tomoyuki Sasaki
摘要： A spin element includes an element portion including a first ferromagnetic layer, a conducting portion that extends in a first direction as viewed in a lamination direction of the first ferromagnetic layer and faces the first ferromagnetic layer, and a current path extending from the conducting portion to a semiconductor circuit and having a resistance adjusting portion between the conducting portion and the semiconductor circuit, wherein the resistance value of the resistance adjusting portion is higher than the resistance value of the conducting portion, and the temperature coefficient of the volume resistivity of a material forming the resistance adjusting portion is lower than the temperature coefficient of the volume resistivity of a material forming the conducting portion.
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公开(公告)号：US11621392B2
公开(公告)日：2023-04-04
申请号：US17480599
申请日：2021-09-21
申请人： TDK CORPORATION
摘要： A magnetoresistance effect element includes: a first ferromagnetic layer; a second ferromagnetic layer; and a non-magnetic layer provided between the first ferromagnetic layer and the second ferromagnetic layer, wherein at least one of the first ferromagnetic layer and the second ferromagnetic layer includes a first layer and a second layer in order from the side closer to the non-magnetic layer, the first layer contains a crystallized Co-based Heusler alloy, at least a part of the second layer is crystallized, the second layer contains a ferromagnetic element, boron element and an additive element, and the additive element is any element selected from a group consisting of Ti, V, Cr, Cu, Zn, Zr, Mo, Ru, Pd, Ta, W, Ir, Pt, and Au.
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公开(公告)号：US20230100600A1
公开(公告)日：2023-03-30
申请号：US17485129
申请日：2021-09-24
发明人： Michael Nicolas Albert Tran , Ward Parkinson , Michael Grobis , Nathan Franklin , Raj Ramanujan
摘要： Technology for reading reversible resistivity cells in a memory array when using a current-force read is disclosed. The memory cells are first read using a current-force referenced read. If the current-force referenced read is successful, then results of the current-force referenced read are returned. If the current-force referenced read is unsuccessful, then a current-force self-referenced read (SRR) is performed and results of the current-force SRR are returned. The current-force referenced read provides a very fast read of the memory cells and can be successful in most cases. The current-force SRR provides a more accurate read in the event that the current-force referenced read is not successful. Moreover, the current-force referenced read may use less power than the current-force SRR. In an aspect this mixed current-force read is used for MRAM cells, which are especially challenging to read.
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公开(公告)号：US20230100514A1
公开(公告)日：2023-03-30
申请号：US18045539
申请日：2022-10-11
摘要： Magnetoresistive device architectures and methods for manufacturing are presented that facilitate integration of process steps associated with forming such devices into standard process flows used for surrounding logic/circuitry. In some embodiments, the magnetoresistive device structures are designed such that the devices are able to fit within the vertical dimensions of the integrated circuit associated with a single metal layer and a single layer of interlayer dielectric material. Integrating the processing for the magnetoresistive devices can include using the same standard interlayer dielectric material as used in the surrounding circuits on the integrated circuit as well as using standard vias to interconnect to at least one of the electrodes of the magnetoresistive devices.
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公开(公告)号：US20230091134A1
公开(公告)日：2023-03-23
申请号：US17691198
申请日：2022-03-10
申请人： Kioxia Corporation
发明人： Fumiyoshi MATSUOKA
摘要： A first memory cell includes a first variable resistance element and a first switching element. A control circuit is configured to execute first detection of detecting a first value of a first physical quantity related to the first memory cell, execute first write for storing first data in the first memory cell, execute second detection of detecting a second value of the first physical quantity related to the first memory cell following the first write, and read second data related to the first memory cell based on the first value and the second value. At least one of the first value and the second value is a value during a change in the first physical quantity related to the first memory cell.
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