Low inductance component
    1.
    发明授权

    公开(公告)号:US11621129B2

    公开(公告)日:2023-04-04

    申请号:US16850153

    申请日:2020-04-16

    申请人: AVX Corporation

    摘要: A low inductance component may include a multilayer, monolithic device including a first active termination, a second active termination, at least one ground termination, and a pair of capacitors connected in series between the first active termination and the second active termination. The lead(s) may be coupled with the first active termination, second active termination, and/or the at least one ground termination. The lead(s) may have respective length(s) and maximum width(s). A ratio of the length(s) to the respective maximum width(s) of the lead(s) may be less than about 20.

    ELECTRONIC COMPONENT
    2.
    发明申请

    公开(公告)号:US20230060995A1

    公开(公告)日:2023-03-02

    申请号:US17896744

    申请日:2022-08-26

    申请人: TDK Corporation

    IPC分类号: H01F27/29 H01F17/00 H01G4/38

    摘要: Disclosed herein is an electronic component that includes an element body having a structure in which a plurality of conductor layers are stacked in a first direction on a surface of a substrate with insulating layers interposed therebetween, and a plurality of terminal electrodes provided on a mounting surface of the element body. The mounting surface extends in the first direction and in a second direction perpendicular to the first direction. The element body includes an inductor constituted by the plurality of conductor layers and has a coil axis extending in a third direction perpendicular to both the first and second directions.

    Busbar with tailored perforation sizes to provide thermal path

    公开(公告)号:US11527357B2

    公开(公告)日:2022-12-13

    申请号:US17223366

    申请日:2021-04-06

    摘要: Disclosed is an assembly including a busbar that includes: a first layer that defines: first layer top and bottom surfaces; first layer first and second ends; and a first layer center region between the first layer first and second ends; and the first layer forms first layer perforations of different sizes about the first layer center region so perforations closer to the first layer first end are smaller than perforations spaced apart therefrom; a second layer that is disposed against and electrically isolated from the first layer bottom surface, wherein the second layer defines connector orifices having a same size as each other that are aligned with the first layer perforations; and a first capacitor supported against and electrically connected to the first layer top surface, wherein the first capacitor includes busbar connectors that respectively extend through the first layer perforations to electrically connect with the connector orifices.

    HIGH-PERFORMANCE CAPACITOR PACKAGING FOR NEXT GENERATION POWER ELECTRONICS

    公开(公告)号:US20220375691A1

    公开(公告)日:2022-11-24

    申请号:US17742690

    申请日:2022-05-12

    申请人: UT-Battelle, LLC

    IPC分类号: H01G4/38 H05K1/16 H01G4/232

    摘要: A capacitor packaging having a central termination and three or more capacitors (or groups of capacitors) arranged about the central termination. The electrical flow paths between the termination and the capacitors or groups of capacitors are of substantially the same length. The capacitors or groups of capacitors may be arranged in a generally circular pattern with the termination centered on the center. The termination may include first and second terminals. The capacitors may be mounted to a printed circuit board (“PCB”) with traces on opposite surfaces of the PCB providing electrical flow paths from the terminals to opposite legs of the capacitors. The capacitor packaging may include a primary PCB with a first circular arrangement of capacitors and a secondary PCB with a second circular arrangement of capacitors. The capacitors may be sandwiched between the PCBs with the second arrangement of capacitors disposed concentrically inwardly of the first arrangement.

    Method of forming a cast inductor apparatus

    公开(公告)号:US11501911B2

    公开(公告)日:2022-11-15

    申请号:US16727825

    申请日:2019-12-26

    摘要: The invention comprises a method for manufacturing an inductor, comprising the steps of: casting a cast winding comprising an inner cavity; inserting a first inductor core subsection into the inner cavity; inserting a second inductor core subsection into the inner cavity; and mechanically coupling the first inductor core subsection to the second inductor core subsection to form an inductor core wound by the cast windings. The method of manufacturing optionally includes the steps of: forming at least a portion of the cast winding into an arced helical shape; forming the first inductor core subsection and the second inductor core subsection into elements of a torpid shaped inductor core; deforming the cast winding to physically allow the step of inserting the first inductor core subsection into the inner cavity; and/or deforming at least a portion of the cast winding into an arced helical coil shape after the step of inserting.

    CAPACITOR WITH MULTIPLE ELEMENTS FOR MULTIPLE REPLACEMENT APPLICATIONS

    公开(公告)号:US20220328247A1

    公开(公告)日:2022-10-13

    申请号:US17530116

    申请日:2021-11-18

    摘要: An apparatus includes a case having an elliptical cross-section capable of receiving a plurality of capacitive elements. One or more of the capacitive elements provide at least one capacitor having a first capacitor terminal and a second capacitor terminal. The apparatus also includes a cover assembly that includes a deformable cover mountable to the case, and, a common cover terminal having a contact extending from the cover. The cover assembly also includes at least three capacitor cover terminals, each of the at least three capacitor cover terminals having at least one contact extending from the deformable cover. The deformable cover is configured to displace at least one of the at least three capacitor cover terminals upon an operative failure of at least one of the plurality of the capacitive elements. The cover assembly also includes at least four insulation structures. One of the four insulation structures is associated with one of the at least three capacitor cover terminals. The apparatus also includes a first conductor capable of electrically connecting the first capacitor terminal of a capacitor provided by one of the plurality of capacitive elements to one of the at least three capacitor cover terminals and a second conductor capable of electrically connecting the second capacitor terminal of the capacitor provided by one of the plurality of capacitive elements to the common cover terminal.

    FILM CAPACITOR FOR POWER ELECTRONICS

    公开(公告)号:US20220293341A1

    公开(公告)日:2022-09-15

    申请号:US17638791

    申请日:2020-08-19

    发明人: AXEL WESTERMANN

    摘要: The invention relates to a film capacitor for power electronics, which comprises a first electrically conductive layer, which is arranged on a first end side face of the film capacitor, wherein the surface normal of the first electrically conductive layer is perpendicular to the surface normals of dielectric films of the film capacitor. A second electrically conductive layer is arranged on a second end side face opposite from the first end side face, wherein the surface normal of the second electrically conductive layer is perpendicular to the surface normals of the dielectric films of the film capacitor. The film capacitor has at least one inner passage, which extends from the first electrically conductive layer to the second electrically conductive layer, wherein the passage is formed by removal of capacitor material. The invention also relates to a capacitor assembly.