公开(公告)号：US12132115B2

公开(公告)日：2024-10-29

申请号：US17870426

申请日：2022-07-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shi-Ning Ju ,  Kuo-Cheng Chiang ,  Guan-Lin Chen ,  Chih-Hao Wang

IPC分类号： H01L29/786 ,  H01L21/3105 ,  H01L21/3115 ,  H01L21/8234

CPC分类号： H01L29/78618 ,  H01L21/31055 ,  H01L21/31155 ,  H01L21/823418

摘要： A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes multiple semiconductor nanostructures over a substrate and two epitaxial structures over the substrate. Each of the semiconductor nanostructures is between the epitaxial structures, and the epitaxial structures are p-type doped. The semiconductor device structure also includes a gate stack wrapping around the semiconductor nanostructures. The semiconductor device structure further includes a dielectric stressor structure between the gate stack and the substrate. The epitaxial structures extend exceeding a top surface of the dielectric stressor structure.

公开(公告)号：US12132050B2

公开(公告)日：2024-10-29

申请号：US18526062

申请日：2023-12-01

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Ryan Chia-Jen Chen ,  Cheng-Chung Chang ,  Shao-Hua Hsu ,  Yu-Hsien Lin ,  Ming-Ching Chang ,  Li-Wei Yin ,  Tzu-Wen Pan ,  Yi-Chun Chen

IPC分类号： H01L21/3065 ,  H01L21/3213 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/02 ,  H01L27/088 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L21/308 ,  H01L21/3105 ,  H01L21/321

CPC分类号： H01L27/0886 ,  H01L21/3065 ,  H01L21/32133 ,  H01L21/76224 ,  H01L21/76229 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823481 ,  H01L27/0207 ,  H01L29/0649 ,  H01L29/66545 ,  H01L29/7842 ,  H01L21/3086 ,  H01L21/31053 ,  H01L21/3212

摘要： Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.

公开(公告)号：US12104112B2

公开(公告)日：2024-10-01

申请号：US17263089

申请日：2018-09-25

申请人： Showa Denko Materials Co., Ltd.

发明人： Satoyuki Nomura ,  Tomohiro Iwano ,  Takaaki Matsumoto ,  Tomoyasu Hasegawa ,  Tomomi Kukita

IPC分类号： C09K3/14 ,  B24B37/04 ,  C09G1/02 ,  H01L21/304 ,  H01L21/3105 ,  H01L21/66 ,  C01F17/235

CPC分类号： C09K3/1454 ,  B24B37/042 ,  C09G1/02 ,  C09K3/1409 ,  H01L21/304 ,  H01L21/31053 ,  H01L22/26 ,  C01F17/235 ,  C01P2002/85 ,  C01P2004/64 ,  C01P2006/40

摘要： A slurry containing abrasive grains and a liquid medium, in which the abrasive grains contain at least one metal compound selected from the group consisting of a metal oxide and a metal hydroxide, the metal compound contains a metal capable of taking a plurality of valences, and when the slurry is brought into contact with a surface to be polished to bring the abrasive grains into contact with the surface to be polished, the slurry yields 0.13 or more in X-ray photoelectron spectroscopy as a ratio of the lowest valence among the plurality of valences of the metal.

公开(公告)号：US12100588B2

公开(公告)日：2024-09-24

申请号：US18214891

申请日：2023-06-27

申请人： ASM IP Holding B.V.

发明人： Toshiya Suzuki

IPC分类号： H01L21/02 ,  C23C16/40 ,  H01L21/3105 ,  H01L21/311 ,  H10B69/00 ,  C23C16/56

CPC分类号： H01L21/0234 ,  C23C16/402 ,  H01L21/02164 ,  H01L21/02219 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/3105 ,  H01L21/31111 ,  H10B69/00 ,  C23C16/401 ,  C23C16/56

摘要： A method of post-deposition treatment for silicon oxide film includes: providing in a reaction space a substrate having a recess pattern on which a silicon oxide film is deposited; supplying a reforming gas for reforming the silicon oxide film to the reaction space in the absence of a film-forming precursor, said reforming gas being composed primarily of He and/or H2; and irradiating the reforming gas with microwaves in the reaction space having a pressure of 200 Pa or less to generate a direct microwave plasma to which the substrate is exposed, thereby reforming the silicon oxide film.

公开(公告)号：US12098300B2

公开(公告)日：2024-09-24

申请号：US17431635

申请日：2019-02-19

申请人： Showa Denko Materials Co., Ltd.

发明人： Ai Fujimatsu ,  Mamiko Iwano ,  Nao Yamamura

IPC分类号： C09G1/02 ,  H01L21/3105

CPC分类号： C09G1/02 ,  H01L21/31053

摘要： An aspect of the present invention is a polishing liquid containing abrasive grains, a copolymer, and a liquid medium, in which the copolymer has a structure unit derived from at least one styrene compound selected from the group consisting of styrene and a styrene derivative and a structure unit derived from acrylic acid, a content of the copolymer is more than 0.01% by mass and 0.2% by mass or less based on the total amount of the polishing liquid, and a pH of the polishing liquid is more than 4.5.

公开(公告)号：US12080549B2

公开(公告)日：2024-09-03

申请号：US17397640

申请日：2021-08-09

申请人： The Regents of the University of California

发明人： Iljo Kwak ,  Kasra Sardashti ,  Andrew Kummel

IPC分类号： H01L21/02 ,  B82Y10/00 ,  H01L21/28 ,  H01L21/3105 ,  H01L29/06 ,  H01L29/16 ,  H01L29/24 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51 ,  H01L29/66 ,  H01L29/775 ,  H01L29/778 ,  H01L29/786 ,  H10B63/00 ,  H10N50/01 ,  H10N70/00

CPC分类号： H01L21/0228 ,  B82Y10/00 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/022 ,  H01L21/28194 ,  H01L21/3105 ,  H01L29/0673 ,  H01L29/1606 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/517 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/775 ,  H01L29/778 ,  H01L29/78603 ,  H01L29/78645 ,  H01L29/78681 ,  H01L29/78684 ,  H01L29/78696 ,  H10B63/30 ,  H10N50/01 ,  H10N70/011 ,  H01L29/0676

摘要： A semiconductor structure includes a nanofog oxide adhered to an inert 2D or 3D surface or a weakly reactive metal surface, the nanofog oxide consisting essentially of 0.5-2 nm Al2O3 nanoparticles. The nanofog can also consists of sub 1 nm particles. Oxide layers can be formed on the nanofog, for example a bilayer stack of Al2O3—HfO2. Additional examples are from the group consisting of ZrO2, HfZrO2, silicon or other doped HfO2 or ZrO2, ZrTiO2, HfTiO2, La2O3, Y2O3, Ga2O3, GdGaOx, and alloys thereof, including the ferroelectric phases of HfZrO2, silicon or other doped HfO2 or ZrO2. The structure provides the basis for various devices, including MIM capacitors, FET transistors and MOSCAP capacitors.

公开(公告)号：US12074206B2

公开(公告)日：2024-08-27

申请号：US17461499

申请日：2021-08-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chia-Wei Chen ,  Chih-Yu Hsu ,  Hui-Chi Chen ,  Shan-Mei Liao ,  Jian-Hao Chen ,  Cheng-Hao Hou ,  Huang-Chin Chen ,  Cheng Hong Yang ,  Shih-Hao Lin ,  Tsung-Da Lin ,  Da-Yuan Lee ,  Kuo-Feng Yu ,  Feng-Cheng Yang ,  Chi On Chui ,  Yen-Ming Chen

IPC分类号： H01L29/423 ,  H01L21/3105 ,  H01L29/40 ,  H01L29/417 ,  H01L29/51 ,  H01L29/786

CPC分类号： H01L29/42392 ,  H01L21/3105 ,  H01L29/401 ,  H01L29/41775 ,  H01L29/517 ,  H01L29/78696

摘要： A device includes a semiconductor substrate, a fin structure on the semiconductor substrate, a gate structure on the fin structure, and a pair of source/drain features on both sides of the gate structure. The gate structure includes an interfacial layer on the fin structure, a gate dielectric layer on the interfacial layer, and a gate electrode layer of a conductive material on and directly contacting the gate dielectric layer. The gate dielectric layer includes nitrogen element.

公开(公告)号：US20240282723A1

公开(公告)日：2024-08-22

申请号：US18351591

申请日：2023-07-13

申请人： Microchip Technology Incorporated

发明人： Matthew Martin ,  Bomy Chen ,  Julius Kovats

IPC分类号： H01L23/64 ,  H01L21/3105 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/16

CPC分类号： H01L23/645 ,  H01L21/3105 ,  H01L23/3107 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/08 ,  H01L24/24 ,  H01L25/16 ,  H01L2224/08235 ,  H01L2224/24226 ,  H01L2924/1206

摘要： An integrated circuit (IC) package includes a bare die mounted on a substrate, and a conductive routing region including conductive routing structure and an inductor. The conductive routing structure is conductively connected to the bare die, and includes conductive elements formed in multiple conductive routing layers in the conductive routing region. The inductive device includes a winding formed in at least one conductive routing layer of the multiple conductive routing layers.

公开(公告)号：US20240274440A1

公开(公告)日：2024-08-15

申请号：US18631589

申请日：2024-04-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Te-Chien Hou ,  Yu-Ting Yen ,  Cheng-Yu Kuo ,  Chih Hung Chen ,  William Weilun Hong ,  Kei-Wei Chen

IPC分类号： H01L21/3105 ,  B24B37/04 ,  B24B37/20 ,  C02F1/469 ,  H01L21/02 ,  H01L29/66

CPC分类号： H01L21/31053 ,  B24B37/042 ,  B24B37/044 ,  B24B37/20 ,  H01L21/02065 ,  H01L21/31055 ,  H01L29/66545 ,  C02F1/4691

摘要： A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.

公开(公告)号：US12057350B2

公开(公告)日：2024-08-06

申请号：US17387447

申请日：2021-07-28

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Leo Hsu ,  Louis Lin

IPC分类号： H01L21/8234 ,  H01L21/02 ,  H01L21/28 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/768

CPC分类号： H01L21/823475 ,  H01L21/0217 ,  H01L21/28008 ,  H01L21/31058 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/76831 ,  H01L21/76877 ,  H01L21/02115 ,  H01L21/02274 ,  H01L2221/1063

摘要： A gate structure is formed over a substrate. The gate structure includes a gate electrode and a hard mask located over the gate electrode. The hard mask comprises a first dielectric material. A first interlayer dielectric (ILD) is formed over the gate structure. The first ILD comprises a second dielectric material different from the first dielectric material. A first via is formed in the first ILD. Sidewalls of the first via are surrounded by spacers that comprise the first dielectric material. A second ILD is formed over the first ILD. A via hole is formed in the second ILD. The via hole exposes the first via. A protective layer is formed in the via hole. A bottom segment of the protective layer is removed. Thereafter, an etching process is performed. A remaining segment of the protective layer prevents an etching of the spacers during the etching process.