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公开(公告)号:US12127399B2
公开(公告)日:2024-10-22
申请号:US18323458
申请日:2023-05-25
发明人: Meng-Han Lin , Te-Hsin Chiu , Wei-Cheng Wu , Li-Feng Teng , Chien-Hung Chang
IPC分类号: H01L29/06 , H01L21/28 , H01L21/762 , H01L21/765 , H01L23/00 , H01L29/40 , H01L29/66 , H10B20/00 , H10B41/35 , H10B41/43 , H10B41/49
CPC分类号: H10B20/60 , H01L21/76229 , H01L21/765 , H01L23/562 , H01L29/0649 , H01L29/40114 , H01L29/404 , H01L29/66825 , H10B41/35 , H10B41/43 , H10B41/49
摘要: A semiconductor structure including a semiconductor substrate and at least one patterned dielectric layer is provided. The semiconductor substrate includes a semiconductor portion, at least one first device, at least one second device and at least one first dummy ring. The at least one first device is disposed on a first region surrounded by the semiconductor portion. The at least one second device and the at least one first dummy ring are disposed on a second region, and the second region surrounds the first region. The at least one patterned dielectric layer covers the semiconductor substrate.
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公开(公告)号:US12080707B2
公开(公告)日:2024-09-03
申请号:US18353907
申请日:2023-07-18
发明人: Tatsuya Naito
IPC分类号: H01L29/06 , H01L21/76 , H01L21/765 , H01L27/06 , H01L27/07 , H01L29/08 , H01L29/10 , H01L29/32 , H01L29/36 , H01L29/40 , H01L29/423 , H01L29/739 , H01L29/78 , H01L29/861
CPC分类号: H01L27/0635 , H01L21/76 , H01L21/765 , H01L27/0727 , H01L29/0696 , H01L29/0834 , H01L29/1095 , H01L29/32 , H01L29/36 , H01L29/404 , H01L29/405 , H01L29/407 , H01L29/4238 , H01L29/739 , H01L29/7397 , H01L29/78 , H01L29/8613 , H01L29/8611
摘要: A semiconductor device includes a semiconductor substrate having a first conductivity type drift region and a second conductivity type base region above the drift region, trench portions at an upper surface of the semiconductor substrate arrayed parallel to one another, each of them penetrating the base region, and mesa portions between respective trench portions. Among the mesa portions, at least one mesa portion includes a first conductivity type first semiconductor region having a higher concentration than the drift region, a second conductivity type second semiconductor region having a higher concentration than the base region, and a first conductivity type accumulation region between the base and drift regions and has a higher concentration than the drift region. The drift region does not extend above the accumulation region. In a longitudinal direction of the trench portions, the accumulation region extends beyond an end portion of the first semiconductor region.
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公开(公告)号:US12062654B2
公开(公告)日:2024-08-13
申请号:US17409053
申请日:2021-08-23
发明人: Takuya Yoshida , Kenji Suzuki , Yuki Haraguchi , Hidenori Koketsu
IPC分类号: H01L27/06 , H01L21/765 , H01L29/40 , H01L29/66 , H01L29/739 , H01L29/861
CPC分类号: H01L27/0664 , H01L21/765 , H01L29/407 , H01L29/66136 , H01L29/66348 , H01L29/7397 , H01L29/8613
摘要: A semiconductor device includes a semiconductor substrate, a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a diode trench gate, and an electrode layer. The first semiconductor layer is provided as a surface layer on the upper surface side of the semiconductor substrate. The second semiconductor layer is provided below the first semiconductor layer. The diode trench gate includes a diode trench insulation film formed along, out of the inner wall of the trench, a lower side wall and a bottom that are located below an upper side wall located on the upper end side of the trench. The diode trench gate includes a diode trench electrode provided inside the trench. The electrode layer covers the upper side wall of the trench. The first semiconductor layer is in contact with the electrode layer on the upper side wall of the trench.
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公开(公告)号:US11984499B2
公开(公告)日:2024-05-14
申请号:US17145969
申请日:2021-01-11
发明人: Chien-Chung Hung , Kuo-Ting Chu , Lurng-Shehng Lee , Chwan-Yin Li
IPC分类号: H01L29/78 , H01L21/04 , H01L21/765 , H01L29/06 , H01L29/10 , H01L29/16 , H01L29/40 , H01L29/66
CPC分类号: H01L29/7813 , H01L21/046 , H01L21/765 , H01L29/063 , H01L29/1095 , H01L29/1608 , H01L29/407 , H01L29/66068
摘要: A trench silicon carbide metal-oxide semiconductor field effect transistor includes a silicon carbide semiconductor substrate and a trench metal-oxide semiconductor field effect transistor, the field effect transistor includes a trench vertically arranged and penetrating along a first horizontal direction, a gate insulating layer formed on an inner wall of the trench, a first poly gate formed on the gate insulating layer, a shield region formed outsides and below the trench, and a field plate arranged between a bottom wall of the trench and the shield region, and the field plate has semiconductor doping and is laterally in contact to a current spreading layer to deplete electrons of the current spreading layer when a reverse bias voltage is applied.
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公开(公告)号:US11942441B2
公开(公告)日:2024-03-26
申请号:US17480329
申请日:2021-09-21
发明人: HoChe Yu , Fong-Yuan Chang , XinYong Wang , Chih-Liang Chen , Tzu-Heng Chang
IPC分类号: H01L23/60 , H01L21/765 , H01L21/768 , H01L23/48 , H01L23/58 , H01L27/02 , H01Q9/04
CPC分类号: H01L23/585 , H01L21/765 , H01L21/76885 , H01L21/76898 , H01L23/481 , H01L27/0255 , H01Q9/0407
摘要: A semiconductor device includes a through-silicon via (TSV) in a TSV zone in a substrate and the TSV extends through the substrate; an ESD cell proximal to a first end of the TSV and in contact with the TSV zone, the ESD cell including a set of diodes electrically connected in parallel to each other; an antenna pad electrically connected to a second end of the TSV; and an antenna electrically connected to the antenna pad and extending in a first direction, the first direction is parallel to a major axis of the TSV. The semiconductor device includes a conductive pillar extending parallel to the TSV at a same side of the substrate as the antenna pad, wherein a first end of the conductive pillar electrically connects to the antenna pad, and a second end of the conductive pillar electrically connects to the set of diodes of the ESD cell.
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公开(公告)号:US11929428B2
公开(公告)日:2024-03-12
申请号:US17321992
申请日:2021-05-17
申请人: CREE, INC.
IPC分类号: H02H3/06 , H01L21/76 , H01L21/765 , H01L29/20 , H01L29/205 , H01L29/40 , H01L29/66 , H01L29/778 , H02H3/12
CPC分类号: H01L29/7786 , H01L21/7605 , H01L21/765 , H01L29/2003 , H01L29/205 , H01L29/402 , H01L29/66462 , H02H3/06 , H02H3/12
摘要: An apparatus includes a substrate; a group III-Nitride barrier layer; a source electrically coupled to the group III-Nitride barrier layer; a gate on the group III-Nitride barrier layer; a drain electrically coupled to the group III-Nitride barrier layer; a p-region being arranged at or below the group III-Nitride barrier layer; and a recovery enhancement circuit configured to reduce an impact of an overload received by the gate. Additionally, at least a portion of the p-region is arranged vertically below at least one of the following: the source, the gate, an area between the gate and the drain.
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公开(公告)号:US11923425B2
公开(公告)日:2024-03-05
申请号:US18170709
申请日:2023-02-17
发明人: Yi-Cheng Chiu , Tian Sheng Lin , Hung-Chou Lin , Yi-Min Chen , Chiu-Hua Chung
IPC分类号: H01L29/40 , H01L21/765 , H01L29/06 , H01L29/66 , H01L29/78
CPC分类号: H01L29/402 , H01L21/765 , H01L29/0653 , H01L29/66681 , H01L29/7816
摘要: A method for manufacturing a device may include providing an ultra-high voltage (UHV) component that includes a source region and a drain region, and forming an oxide layer on a top surface of the UHV component. The method may include connecting a low voltage terminal to the source region of the UHV component, and connecting a high voltage terminal to the drain region of the UHV component. The method may include forming a shielding structure on a surface of the oxide layer provided above the drain region of the UHV component, forming a high voltage interconnection that connects to the shielding structure and to the high voltage terminal, and forming a metal routing that connects the shielding structure and the low voltage terminal.
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公开(公告)号:US11862673B2
公开(公告)日:2024-01-02
申请号:US17548624
申请日:2021-12-13
发明人: Kwangsik Ko , Qiuyi Xu , Shajan Mathew
IPC分类号: H01L29/06 , H01L21/761 , H01L29/66 , H01L29/872 , H01L29/40 , H01L21/765
CPC分类号: H01L29/0623 , H01L21/761 , H01L21/765 , H01L29/402 , H01L29/66143 , H01L29/872
摘要: A device includes a buried oxide layer disposed on a substrate, a first region disposed on the buried oxide layer and a first ring region disposed in the first region. The first ring region includes a portion of a guardring. The device further includes a first terminal region disposed in the first ring region, a second ring region disposed in the first region and a second terminal region disposed in the second ring region. The first terminal region is connected to an anode and the second terminal region is connected to a cathode. The first region has a graded doping concentration. The first region, the second ring region and the second terminal region have a first conductivity type, and the first ring region and the first terminal region have a second conductivity type. The first conductivity type is different from the second conductivity type.
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公开(公告)号:US11837642B2
公开(公告)日:2023-12-05
申请号:US17016877
申请日:2020-09-10
发明人: Soogine Chong , Jongseob Kim , Joonyong Kim , Younghwan Park , Junhyuk Park , Dongchul Shin , Jaejoon Oh , Sunkyu Hwang , Injun Hwang
IPC分类号: H01L29/423 , H01L21/02 , H01L21/285 , H01L21/765 , H01L23/31 , H01L29/20 , H01L29/205 , H01L29/40 , H01L29/66 , H01L29/778
CPC分类号: H01L29/42316 , H01L21/022 , H01L21/0217 , H01L21/02164 , H01L21/02178 , H01L21/28587 , H01L21/765 , H01L23/3171 , H01L23/3192 , H01L29/2003 , H01L29/205 , H01L29/404 , H01L29/66462 , H01L29/7786
摘要: A semiconductor device includes a channel layer including a channel; a channel supply layer on the channel layer; a channel separation pattern on the channel supply layer; a gate electrode pattern on the channel separation pattern; and an electric-field relaxation pattern protruding from a first lateral surface of the gate electrode pattern in a first direction parallel with an upper surface of the channel layer. An interface between the channel layer and the channel supply layer is adjacent to channel. A size of the gate electrode pattern in the first direction is different from a size of the channel separation pattern in the first direction. The gate electrode pattern and the electric-field relaxation pattern form a single structure.
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公开(公告)号:US11810813B2
公开(公告)日:2023-11-07
申请号:US16950381
申请日:2020-11-17
发明人: Jaw-Juinn Horng , Szu-Lin Liu
IPC分类号: H01L21/765 , G01K7/01 , G01R31/28 , G01K1/16 , H01L21/71 , H01L21/768
CPC分类号: H01L21/765 , G01K1/16 , G01K7/01 , G01R31/2874 , H01L21/71 , H01L21/76877
摘要: A system for designing a temperature sensor arrangement includes a processor and a non-transitory computer readable medium, including instructions, connected to the processor. The processor is configured to execute the instructions for designing a sensor array, the sensor array includes a first transistor of a first device, and a plurality of second transistors of a second device. The processor is configured to execute the instructions for designing a guard ring region between the sensor array and another circuit of an integrated circuit, the guard ring region includes a transistor structure. The processor is configured to execute the instructions for designing a thermally conductive element between the sensor array and the guard ring region, the thermally conductive element is connected to the transistor structure, the first transistor and each of the plurality of second transistors. The processor is configured to execute the instructions for generating the temperature sensor arrangement.
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