公开(公告)号：US12218174B2

公开(公告)日：2025-02-04

申请号：US18586407

申请日：2024-02-23

Applicant: LG Display Co., Ltd.

Inventor： Hsien-Te Chen

IPC: H01L27/146 ,  G06V40/13 ,  H01L25/04

Abstract: An electronic device may include: a display panel comprising a pixel flexible substrate, a driving circuit, a display medium formed from an organic light-emitting material, and a plurality of shielding units; and a plurality of micro photoelectric units adjacent to a protection layer and away from the display panel. The plurality of micro-photoelectric units may comprise respective micro-photoelectric elements, and at least one of the micro-photoelectric elements may be, or may include, a sensor element. The protection layer may serve to protect the plurality of micro-photoelectric units while being located at one side of the plurality of micro-photoelectric units. Each of the plurality of micro photoelectric units may be configured to emit light toward an object, and to receive the light reflected, scattered, refracted, or diffracted by, or penetrating through, the object, or receive a signal generated from the light after being reflected, scattered, refracted, or diffracted by, or penetrating through, the object.

公开(公告)号：US20250015212A1

公开(公告)日：2025-01-09

申请号：US18390448

申请日：2023-12-20

Applicant: COMMISSARIAT À L’ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： Benoit BERTRAND ,  Thomas BEDECARRATS ,  Heimanu NIEBOJEWSKI

IPC: H01L31/0352 ,  H01L25/04 ,  H01L31/0224 ,  H01L31/028 ,  H01L31/18

Abstract: A quantum device configured to be able to form an array of quantum dots, the device including for this: an active layer made of a semiconductor material; a plurality of first gates disposed along a plurality of rows; a plurality of second gates disposed along a plurality of columns perpendicular to the rows of the plurality of rows; a plurality of third gates, each third gate of the plurality of third gates being disposed at the intersection of one row of the plurality of rows and one column of the plurality of columns, each third gate being separated from the nearest third gates, on a row by a first gate and on a column by a second gate; a plurality of fourth gates, each fourth gate being disposed between two second gates along the rows and between two first gates along the columns.

公开(公告)号：US20240379723A1

公开(公告)日：2024-11-14

申请号：US18670594

申请日：2024-05-21

Applicant: CANON KABUSHIKI KAISHA

Inventor： Junji Iwata

IPC: H01L27/146 ,  H01L25/04 ,  H01L31/107

Abstract: A photoelectric conversion apparatus includes a first and a second multilayer wiring layer. The first or the second multilayer wiring layer is provided with a first electrode supplied with a first voltage from an outside of the photoelectric conversion apparatus. The first electrode is not connected with a second semiconductor layer.

公开(公告)号：US12136620B2

公开(公告)日：2024-11-05

申请号：US17690952

申请日：2022-03-09

Applicant: The Board of Trustees of the University of Illinois ,  X-CELEPRINT LIMITED

Inventor： John A. Rogers ,  Ralph Nuzzo ,  Matthew Meitl ,  Etienne Menard ,  Alfred Baca ,  Michael Motala ,  Jong-Hyun Ahn ,  Sang-Il Park ,  Chang-Jae Yu ,  Heung Cho Ko ,  Mark Stoykovich ,  Jongseung Yoon

IPC: H01L25/00 ,  H01L21/00 ,  H01L25/04 ,  H01L25/075 ,  H01L25/16 ,  H01L27/12 ,  H01L27/146 ,  H01L31/02 ,  H01L31/0216 ,  H01L31/0232 ,  H01L31/0288 ,  H01L31/0304 ,  H01L31/043 ,  H01L31/0525 ,  H01L31/054 ,  H01L31/0693 ,  H01L31/0725 ,  H01L31/167 ,  H01L31/18 ,  H01L33/00 ,  H01L33/06 ,  H01L33/30 ,  H01L33/48 ,  H01L33/52 ,  H01L33/54 ,  H01L33/56 ,  H01L33/58 ,  H01L33/62 ,  H01S5/02 ,  H01S5/02251 ,  H01S5/183 ,  H01S5/30 ,  H01S5/343 ,  H01S5/42 ,  B82Y10/00 ,  H01L29/786

Abstract: Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

公开(公告)号：US20240304597A1

公开(公告)日：2024-09-12

申请号：US18666589

申请日：2024-05-16

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiaoquan HAI ,  Yingzi WANG ,  Xue DONG ,  Guangcai YUAN ,  Chunfang ZHANG ,  Xuan LIANG

IPC: H01L25/04 ,  G06V40/13 ,  H01L25/16 ,  H01L31/0232

CPC classification number: H01L25/042 ,  G06V40/1306 ,  G06V40/1318 ,  H01L25/167 ,  H01L31/02327

Abstract: An optical sensor and a display apparatus. The optical sensor includes: a base substrate (1); a detection circuit (2) on the base substrate (1); a plurality of photosensitive devices (3) on a side of the detection circuit (2) facing away from the base substrate (1); a plurality of light converged elements (4) on a side of the photosensitive devices (3) facing away from the base substrate (1); where an orthographic projection of one light converged element (4) on the base substrate (1) covers orthographic projections of at least two photosensitive devices (3) on the base substrate (1); and a light constrained structure (5) between the photosensitive devices (3) and the light converged elements (4).

公开(公告)号：US20240222529A1

公开(公告)日：2024-07-04

申请号：US18390460

申请日：2023-12-20

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Takahide YANAI ,  Daisuke IIDA ,  Asuka MISHIMA

IPC: H01L31/02 ,  H01L25/04 ,  H01L25/075 ,  H01L25/16 ,  H01L31/12

CPC classification number: H01L31/02002 ,  H01L25/042 ,  H01L25/0753 ,  H01L25/167 ,  H01L31/125

Abstract: An optical semiconductor element includes a substrate, a first termination cell, and a cell. A first electrode is arranged on the top surface of the first termination cell. The first termination cell and the cell are connected to each other by a wiring layer extending from the top surface of the first termination cell to the cell. The first electrode is exposed to the outside through an opening formed in an insulating layer. The wiring layer is spaced apart from the first electrode on the top surface of the first termination cell, and is electrically connected to the first electrode via a first semiconductor layer. The first portion has a contact region in contact with the first semiconductor layer. The width of the contact region is equal to or greater than the width of the opening.

公开(公告)号：US20240203930A1

公开(公告)日：2024-06-20

申请号：US18380053

申请日：2023-10-13

Applicant: Adeia Semiconductor Solutions LLC

Inventor： Hiroaki Sato ,  Teck-Gyu Kang ,  Belgacem Haba ,  Philip R. Osborn ,  Wei-Shun Wang ,  Ellis Chau ,  Ilyas Mohammed ,  Norihito Masuda ,  Kazuo Sakuma ,  Kiyoaki Hashimoto ,  Kurosawa Inetaro ,  Tomoyuki Kikuchi

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/13 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L23/538 ,  H01L25/04 ,  H01L25/065 ,  H01L25/10 ,  H01L25/16 ,  H01L27/146

CPC classification number: H01L24/48 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/4952 ,  H01L23/49811 ,  H01L24/18 ,  H01L24/73 ,  H01L25/043 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L27/14618 ,  H01L27/14625 ,  H01L21/56 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/45 ,  H01L24/49 ,  H01L2224/05599 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1713 ,  H01L2224/17179 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45101 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48455 ,  H01L2224/48464 ,  H01L2224/49105 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01049 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18165 ,  H01L2924/19107

Abstract: Apparatuses relating to a microelectronic package are disclosed. In one such apparatus, a substrate has first contacts on an upper surface thereof. A microelectronic die has a lower surface facing the upper surface of the substrate and having second contacts on an upper surface of the microelectronic die. Wire bonds have bases joined to the first contacts and have edge surfaces between the bases and corresponding end surfaces. A first portion of the wire bonds are interconnected between a first portion of the first contacts and the second contacts. The end surfaces of a second portion of the wire bonds are above the upper surface of the microelectronic die. A dielectric layer is above the upper surface of the substrate and between the wire bonds. The second portion of the wire bonds have uppermost portions thereof bent over to be parallel with an upper surface of the dielectric layer.

公开(公告)号：US20240186286A1

公开(公告)日：2024-06-06

申请号：US18526011

申请日：2023-12-01

Applicant: Commissariat à I'Énergie Atomique et aux Énergies Alternatives

Inventor： Jérôme Vaillant ,  Jacques Baylet

IPC: H01L25/04 ,  H01L27/146

CPC classification number: H01L25/043 ,  H01L25/042 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14689 ,  H01L27/1469

Abstract: A method of manufacturing a device for acquiring a 2D image and a depth image, the method comprising the following steps: a) forming, on a first face of a first support semiconductor substrate, a first sensor comprising a plurality of depth pixels; b) forming, in the first support substrate, on the side of a second face of the first substrate opposite the first face, at least one optical concentrator; c) forming, in and on a second semiconductor substrate, a second sensor comprising a plurality of 2D image pixels; and d) placing the second sensor right next the first support substrate on the side of the second face of the first support substrate.

公开(公告)号：US12002901B2

公开(公告)日：2024-06-04

申请号：US18212935

申请日：2023-06-22

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Karl Weidner ,  Ralph Wirth ,  Axel Kaltenbacher ,  Walter Wegleiter ,  Bernd Barchmann ,  Oliver Wutz ,  Jan Marfeld

IPC: H01L33/00 ,  H01L23/31 ,  H01L25/04 ,  H01L25/075 ,  H01L31/02 ,  H01L31/0203 ,  H01L31/0232 ,  H01L31/18 ,  H01L33/48 ,  H01L33/50 ,  H01L33/54 ,  H01L33/56 ,  H01L33/60 ,  H01L33/62

CPC classification number: H01L33/0093 ,  H01L23/3107 ,  H01L23/3185 ,  H01L25/042 ,  H01L25/0753 ,  H01L31/02005 ,  H01L31/0203 ,  H01L31/0232 ,  H01L31/02322 ,  H01L31/02327 ,  H01L31/1892 ,  H01L33/483 ,  H01L33/486 ,  H01L33/502 ,  H01L33/56 ,  H01L33/60 ,  H01L33/62 ,  H01L33/54 ,  H01L2924/0002 ,  H01L2933/0033 ,  H01L2933/005 ,  H01L2933/0066 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An optoelectronic semiconductor component includes an optoelectronic semiconductor chip having a top area at a top side, a bottom area at an underside, at least one side area connecting the top area and the bottom area; electrical contact locations at the top area or at the bottom area of the optoelectronic semiconductor chip; and a molded body, wherein the molded body surrounds the optoelectronic semiconductor chip at all side areas at least in places, the molded body is electrically insulating, and the molded body is free of any conductive element that completely penetrates the molded body.

公开(公告)号：US20240178184A1

公开(公告)日：2024-05-30

申请号：US18433047

申请日：2024-02-05

Applicant: Texas Instruments Incorporated

Inventor： Sreenivasan Kalyani KODURI ,  Leslie Edward STARK

IPC: H01L25/04 ,  G01S17/08 ,  H01L25/075 ,  H01L33/62

CPC classification number: H01L25/042 ,  G01S17/08 ,  H01L25/0753 ,  H01L33/62

Abstract: A packaged integrated circuit (IC), comprising: a lead frame; one or more semiconductor dies on the lead frame, the one or more semiconductor dies including a first circuit and a second circuit; and a molding compound encapsulating the lead frame and the semiconductor die, the molding compound including a first cavity over the first circuit and a second cavity over the second circuit, in which at least one of the first or second cavities includes a second material different from the molding compound.