公开(公告)号：US20240363675A1

公开(公告)日：2024-10-31

申请号：US18767003

申请日：2024-07-09

申请人： SEOUL VIOSYS CO., LTD.

发明人： Jong Hyeon CHAE ,  Seong Gyu JANG ,  Ho Joon LEE ,  Chang Yeon KIM ,  Chung Hoon LEE

IPC分类号： H01L27/15 ,  H01L25/065 ,  H01L25/075 ,  H01L25/11 ,  H01L25/13 ,  H01L33/00 ,  H01L33/10 ,  H01L33/38 ,  H01L33/40 ,  H01L33/42 ,  H01L33/50 ,  H01L33/62 ,  H10K10/84 ,  H10K50/813 ,  H10K50/818 ,  H10K50/822 ,  H10K50/828 ,  H10K59/32 ,  H10K59/35

CPC分类号： H01L27/156 ,  H01L25/0756 ,  H01L25/13 ,  H01L33/0093 ,  H01L33/10 ,  H01L33/405 ,  H01L33/42 ,  H01L33/507 ,  H01L33/62 ,  H01L25/0655 ,  H01L25/0753 ,  H01L25/115 ,  H01L33/38 ,  H01L33/382 ,  H10K10/84 ,  H10K50/813 ,  H10K50/818 ,  H10K50/822 ,  H10K50/828 ,  H10K59/32 ,  H10K59/35

摘要： A light emitting diode (LED) stack for a display including a first LED stack including a first conductivity-type semiconductor layer and a second conductivity-type semiconductor layer, a second LED stack disposed on the first LED stack, a third LED stack disposed on the second LED stack, an intermediate bonding layer disposed between the first LED stack and the second LED stack to bond the second LED stack to the first LED stack, an upper bonding layer disposed between the second LED stack and the third LED stack to couple the third LED stack to the second LED stack, and a first hydrophilic material layer disposed between the first LED stack and the upper bonding layer.

公开(公告)号：US12074513B2

公开(公告)日：2024-08-27

申请号：US17564313

申请日：2021-12-29

申请人： Mitsubishi Electric Corporation

发明人： Yusuke Tsubaki

IPC分类号： H05K1/02 ,  H01L25/11 ,  H02M1/06 ,  H02M1/08 ,  H02M1/096 ,  H02M3/00 ,  H02M3/335 ,  H05K1/18

CPC分类号： H02M3/003 ,  H01L25/115 ,  H02M3/33523 ,  H05K1/181

摘要： A power conversion device includes: semiconductor switching elements; a housing on which the semiconductor switching elements are fixed; a circuit board on which a driving circuit for driving the semiconductor switching elements is mounted and which is located opposite to and spaced apart from a fixing surface; insertion guides which are disposed on an opposing surface of the circuit board relative to the fixing surface; and elongated terminal extension members each having a length that is matched with a height of a pulse transformer, one ends of which are bonded to respective lead terminals, and the other ends of which extend toward the insertion guides; wherein the pulse transformer is disposed on the opposing surface so as to be opposite to major surfaces of the semiconductor switching elements.

公开(公告)号：US12040312B2

公开(公告)日：2024-07-16

申请号：US17893037

申请日：2022-08-22

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Chien-Wei Chang ,  Shang-Wei Yeh ,  Chung-Hsi Wu ,  Min Lung Huang

IPC分类号： H01L25/065 ,  H01L21/56 ,  H01L21/768 ,  H01L23/00 ,  H01L23/31 ,  H01L25/04 ,  H01L25/07 ,  H01L25/075 ,  H01L25/11 ,  H01L25/16

CPC分类号： H01L25/0652 ,  H01L21/566 ,  H01L21/76871 ,  H01L23/3107 ,  H01L23/3192 ,  H01L24/09 ,  H01L24/49 ,  H01L24/85 ,  H01L25/071 ,  H01L25/112 ,  H01L25/042 ,  H01L25/043 ,  H01L25/0756 ,  H01L25/162 ,  H01L2224/02371

摘要： A semiconductor package structure includes a conductive structure, at least one semiconductor element, an encapsulant, a redistribution structure and a plurality of bonding wires. The semiconductor element is disposed on and electrically connected to the conductive structure. The encapsulant is disposed on the conductive structure to cover the semiconductor element. The redistribution structure is disposed on the encapsulant, and includes a redistribution layer. The bonding wires electrically connect the redistribution structure and the conductive structure.

公开(公告)号：US12033918B2

公开(公告)日：2024-07-09

申请号：US17258993

申请日：2018-07-09

申请人： LG Magna e-Powertrain Co., Ltd.

发明人： Myeon Gyu Kang ,  Yong Sik Kim ,  Namjoon Cho

IPC分类号： H01L23/473 ,  H01L23/367 ,  H01L25/07 ,  H01L25/11 ,  H05K7/20

CPC分类号： H01L23/473 ,  H01L23/3675 ,  H01L25/074 ,  H01L25/117 ,  H05K7/20927

摘要： A cooling apparatus includes: a main body configured to provide a cooling water flow path in an inner space, a plurality of cooling jackets each including a plurality of cooling fins, the plurality of cooling fins being disposed inside the main body along the cooling water flow path and spaced apart from each other by a set distance, and a plurality of double-sided chip modules disposed between at least two of the plurality of cooling jackets and having an upper surface and a lower surface contacting the at least two cooling jackets. Each module of the plurality of double-sided chip modules is (i) located at a position corresponding to a position of one of the plurality of cooling fins, (ii) facing the one of the plurality of cooling fins, and (iii) spaced apart from at least one other module to simultaneously cool the upper surface and the lower surface.

公开(公告)号：US20240136782A1

公开(公告)日：2024-04-25

申请号：US18494952

申请日：2023-10-25

申请人： Transportation IP Holdings, LLC

发明人： Henry Todd Young ,  Alvaro Jorge Mari Curbelo ,  Jason Daniel Kuttenkuler ,  Tiziana Bertoncelli ,  Sean Patrick Cillessen

IPC分类号： H01R25/16 ,  H01L23/46 ,  H01L23/492 ,  H01L25/11 ,  H01R43/16 ,  H02G5/00 ,  H02M7/00 ,  H05K7/20

CPC分类号： H01R25/162 ,  H01L23/46 ,  H01L23/492 ,  H01L25/115 ,  H01R43/16 ,  H02G5/005 ,  H02M7/003 ,  H05K7/2089 ,  H05K7/20927 ,  H02M7/537

摘要： A bus bar includes a load terminal connector comprising a conductive plate that extends from a first edge to an opposite second edge and extends from a third edge to an opposite fourth edge. The third and fourth edges extend from the first edge to the second edge. The plate includes a window opening located between the first and second edges and between the third and fourth edges. The plate also includes a slot extending into the plate from the first edge to the window opening. The plate includes first and second sets of openings configured to receive connections with first and second power terminals of switch packages. The first set of openings and the second set of openings are located on opposite sides of the slot.

公开(公告)号：US11961796B2

公开(公告)日：2024-04-16

申请号：US17461828

申请日：2021-08-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yueh-Ting Lin ,  Hua-Wei Tseng ,  Ming Shih Yeh ,  Der-Chyang Yeh

IPC分类号： H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L25/11

CPC分类号： H01L23/49838 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/73 ,  H01L25/117 ,  H01L2224/16146 ,  H01L2224/73204 ,  H01L2225/1076

摘要： A package comprises at least one first device die, and a redistribution line (RDL) structure having the at least one first device die bonded thereto. The RDL structure comprises a plurality of dielectric layers, and a plurality of RDLs formed through the plurality of dielectric layers. A trench is defined proximate to axial edges of the RDL structure through each of the plurality of dielectric layers. The trench prevents damage to portions of the RDL structure located axially inwards of the trench.

公开(公告)号：US11961785B2

公开(公告)日：2024-04-16

申请号：US18215854

申请日：2023-06-29

申请人： Vitesco Technologies GmbH

发明人： Jens Reiter ,  Rico Hartmann ,  Christian Lammel

IPC分类号： H01L23/40 ,  H01L25/11 ,  H05K1/18

CPC分类号： H01L23/4006 ,  H05K1/18 ,  H01L2023/405 ,  H01L2023/4062 ,  H01L2023/4081 ,  H01L2023/4087 ,  H01L25/115 ,  H05K2201/09063 ,  H05K2201/1059 ,  H05K2201/10598 ,  H05K2201/10757

摘要： A method provides a circuit carrier arrangement that includes: a cooling plate (1) which has spacer and fastening elements (3) for connection to a printed circuit board (2) in a spaced-apart manner; a printed circuit board (2) which has bores (4) for receiving spring element sleeves (9); at least one power semiconductor component (10) which is connected by a soldered connection to the printed circuit board (2) and fastening elements (3) in the state in which it is fitted with the cooling plate (1) by means of plug-in connections (11) of spring-action configuration; and at least one spring element (5) having at least two spring element sleeves (9) between which a web (6) that is connected to the spring element sleeves (9) extends, and supporting elements (7) arranged on either side of said web and at least one spring plate (8) being arranged on said web.

公开(公告)号：US20240088064A1

公开(公告)日：2024-03-14

申请号：US18346505

申请日：2023-07-03

申请人： Mitsubishi Electric Corporation

发明人： Daichi OTORI

IPC分类号： H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L23/498 ,  H01L25/11 ,  H01L25/18

CPC分类号： H01L23/564 ,  H01L23/296 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/49844 ,  H01L25/115 ,  H01L25/18 ,  H01L21/56

摘要： Provided is a semiconductor device with improved humidity resistance in which deformation of a substrate and a casing caused by expansion and contraction of a sealant cured in manufacturing processes is reduced. The semiconductor device includes: an insulating substrate; first and second circuit patterns formed on one surface of the insulating substrate; a first terminal electrode electrically connected to the first circuit pattern; first and second semiconductor elements mounted on the first circuit pattern; a second terminal electrode electrically connected to the first and second semiconductor elements through the second circuit pattern; a first sealant covering the first semiconductor element; a second sealant covering the second semiconductor element and made of a material different from that of the first sealant; and a casing enclosing the first and second semiconductor elements, separated from the first and second semiconductor elements, and bonded to the insulating substrate.

公开(公告)号：US20240071853A1

公开(公告)日：2024-02-29

申请号：US18140132

申请日：2023-04-27

申请人： Infineon Technologies AG

发明人： Hans Hartung ,  Martin Goldammer ,  Carsten Ehlers ,  Katja Engelkemeier ,  Guido Bönig

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/053 ,  H01L25/11

CPC分类号： H01L23/3135 ,  H01L21/56 ,  H01L23/053 ,  H01L24/48 ,  H01L25/115 ,  H01L2224/48091 ,  H01L2224/48225

摘要： A power semiconductor module includes a power semiconductor die arranged on a power substrate, a housing enclosing the power semiconductor die and the power substrate, wherein an interior volume formed by the housing is divided by interior walls into at least a first compartment and a second compartment, wherein the power semiconductor die is arranged within the first compartment, a first encapsulation material encapsulating the power semiconductor die and at least partially filling the first compartment, and a second encapsulation material different from the first encapsulation material, the second encapsulation material encapsulating the first encapsulation material and at least partially filling the second compartment, wherein the first encapsulation material is arranged within the first compartment but not within the second compartment.

公开(公告)号：US11846668B2

公开(公告)日：2023-12-19

申请号：US17438046

申请日：2020-03-11

申请人： SCHNEIDER ELECTRIC POWER DRIVES GMBH

发明人： Michael Hartmann

IPC分类号： G01R31/26 ,  H01L23/373 ,  H01L25/11

CPC分类号： G01R31/2642 ,  H01L23/3735 ,  H01L25/115

摘要： A method for assessing the state of damage of a semiconductor module that is subject to operational loading, in particular a semiconductor module of a drive system converter, that includes at least one semiconductor component arranged on or in a support structure. It is possible not only to estimate a spent service life for the entire semiconductor module, but also to detect unexpected or undesirable loading states and thus a premature reduction of the remaining service life of the semiconductor module. Continuous load assessments are thus possible already during the operation of the semiconductor module and allow interventions to be made in good time.