公开(公告)号：US20240355817A1

公开(公告)日：2024-10-24

申请号：US18757630

申请日：2024-06-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Guo-Jyun Luo ,  Chen-Chien Chang ,  Chiu-Hua Chung ,  Shiuan-Jeng Lin ,  Han-Zong Pan

IPC分类号： H01L27/08 ,  H01L21/285 ,  H01L27/06

CPC分类号： H01L27/0805 ,  H01L21/2855 ,  H01L27/0629 ,  H01L28/40

摘要： The present disclosure relates to a semiconductor structure. The semiconductor structure includes a first electrode over a substrate. A first capacitor dielectric layer is over an upper surface of the first electrode. The upper surface of the first electrode laterally extends to opposing outermost sidewalls of the first capacitor dielectric layer. A second electrode is over the first capacitor dielectric layer. The upper surface of the first electrode extends past opposing sides of the second electrode. A second capacitor dielectric layer is over the second electrode. A third electrode has a lower surface directly over an upper surface of the second capacitor dielectric layer and completely confined over the second electrode.

公开(公告)号：US12113064B2

公开(公告)日：2024-10-08

申请号：US17018486

申请日：2020-09-11

申请人： ROHM CO., LTD.

发明人： Keishi Watanabe ,  Junya Yamagami

IPC分类号： H01L27/08 ,  H01L29/861 ,  H01L29/866

CPC分类号： H01L27/0814 ,  H01L29/861 ,  H01L29/866

摘要： The present disclosure provides a diode chip capable of attaining excellent electrical characteristics.
The present disclosure provides a diode chip (1), including: a semiconductor chip (10) having a first main surface (11); a first pin junction portion (31) formed on a surface of the first main surface (11) with a first polarity direction; a first diode pair (37) (rectifier pair) including a first pn junction portion (35) separated from the first pin junction portion (31) and formed in the semiconductor chip (10) with the first polarity direction and a first reversed pin junction portion (38) connected to the first pn junction portion (35) in reversed direction and formed on the first main surface (11) with a second polarity direction; and a first junction separation trench (46) formed on the first main surface (11) in a manner of separating the first pin junction portion (31) and the first diode pair (37).

公开(公告)号：US20240321863A1

公开(公告)日：2024-09-26

申请号：US18736566

申请日：2024-06-07

申请人： Alpha and Omega Semiconductor (Cayman) Ltd.

发明人： Shekar Mallikarjunaswamy

IPC分类号： H01L27/02 ,  H01L27/08 ,  H01L29/66 ,  H01L29/861

CPC分类号： H01L27/0255 ,  H01L27/0262 ,  H01L27/0814 ,  H01L29/66098 ,  H01L29/861

摘要： A transient voltage suppressing (TVS) protection device includes a first high-side steering diode having an anode terminal coupled to a first protected node and a cathode terminal coupled to a second node; and a first low-side steering diode having a cathode terminal coupled to the first protected node and an anode terminal coupled to a third node, wherein the first low-side steering diode comprises a silicon controlled rectifier including alternating p-type and n-type regions, the outermost p-type region forming the anode terminal and the outermost n-type region forming the cathode terminal, the n-type region between a pair of p-type regions being substantially depleted at a bias voltage of zero volt.

公开(公告)号：US12094763B2

公开(公告)日：2024-09-17

申请号：US17467477

申请日：2021-09-07

申请人： GLOBALFOUNDRIES Singapore Pte. Ltd.

发明人： Kwang Sing Yew ,  Ramasamy Chockalingam ,  Juan Boon Tan

IPC分类号： H01L27/08 ,  H01L21/768 ,  H01L23/522 ,  H01L49/02

CPC分类号： H01L21/76811 ,  H01L21/76832 ,  H01L21/76843 ,  H01L23/5223 ,  H01L23/5226 ,  H01L27/0805 ,  H01L28/40

摘要： A device may include a first conductive element and an interlevel dielectric arranged over the first conductive element. The device may further include a dual damascene opening including a first end, a second end, and sidewalls extending between the first and second ends, the sidewalls extending through the interlevel dielectric. A metal-insulator-metal (MIM) stack may line the dual damascene opening. The MIM stack may include a first conductive liner lining the sidewalls and the second end of the dual damascene opening, an insulator layer lining the first conductive liner, and a second conductive liner lining the insulator layer. A first metal interconnect may be disposed in and filling the dual damascene opening lined with the MIM stack.

公开(公告)号：US12082406B2

公开(公告)日：2024-09-03

申请号：US17883842

申请日：2022-08-09

申请人： Samsung Electronics Co., Ltd.

发明人： Ansoo Park ,  Ahreum Kim

IPC分类号： G11C11/418 ,  H01L27/08 ,  H10B41/10 ,  H10B41/35 ,  H10B41/41

CPC分类号： H10B41/35 ,  H01L27/0802 ,  H10B41/10 ,  H10B41/41

摘要： An active resistor array of a semiconductor memory device comprises a first active resistor in a first active resistor region; a second active resistor in the first active resistor region and arranged in parallel with the first active resistor, and an isolation element layer interposed therebetween; a third active resistor formed in a second active resistor region; a first selection transistor formed in a first selection transistor region and connected to the second active resistor; and a second selection transistor formed in a second selection transistor region and connected to the third active resistor. The first and second selection transistors are connected to the same gate layer. The gate layer of the first and second selection transistors is on the isolation element layer. Since example embodiments may help to ensure the uniformity of the layout pattern, active resistance distribution may be improved due to reduction in process variation.

公开(公告)号：US20240290783A1

公开(公告)日：2024-08-29

申请号：US17518657

申请日：2021-11-04

申请人： Diodes Incorporated

发明人： Kuo-Liang Chao ,  Pin-Hao Huang

IPC分类号： H01L27/08 ,  H01L21/822 ,  H01L29/66 ,  H01L29/872

CPC分类号： H01L27/0814 ,  H01L21/822 ,  H01L29/66143 ,  H01L29/8725

摘要： The disclosure provides a semiconductor package having an isolation structure comprising an isolation trench filled with dielectric material, where the isolation structure traverses the thickness of the isolated semiconductor dies.

公开(公告)号：US12074162B2

公开(公告)日：2024-08-27

申请号：US17350349

申请日：2021-06-17

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Guo-Jyun Luo ,  Chen-Chien Chang ,  Chiu-Hua Chung ,  Shiuan-Jeng Lin ,  Han-Zong Pan

IPC分类号： H01L27/08 ,  H01L21/285 ,  H01L27/06 ,  H01L49/02

CPC分类号： H01L27/0805 ,  H01L21/2855 ,  H01L27/0629 ,  H01L28/40

摘要： The present disclosure relates to a semiconductor structure. The semiconductor structure includes a lower electrode over a substrate, a first capacitor dielectric layer over the lower electrode, an intermediate electrode over the first capacitor dielectric layer, and a second capacitor dielectric layer is over the intermediate electrode. An upper electrode is over the second capacitor dielectric layer. The upper electrode is completely confined over the intermediate electrode. A first protection layer is completely confined over the intermediate electrode. The first protection layer covers opposing sidewalls of the upper electrode and upper surfaces of the intermediate electrode and the upper electrode.

公开(公告)号：US20240234481A1

公开(公告)日：2024-07-11

申请号：US18150912

申请日：2023-01-06

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Szu-Shu Yang ,  Chun Yi Wu ,  Kai Tzeng ,  Yuh-Sen Chang ,  Chi-Cheng Chen ,  Chi-Chun Peng

IPC分类号： H01L27/08

CPC分类号： H01L28/10

摘要： A method of forming a semiconductor device, the method including forming a first insulation layer over a substrate, depositing a first stack of magnetic layers over the first insulation layer, etching the first stack of magnetic layers such that a sidewall of the first stack of magnetic layers forms a stairstep pattern, forming a first photosensitive layer over the first stack of magnetic layers, the first insulation layer, and the substrate, wherein a thickness of the first photosensitive layer above a center of a first step of the stairstep pattern is different from a thickness of the first photosensitive layer above a center of a second step of the stairstep pattern, forming a first conductive feature over the first photosensitive layer, depositing a second insulation layer over the first photosensitive layer and the first conductive feature, and depositing a second magnetic layer over the second insulation layer.

公开(公告)号：US11990470B2

公开(公告)日：2024-05-21

申请号：US17483958

申请日：2021-09-24

申请人： International Business Machines Corporation

发明人： Takashi Ando ,  Reinaldo Vega ,  Cheng Chi ,  Praneet Adusumilli

IPC分类号： H01L27/08 ,  H01L49/02

CPC分类号： H01L27/0805 ,  H01L28/60

摘要： An apparatus includes a first plate, a second plate, a third plate, a ferroelectric dielectric, and a paraelectric dielectric. The ferroelectric dielectric is between the first plate and the second plate such that the first plate, the ferroelectric dielectric, and the second plate form a first capacitor. The paraelectric dielectric is between the second plate and the third plate such that the second plate, the paraelectric dielectric, and the third plate form a second capacitor.

公开(公告)号：US11955480B2

公开(公告)日：2024-04-09

申请号：US17741900

申请日：2022-05-11

申请人： STMICROELECTRONICS (TOURS) SAS

发明人： Mohamed Boufnichel

IPC分类号： H01L27/08 ,  H01L27/06 ,  H01L49/02

CPC分类号： H01L27/0805 ,  H01L27/0629 ,  H01L28/87 ,  H01L28/90

摘要： The present disclosure concerns an integrated circuit comprising a substrate, the substrate comprising a first region having a first thickness and a second region having a second thickness smaller than the first thickness, the circuit comprising a three-dimensional capacitor formed inside and on top of the first region, and at least first and second connection terminals formed on the second region, the first and second connection terminals being respectively connected to first and second electrodes of the three-dimensional capacitor.