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公开(公告)号:US20240363754A1
公开(公告)日:2024-10-31
申请号:US18769739
申请日:2024-07-11
发明人: Feng-Ching CHU , Wei-Yang LEE , Feng-Cheng YANG , Yen-Ming CHEN
IPC分类号: H01L29/78 , H01L21/8238 , H01L23/535 , H01L27/088 , H01L27/092 , H01L29/06 , H01L29/08 , H01L29/161 , H01L29/165 , H01L29/167 , H01L29/24 , H01L29/267 , H01L29/417 , H01L29/66
CPC分类号: H01L29/7848 , H01L21/823814 , H01L21/823821 , H01L21/823871 , H01L21/823878 , H01L23/535 , H01L27/0924 , H01L29/0653 , H01L29/0847 , H01L29/161 , H01L29/165 , H01L29/167 , H01L29/24 , H01L29/267 , H01L29/66795 , H01L29/785 , H01L27/0886 , H01L29/41791 , H01L29/7851
摘要: A semiconductor device structure is provided. The semiconductor device structure includes a first fin structure extended above a substrate along a first direction, and a first gate structure formed over the first fin structure along a second direction. The semiconductor device structure includes a first source/drain (S/D) structure formed over the first fin structure and adjacent to the first gate structure, and a cap layer formed on and in direct contact with the first S/D structure. The semiconductor device structure includes an isolation structure adjacent to the first gate structure and the first S/D structure along the first direction. The isolation structure extends from the first gate structure to the first S/D structure, and the first S/D structure has a protruding portion toward to the isolation structure, and the protruding portion of the first S/D structure is separated from the isolation structure by the cap layer.
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公开(公告)号:US20240363435A1
公开(公告)日:2024-10-31
申请号:US18766003
申请日:2024-07-08
发明人: Ta-Chun Lin , Kuo-Hua Pan , Jhon Jhy Liaw
IPC分类号: H01L21/8238 , H01L21/265 , H01L21/266 , H01L21/306 , H01L21/308 , H01L27/092 , H01L29/08 , H01L29/167 , H01L29/66 , H01L29/78
CPC分类号: H01L21/823814 , H01L21/26513 , H01L21/26586 , H01L21/266 , H01L21/30604 , H01L21/308 , H01L21/823821 , H01L21/823828 , H01L21/823864 , H01L27/0924 , H01L29/0847 , H01L29/167 , H01L29/66545 , H01L29/66636 , H01L29/66795 , H01L29/7851
摘要: The present disclosure provides a method that includes providing a workpiece having a semiconductor substrate that includes a first circuit area and a second circuit area, forming a first active region in the first circuit area and a second active region on the second circuit area, forming first gate stacks on the first active region and second gate stacks on the second active region, performing a plurality of implantation processes to introduce a doping species to the first active region with a first dosage and to the second active region with a second dosage different from the first dosage, and forming first source/drain features within first source/drain regions of the first active region and second source/drain features within second source/drain regions of the second active region.
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公开(公告)号:US20240363419A1
公开(公告)日:2024-10-31
申请号:US18767168
申请日:2024-07-09
发明人: Wen-Chun KENG , Yu-Kuan LIN , Chang-Ta YANG , Ping-Wei WANG
IPC分类号: H01L21/8234 , H01L21/3065 , H01L21/311 , H01L27/088 , H01L29/08
CPC分类号: H01L21/823418 , H01L21/823431 , H01L21/823468 , H01L27/0886 , H01L21/3065 , H01L21/31116 , H01L21/31144 , H01L29/0847
摘要: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a first fin structure, a second fin structure, and a third fin structure over the substrate. Tops of the second fin structure and the third fin structure are at different height levels. The semiconductor device structure also includes a first epitaxial structure extending across sidewalls of the first fin structure and the second fin structure and a second epitaxial structure on the third fin structure. The first epitaxial structure is closer to the substrate than the second epitaxial structure.
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公开(公告)号:US12132106B2
公开(公告)日:2024-10-29
申请号:US17688821
申请日:2022-03-07
发明人: Shin-Hung Li
IPC分类号: H01L31/109 , H01L29/08 , H01L29/423 , H01L29/78 , H01L31/0328 , H01L31/072
CPC分类号: H01L29/7827 , H01L29/0847 , H01L29/42392
摘要: A semiconductor device and method of fabricating the same, the semiconductor device includes a substrate, a first transistor and a second transistor. The substrate includes a high-voltage region and a low-voltage region. The first transistor is disposed on the HV region, and includes a first gate dielectric layer disposed on a first base, and a first gate electrode on the first gate dielectric layer. The first gate dielectric layer includes a composite structure having a first dielectric layer and a second dielectric layer stacked sequentially. The second transistor is disposed on the LV region, and includes a fin shaped structure protruded from a second base on the substrate, and a second gate electrode disposed on the fin shaped structure. The first dielectric layer covers sidewalls of the second gate electrode and a top surface of the first dielectric layer is even with a top surface of the second gate electrode.
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公开(公告)号:US20240355923A1
公开(公告)日:2024-10-24
申请号:US18760559
申请日:2024-07-01
发明人: Gerhard Noebauer
CPC分类号: H01L29/7815 , H01L29/0696 , H01L29/0865 , H01L29/0882 , H01L29/402 , H01L29/407 , H01L29/7813 , G01R19/0092
摘要: A transistor arrangement includes a drift and drain region arranged in a semiconductor body and each connected to a drain node, a plurality of load transistor cells each comprising a source region integrated in a first region of the semiconductor body, a plurality of sense transistor cells each comprising a source region integrated in a second region of the semiconductor body, a first source node electrically connected to the source region of each of the plurality of the load transistor cells via a first source conductor, and a second source node electrically connected to the source region of each of the plurality of the sense transistor cells via a second source conductor, a resistance of the second source conductor is different from a resistance of the first source conductor, and the second source conductor comprises an elongated span with a plurality of meanders in which the connection line reverses its direction.
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6.
公开(公告)号:US20240355921A1
公开(公告)日:2024-10-24
申请号:US18238947
申请日:2023-08-28
发明人: Sen HUANG , Qimeng JIANG , Xinyue DAI , Xinhua WANG , Xinyu LIU
IPC分类号: H01L29/778 , H01L29/08 , H01L29/417 , H01L29/423 , H01L29/66
CPC分类号: H01L29/7789 , H01L29/08 , H01L29/41725 , H01L29/4236 , H01L29/66462 , H01L29/7783
摘要: The folded channel gallium nitride based field-effect transistor includes: a base layer; a multi-heterojunction layer, including a channel layer and a barrier layer alternatingly stacked from bottom to top on a gallium nitride semi-insulating layer; a gallium nitride control layer on the multi-heterojunction layer and extending from one side of the channel region to at least a part of the groove; a current collapse suppression structure formed on the multi-heterojunction layer on another side of the channel region; a source electrode and a drain electrode that are respectively in contact with two sides of the multi-heterojunction layer on the gallium nitride semi-insulating layer; a gate electrode formed on the multi-heterojunction layer between the source electrode and the gallium nitride control layer; and a connecting structure passing over the gate electrode to electrically connect to the source electrode and the gallium nitride control layer.
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公开(公告)号:US20240355918A1
公开(公告)日:2024-10-24
申请号:US18137797
申请日:2023-04-21
申请人: Woflspeed, Inc.
发明人: Christer Hallin , Matt King , Thomas Kuhr
IPC分类号: H01L29/778 , H01L29/08 , H01L29/16 , H01L29/20 , H01L29/66
CPC分类号: H01L29/7786 , H01L29/0847 , H01L29/1608 , H01L29/2003 , H01L29/66462
摘要: A method of forming a semiconductor device structure includes patterning a surface of a semiconductor substrate, wherein the semiconductor substrate comprises a material having a thermal conductivity greater than about 50 W/m-K. The method further includes conformally forming a heteroepitaxial layer structure on the surface of the semiconductor substrate, and forming a semiconductor device in the heteroepitaxial layer structure. A semiconductor device structure according to some embodiments includes semiconductor substrate having a patterned surface. The semiconductor substrate is formed of a material having a thermal conductivity greater than about 50 W/m-K. The device structure includes a heteroepitaxial layer structure conformally formed on the patterned surface of the semiconductor substrate, and at least one metal contact on the heteroepitaxial layer structure.
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公开(公告)号:US20240355917A1
公开(公告)日:2024-10-24
申请号:US18762775
申请日:2024-07-03
申请人: Qorvo US, Inc.
发明人: Jose Jimenez , Jinqiao Xie , Vipan Kumar
IPC分类号: H01L29/778 , H01L29/08
CPC分类号: H01L29/7783 , H01L29/0847
摘要: A high electron mobility transistor (HEMT) device is disclosed. The HEMT device includes a substrate with epitaxial layers over the substrate that includes a buffer layer having a dopant comprising aluminum, wherein the concentration of aluminum within the buffer layer is between 0.5% and 3%. The epitaxial layer further includes a channel layer over the buffer layer and a barrier layer over the channel layer. A gate contact is disposed on a surface of the epitaxial layers. A source contact and a drain contact are also disposed on the surface of the epitaxial layers, wherein the source contact and the drain contact are spaced apart from the gate contact and each other.
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公开(公告)号:US20240355894A1
公开(公告)日:2024-10-24
申请号:US18757573
申请日:2024-06-28
发明人: Ming-Hua Tsai , Jung Han , Ming-Chi Li , Chih-Mou Lin , Yu-Hsiang Hung , Yu-Hsiang Lin , Tzu-Lang Shih
IPC分类号: H01L29/423 , H01L29/06 , H01L29/08 , H01L29/66 , H01L29/78
CPC分类号: H01L29/42368 , H01L29/0607 , H01L29/0847 , H01L29/66545 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要: A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion.
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10.
公开(公告)号:US20240355884A1
公开(公告)日:2024-10-24
申请号:US18639102
申请日:2024-04-18
发明人: Edmund G. Seebauer
IPC分类号: H01L29/08 , H01L21/02 , H01L21/225
CPC分类号: H01L29/0878 , H01L21/02334 , H01L21/2253 , H01L29/086
摘要: A purified surface region of a semiconductor includes a treated surface and comprises a crystalline metal oxide containing an impurity species (e.g., an isotopic impurity or a chemical impurity). The crystalline metal oxide comprises a depletion region extending to a first depth from the treated surface, and an accumulation region adjacent to the depletion region and extending to a second depth greater than the first depth. A concentration of the impurity species is lower in the depletion region than in the accumulation region. An electronic component comprising the purified surface region may be used for thermal management, quantum computing, sensing, and/or light detection.
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