公开(公告)号：US12087866B2

公开(公告)日：2024-09-10

申请号：US17182269

申请日：2021-02-23

申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

发明人： Kosei Noda

IPC分类号： H01L29/24 ,  H01L21/425 ,  H01L29/22 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L29/7869 ,  H01L21/425 ,  H01L29/22 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78696

摘要： A semiconductor device with stable electrical characteristics is provided. Alternatively, a semiconductor device having normally-off electrical characteristics is provided. A semiconductor device includes a gate electrode, a gate insulator, and an oxide semiconductor, the oxide semiconductor contains fluorine in a channel formation region, and a fluorine concentration in the channel formation region is higher than or equal to 1×1020 atoms/cm3 and lower than or equal to 1×1022 atoms/cm3. Note that fluorine is added by an ion implantation method.

公开(公告)号：US11961910B2

公开(公告)日：2024-04-16

申请号：US17002670

申请日：2020-08-25

申请人： Applied Materials, Inc.

发明人： Milan Pe{hacek over (s)}ić

IPC分类号： H01L29/78 ,  H01G4/005 ,  H01L29/22 ,  H10B51/00 ,  H10B53/00

CPC分类号： H01L29/78391 ,  H01G4/005 ,  H01L29/22 ,  H10B51/00 ,  H10B53/00

摘要： A ferroelectric capacitor or a ferroelectric transistor may include a first metal layer having a first metal having a first work function, and a second metal layer having a second metal having a second work function. The capacitor may also include a a vertical electrode and a ferroelectric material that surrounds the vertical electrode and forms a plurality of switching regions in the ferroelectric material. The transistor may include a vertical channel, a vertical buffer layer that surround the vertical channel, and a ferroelectric material that surrounds the vertical buffer layer and forms a plurality of gate regions in the ferroelectric material.

公开(公告)号：US11948795B2

公开(公告)日：2024-04-02

申请号：US17052889

申请日：2019-12-09

申请人： IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)

发明人： Myung Mo Sung ,  Lynn Lee ,  Jin Won Jung ,  Jong Chan Kim

IPC分类号： H01L21/02 ,  C23C16/40 ,  C23C16/455 ,  C30B25/02 ,  C30B29/16 ,  H01L21/30 ,  H01L29/04 ,  H01L29/20 ,  H01L29/22 ,  H01L29/786 ,  H01L33/12 ,  H01L33/16 ,  H01L33/28 ,  H01L33/32

CPC分类号： H01L21/0262 ,  C23C16/407 ,  C23C16/45525 ,  C30B25/02 ,  C30B29/16 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/0254 ,  H01L21/02554 ,  H01L21/02609 ,  H01L21/30 ,  H01L29/045 ,  H01L29/2003 ,  H01L29/22 ,  H01L29/78696 ,  H01L33/12 ,  H01L33/16 ,  H01L33/28 ,  H01L33/32

摘要： Provided are a method for manufacturing a single-crystal semiconductor layer. The method of manufacturing the single crystalline semiconductor layer includes performing a unit cycle multiple times, wherein the unit cycle includes a metal precursor pressurized dosing operation in which a metal precursor is adsorbed on a surface of a single crystalline substrate by supplying the metal precursor onto the single crystalline substrate while an outlet of a chamber in which the single crystalline substrate is loaded is closed such that a reaction pressure in the chamber is increased; a metal precursor purge operation; a reactive gas supplying operation in which a reactive gas is supplied into the chamber to cause a reaction of the reactive gas with the metal precursor adsorbed on the single crystalline substrate after the metal precursor purge operation; and a reactive gas purge operation.

公开(公告)号：US20230352581A1

公开(公告)日：2023-11-02

申请号：US17730824

申请日：2022-04-27

申请人： Tokyo Electron Limited

发明人： H. Jim FULFORD ,  Mark I. GARDNER ,  Partha MUKHOPADHYAY

IPC分类号： H01L29/78 ,  H01L29/22 ,  H01L29/24 ,  H01L27/092 ,  H01L29/417 ,  H01L29/66 ,  H01L29/40

CPC分类号： H01L29/7827 ,  H01L29/22 ,  H01L29/24 ,  H01L27/092 ,  H01L29/41741 ,  H01L29/66666 ,  H01L29/401

摘要： According to an aspect of the disclosure, a semiconductor device is provided. The semiconductor device includes a first bottom contact positioned in a dielectric layer over a substrate, and a first channel structure extending from and in contact with the first bottom contact in a vertical direction perpendicular to the substrate. The first channel structure includes a bottom portion over the first bottom contact, a middle portion over the bottom portion, and a top portion over the middle portion. The semiconductor device includes a first gate structure positioned around the middle portion of the first channel structure, and a first top contact positioned over and in contact with the top portion of the first channel structure.

公开(公告)号：US20230299207A1

公开(公告)日：2023-09-21

申请号：US18201815

申请日：2023-05-25

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shunpei YAMAZAKI

IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L29/66 ,  H01L29/04 ,  H01L29/22 ,  H01L29/221 ,  H01L29/24 ,  H01L29/26 ,  H01L29/423 ,  H01L29/45 ,  H01L29/49

CPC分类号： H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L29/78696 ,  H01L29/66969 ,  H01L29/045 ,  H01L29/2206 ,  H01L29/221 ,  H01L29/24 ,  H01L29/263 ,  H01L29/78693 ,  H01L29/04 ,  H01L29/42356 ,  H01L29/45 ,  H01L29/4908

摘要： An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.

公开(公告)号：US11640935B2

公开(公告)日：2023-05-02

申请号：US17377395

申请日：2021-07-16

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chung-Ming Weng ,  Chen-Hua Yu ,  Chung-Shi Liu ,  Hao-Yi Tsai ,  Cheng-Chieh Hsieh ,  Hung-Yi Kuo ,  Tsung-Yuan Yu ,  Hua-Kuei Lin ,  Hsiu-Jen Lin ,  Ming-Che Ho ,  Yu-Hsiang Hu ,  Chewn-Pu Jou ,  Cheng-Tse Tang

IPC分类号： H01L29/22 ,  H01L23/498 ,  H01L21/768 ,  G02B6/42 ,  H01L23/00

摘要： A semiconductor package includes a redistribution structure, a supporting layer, a semiconductor device, and a transition waveguide structure. The redistribution structure includes a plurality of connectors. The supporting layer is formed over the redistribution structure and disposed beside and between the plurality of connectors. The semiconductor device is disposed on the supporting layer and bonded to the plurality of connectors, wherein the semiconductor device includes a device waveguide. The transition waveguide structure is disposed on the supporting layer adjacent to the semiconductor device, wherein the transition waveguide structure is optically coupled to the device waveguide.

公开(公告)号：US11610997B2

公开(公告)日：2023-03-21

申请号：US16759020

申请日：2018-11-15

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shunpei Yamazaki ,  Shota Sambonsuge ,  Yasumasa Yamane ,  Yuta Endo ,  Naoki Okuno

IPC分类号： H01L29/786 ,  H01L27/108 ,  H01L29/22

摘要： A semiconductor material is an oxide including a metal element and nitrogen, in which the metal element is indium (In), an element M (M is aluminum (Al), gallium (Ga), yttrium (Y), or tin (Sn)), and zinc (Zn) and nitrogen is taken into an oxygen vacancy or bonded to an atom of the metal element.

公开(公告)号：US11527658B2

公开(公告)日：2022-12-13

申请号：US17110591

申请日：2020-12-03

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shunpei Yamazaki

IPC分类号： H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  H01L29/66 ,  H01L29/78 ,  C01G15/00 ,  H01L29/22

摘要： A novel material and a transistor including the novel material are provided. One embodiment of the present invention is a composite oxide including at least two regions. One of the regions includes In, Zn and an element M1 (the element M1 is one or more of Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu) and the other of the regions includes In, Zn, and an element M2 (the element M2 is one or more of Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu). In an analysis of the composite oxide by energy dispersive X-ray spectroscopy, the detected concentration of the element M1 in a first region is less than the detected concentration of the element M2 in a second region, and a surrounding portion of the first region is unclear in an observed mapping image of the energy dispersive X-ray spectroscopy.

公开(公告)号：US11380797B2

公开(公告)日：2022-07-05

申请号：US16604146

申请日：2017-06-20

申请人： Intel Corporation

发明人： Gilbert Dewey ,  Van H. Le ,  Abhishek A. Sharma ,  Shriram Shivaraman ,  Ravi Pillarisetty ,  Tahir Ghani ,  Jack T. Kavalieros

IPC分类号： H01L29/778 ,  H01L29/786 ,  H01L27/12 ,  H01L29/06 ,  H01L29/22 ,  H01L29/417

摘要： Thin film core-shell fin and nanowire transistors are described. In an example, an integrated circuit structure includes a fin on an insulator layer above a substrate. The fin has a top and sidewalls. The fin is composed of a first semiconducting oxide material. A second semiconducting oxide material is on the top and sidewalls of the fin. A gate electrode is over a first portion of the second semiconducting oxide material on the top and sidewalls of the fin. A first conductive contact is adjacent the first side of the gate electrode, the first conductive contact over a second portion of the second semiconducting oxide material on the top and sidewalls of the fin. A second conductive contact is adjacent the second side of the gate electrode, the second conductive contact over a third portion of the second semiconducting oxide material on the top and sidewalls of the fin.

公开(公告)号：US20220199839A1

公开(公告)日：2022-06-23

申请号：US17133599

申请日：2020-12-23

申请人： Intel Corporation

发明人： Arnab SEN GUPTA ,  Urusa ALAAN ,  Justin WEBER ,  Charles C. KUO ,  Yu-Jin CHEN ,  Kaan OGUZ ,  Matthew V. METZ ,  Abhishek A. SHARMA ,  Prashant MAJHI ,  Brian S. DOYLE ,  Van H. LE

IPC分类号： H01L29/872 ,  H01L27/07 ,  H01L29/47 ,  H01L29/22

摘要： Embodiments disclosed herein include semiconductor devices with Schottky diodes in a back end of line stack. In an embodiment, a semiconductor device comprises a semiconductor layer, where transistor devices are provided in the semiconductor layer, and a back end stack over the semiconductor layer. In an embodiment, a diode is in the back end stack. In an embodiment, the diode comprises a first electrode, a semiconductor region over the first electrode, and a second electrode over the semiconductor region. In an embodiment, a first interface between the first electrode and the semiconductor region is an ohmic contact, and a second interface between the semiconductor region and the second electrode is a Schottky contact.