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公开(公告)号:US20230136949A1
公开(公告)日:2023-05-04
申请号:US18051914
申请日:2022-11-02
发明人: Matthew CHARLES , Yvon CORDIER
IPC分类号: H01L33/00 , H01L33/06 , H01L29/861 , H01L21/02
摘要: A method for growing a III-V material may include forming at least one layer on a stack including a crystalline layer made of III-V material, a first masking layer surmounting the germination layer, the first masking layer having at least one first opening; depositing a second masking layer covering an upper face of the sacrificial layer; forming at least one second opening in the second masking layer; removing the sacrificial layer selectively at the first masking layer and at the second masking layer; epitaxially growing a material made of the III-V material from the germination layer; forming al least one third opening in the second masking layer; and epitaxially growing at least one material made of the III-V material from the first epitaxial layer.
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公开(公告)号:US20230130632A1
公开(公告)日:2023-04-27
申请号:US17511569
申请日:2021-10-27
IPC分类号: H01L29/861 , H01L29/06 , H01L29/66
摘要: An electrostatic discharge (ESD) protection device is provided. The ESD protection device includes a substrate, an active region, a first terminal region, and a second terminal region. The substrate includes dopants having a first dopant conductivity. The active region is arranged over the substrate and has an upper surface. The first terminal region and the second terminal region are arranged in the active region laterally spaced apart from each other. The first terminal region and the second terminal region each include a well region having dopants of the first dopant conductivity and a first doped region arranged in the well region. The first doped region includes dopants having a second dopant conductivity.
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公开(公告)号:US11637214B2
公开(公告)日:2023-04-25
申请号:US17664462
申请日:2022-05-23
发明人: Zhihong Huang , Di Liang , Yuan Yuan
IPC分类号: H01L21/20 , H01L29/861 , H01L31/105 , H01L31/028 , H04B10/66 , H01L27/144 , H01L31/18 , H04J14/02
摘要: A device may include: a highly doped n+ Si region; an intrinsic silicon multiplication region disposed on at least a portion of the n+ Si region, the intrinsic silicon multiplication having a thickness of about 90-110 nm; a highly doped p− Si charge region disposed on at least part of the intrinsic silicon multiplication region, the p− Si charge region having a thickness of about 40-60 nm; and a p+ Ge absorption region disposed on at least a portion of the p− Si charge region; wherein the p+ Ge absorption region is doped across its entire thickness. The thickness of the n+ Si region may be about 100 nm and the thickness of the p− Si charge region may be about 50 nm. The p+ Ge absorption region may confine the electric field to the multiplication region and the charge region to achieve a temperature stability of 4.2 mV/°C.
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公开(公告)号:US20230092061A1
公开(公告)日:2023-03-23
申请号:US17554171
申请日:2021-12-17
发明人: Byounghak Hong , Seungchan Yun , Kang-ill Seo
IPC分类号: H01L27/02 , H01L27/07 , H01L29/861 , H01L29/739 , H01L21/8238
摘要: Diode structures of stacked devices and methods of forming the same are provided. Diode structures may include a substrate, an upper semiconductor layer that is spaced apart from the substrate in a vertical direction, an upper thin semiconductor layer protruding from a side surface of the upper semiconductor layer in a first horizontal direction, a lower semiconductor layer that is between the substrate and the upper semiconductor layer and has a first conductivity type, a lower thin semiconductor layer protruding from a side surface of the lower semiconductor layer in the first horizontal direction, a first diode contact that is electrically connected to the lower semiconductor layer, and a second diode contact that is electrically connected to one of the upper semiconductor layer and a portion of the substrate. The one of the upper semiconductor layer and the portion of the substrate may have a second conductivity type.
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公开(公告)号:US11605706B2
公开(公告)日:2023-03-14
申请号:US17123266
申请日:2020-12-16
申请人: DENSO CORPORATION
发明人: Motoo Yamaguchi
IPC分类号: H01L23/00 , H01L29/06 , H01L29/40 , H01L29/739 , H01L27/06 , H01L27/088 , H01L21/8234 , H01L29/866 , H01L29/16 , H01L29/78 , H01L29/861
摘要: A semiconductor device includes a semiconductor substrate having a major surface and both an element-forming region and an outer peripheral voltage-withstanding region that are provided on the major surface side of the semiconductor substrate. The element-forming region includes both a cell region for forming a power element and a circuit element region for forming at least one circuit element. The circuit element region is interposed between the outer peripheral voltage-withstanding region and the cell region. The outer peripheral voltage-withstanding region includes a boundary region that adjoins the element-forming region. In the boundary region, there is provided one or more voltage-withstanding regions. At least one of the one or more voltage-withstanding regions has a withstand voltage lower than both the withstand voltages of the cell region and the circuit element region.
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公开(公告)号:US11588042B2
公开(公告)日:2023-02-21
申请号:US17130590
申请日:2020-12-22
申请人: DENSO CORPORATION
发明人: Shunsuke Harada , Takashi Nomura
摘要: A semiconductor device includes a semiconductor substrate, an insulating film disposed above the semiconductor substrate, a temperature detecting element disposed on the insulating film, and an anode side region and a cathode side region respectively located on an anode side and a cathode side of the temperature detecting element. The anode side region or the cathode side region includes one or more capacitance elements, and a sum of capacitance values of the capacitance elements is larger than a capacitance value of the temperature detecting element.
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公开(公告)号:US11575001B2
公开(公告)日:2023-02-07
申请号:US17373660
申请日:2021-07-12
发明人: Tetsuo Takahashi , Hidenori Fujii , Shigeto Honda
IPC分类号: H01L29/06 , H01L27/07 , H01L29/861 , H01L29/739
摘要: A semiconductor substrate has a transistor region, a diode region, and an outer peripheral region. The transistor region is divided into a plurality of transistor unit cell regions by a plurality of gate electrodes each having a stripe shape, and the diode region is divided into a plurality of diode unit cell regions by the plurality of gate electrodes. Each of the plurality of transistor unit cell regions has a third semiconductor layer of a first conductivity type provided on a first main surface side of the semiconductor substrate, a fourth semiconductor layer of a second conductivity type selectively provided on an upper layer part of the third semiconductor layer, and a fifth semiconductor layer. The fifth semiconductor layer is provided to be in contact with an impurity layer of the first conductivity type provided in the outer peripheral region, or to enter the impurity layer.
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公开(公告)号:US11569392B2
公开(公告)日:2023-01-31
申请号:US17466342
申请日:2021-09-03
IPC分类号: H01L29/861 , H01L29/06 , H01L29/66 , H01L21/265 , H01L29/08 , H01L29/36
摘要: A power semiconductor diode includes a semiconductor body having first and second main surfaces opposite to each other along a vertical direction. A drift region of a second conductivity type is arranged between an anode region of a first conductivity type and the second main surface. A field stop region of the second conductivity type is arranged between the drift region and the second main surface. A dopant concentration profile of the field stop region along the vertical direction includes a maximum peak. An injection region of the first conductivity type is arranged between the field stop region and the second main surface, with a pn-junction between the injection and field stop regions. A cathode contact region of the second conductivity type is arranged between the field stop region and the second main surface. A first vertical distance between the pn-junction and the maximum peak ranges from 200 nm to 1500 nm.
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公开(公告)号:US20230025858A1
公开(公告)日:2023-01-26
申请号:US17938592
申请日:2022-10-06
申请人: ROHM CO., LTD.
发明人: Yuki NAKANO
IPC分类号: H01L27/06 , H01L29/16 , H01L23/34 , H01L29/66 , H01L29/861
摘要: The semiconductor device of the present invention includes a semiconductor substrate, a switching element which is defined on the semiconductor substrate, and a temperature sense element which is provided on the surface of the semiconductor substrate independently from the switching element and characterized by being dependent on a temperature.
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公开(公告)号:US20230025045A1
公开(公告)日:2023-01-26
申请号:US17959852
申请日:2022-10-04
申请人: ROHM CO., LTD.
发明人: Keiji OKUMURA
IPC分类号: H01L25/07 , H02M7/00 , H01L23/00 , H01L29/24 , H01L23/31 , H01L29/16 , H01L29/78 , H01L29/861 , H01L29/872
摘要: A semiconductor device includes a MOSFET including a PN junction diode. A unipolar device is connected in parallel to the MOSFET and has two terminals. A first wire connects the PN junction diode to one of the two terminals of the unipolar device. A second wire connects the one of the two terminals of the unipolar device to an output line, so that the output line is connected to the MOSFET and the unipolar device via the first wire and the second wire. In one embodiment the connection of the first wire to the diode is with its anode, and in another the connection is with the cathode.
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