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1.发明公开公开(公告)号：US20240340463A1
公开(公告)日：2024-10-10
申请号：US18748915
申请日：2024-06-20
发明人： Virginie DRUGEON , Takahiro Nishi , Tadamasa Toma
IPC分类号： H04N19/70 , H02M1/00 , H02M1/084 , H02M1/14 , H04N7/01 , H04N19/85 , H04N19/98 , H04N21/2343 , H04N21/236 , H04N21/434 , H04N21/4402 , H05B45/37 , H05B47/10 , H05B47/11 , H05B47/19
CPC分类号： H04N19/70 , H02M1/084 , H02M1/14 , H04N7/0117 , H04N19/85 , H04N19/98 , H04N21/2343 , H04N21/236 , H04N21/23614 , H04N21/4345 , H04N21/4402 , H05B45/37 , H05B47/10 , H05B47/11 , H05B47/19 , H02M1/0009
摘要： A data generation method is for generating video data that covers a second luminance dynamic range wider than a first luminance dynamic range and has reproduction compatibility with a first device that does not support reproduction of video having the second luminance dynamic range and supports reproduction of video having the first luminance dynamic range, and includes: generating a video signal to be included in the video data using a second OETF; storing, into VUI in the video data, first transfer function information for identifying a first OETF to be referred to by the first device when the first device decodes the video data; and storing, into SEI in the video data, second transfer function information for identifying a second OETF to be referred to by a second device supporting reproduction of video having the second luminance dynamic range when the second device decodes the video data.
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公开(公告)号：US12015345B2
公开(公告)日：2024-06-18
申请号：US18229755
申请日：2023-08-03
发明人： Naman Bafna , Preetam Charan Anand Tadeparthy , Ammineni Balaji , Sreelakshmi Suresh , Mayank Jain
CPC分类号： H02M3/157 , H02M1/0009 , H02M1/0845
摘要： In an example, a method includes storing a pending PWM pulse for a switching voltage regulator. The method also includes determining a switching voltage regulator is operating in a current limit mode, where an inductor current is above a current limit threshold. The method includes providing a predetermined number of PWM pulses in the current limit mode. The method also includes, responsive to providing the predetermined number of PWM pulses, ceasing storage of pending PWM pulses for the switching voltage regulator.
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公开(公告)号：US20240072680A1
公开(公告)日：2024-02-29
申请号：US18270668
申请日：2021-03-04
发明人： Takeshi IIDA , Satoru ICHIKI
CPC分类号： H02M7/2173 , H02M1/0845 , H02P27/04
摘要： A power conversion apparatus includes a converter circuit and a control unit. The converter circuit includes circuits for the number of phases being more than one, the circuits each including a reactor and a corresponding first or second switching element connected to the reactor. The converter circuit converts an AC voltage output from a commercial power supply into a DC voltage. In a case where a time difference between a timing of turning off the first switching element and a timing of turning on the second switching element is within a threshold, the control unit performs control for advancing or delaying the timing of turning off the first switching element.
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公开(公告)号：US11884171B2
公开(公告)日：2024-01-30
申请号：US17532525
申请日：2021-11-22
发明人： Ji Hoon Park , Deok Kwan Choi , Won Gon Kim , Kang Min Kim , Min Heo , Tae Ho Bang , Du Ho Kim , Hyun Woo Shim , Soo Min Jeon , A Ra Lee
CPC分类号： B60L53/20 , B60L58/20 , H02M1/084 , H02M1/14 , H02M3/33569 , B60L2210/10
摘要： A low-voltage DC-DC converter (LDC) includes: an N-phase power circuit configured by connection of N DC-DC converters in parallel between a high-voltage (HV) battery and a low-voltage (LV) battery; and one output capacitor commonly connected to an output of each phase DC-DC converter. Each phase of the N-phase power circuit is controlled in an interleaving manner which delays a phase by 360°/N. Here, each N-phase power circuit is controlled by switching at a frequency of [(a frequency at which the parasitic resistance (equivalent series resistance (ESR)) of the output capacitor is minimized)/N]. The parasitic resistance of the output capacitor of the LDC can be minimized. Accordingly, a lifespan of a battery can be improved and efficiency of the DC-DC converter can be increased through the reduction of the equivalent series resistance (ESR) of the output capacitor.
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公开(公告)号：US20230318460A1
公开(公告)日：2023-10-05
申请号：US18329511
申请日：2023-06-05
发明人： Lin CHENG , Feng WU , Jingyi YUAN , Zeguo LIU
CPC分类号： H02M3/1586 , H02M3/157 , H02M1/0019 , H02M1/0845
摘要： Multiphase series capacitor DC-DC converters are provided, including: a power stage circuit configured to convert an input DC voltage into a stable DC voltage required by a load, where the power stage circuit includes inductors of two or more phases, and there is a phase difference with a preset interval between inductor currents of phases for alternately charging the load in sequence, and a bidirectional switch is provided between inductors of every two adjacent phases, where when the bidirectional switch is turned on, the inductors of the corresponding two phases charge the load simultaneously; and a load transient response circuit configured to, when a load transient positive step occurs, control one or more bidirectional switches to be turned on to make inductors of two or more corresponding phases charge the load simultaneously. Control methods of such converters are also provided, which can realize fast response to load transient changes.
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公开(公告)号：US20230291317A1
公开(公告)日：2023-09-14
申请号：US17689560
申请日：2022-03-08
发明人： CHENG-CHOU WU , CHUN-TSE CHEN
CPC分类号： H02M3/33553 , H02M1/084
摘要： A multi-mode hybrid control DC-DC converting circuit has a switching power converter and a microcontroller. The switching power converter has a transformer and a switching switch. The switching switch is connected to a primary-side winding of the transformer in series. The microcontroller is connected to the switching power converter and a control terminal of the switching switch. The microcontroller sets multiple thresholds according to an input voltage of the switching power converter, and determines whether a feedback voltage of the switching power converter is higher or lower than each one of the thresholds to perform a variable-frequency mode, a constant-frequency mode, or a pulse-skipping mode. The microcontroller outputs a driving signal to the switching switch and correspondingly adjusts a frequency of the driving signal according to the variable-frequency mode, the constant-frequency mode, or the pulse-skipping mode which is performed.
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公开(公告)号：US20230283197A1
公开(公告)日：2023-09-07
申请号：US18005701
申请日：2020-07-17
发明人： Ilhom Gafur , Dominik Schuster
CPC分类号： H02M7/4835 , H02M1/084
摘要： A method for controlling a modular multilevel power converter which has at least one phase module branch with a series circuit of modules. Each of the modules has an energy storage device and a power semiconductor circuit with electronic switching elements. A duty cycle of the phase module branch is ascertained, wherein the duty cycle describes the ratio between the voltage which is being output by the phase module branch and the voltage which can be maximally output by the phase module branch. The maximum value of the duty cycle during a preselected time period is ascertained, and the maximum value of the duty cycle is controlled to a target value for the maximum value of the duty cycle by a controller.
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公开(公告)号：US20230268831A1
公开(公告)日：2023-08-24
申请号：US18107585
申请日：2023-02-09
发明人： Shuai Zhang , Wang Zhang
CPC分类号： H02M3/156 , H02M1/0095 , H02M1/084 , H02M1/0025
摘要： A control circuit of a three-level DC-DC converter, can include where: the three-level DC-DC converter includes first, second, third, and fourth power switches coupled in series between an input voltage and a reference ground, and a flying capacitor coupled between a common node of the first and second power switches and a common node of the third and fourth power switches; and the control circuit is configured to adjust a phase difference between driving signals of the first and second power switches, and duty ratios of the first and second power switches, according to an error between a voltage across the flying capacitor and a predetermined value, such that the voltage across the flying capacitor is stabilized at the predetermined value.
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公开(公告)号：US20230244881A1
公开(公告)日：2023-08-03
申请号：US18296297
申请日：2023-04-05
发明人： John Paul LESSO
CPC分类号： G06G7/48 , H02M1/0845 , H03M1/06 , H03M1/12 , G06N3/065
摘要： This application relates to computing circuitry, and in particular to analogue computing circuitry suitable for neuromorphic computing. An analogue computation unit for processing data is supplied with a first voltage from a voltage regulator which is operable in a sequence of phases to cyclically regulate the first voltage. A controller is configured to control operation of the voltage regulator and/or the analogue computation unit, such that the analogue computation unit processes data during a plurality of compute periods that avoid times at which the voltage regulator undergoes a phase transition which is one of a predefined set of phase transitions between defined phases in said sequence of phases. This avoids performing computation operations during a phase transition of the voltage regulator that could result in a transient or disturbance in the first voltage, which could adversely affect the computing.
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公开(公告)号：US20230123031A1
公开(公告)日：2023-04-20
申请号：US18086874
申请日：2022-12-22
发明人： Kaiwei Yao , Zhiyuan Shen
IPC分类号： H02M3/158 , G01R19/165 , G01R19/175 , H02M1/084 , H02M1/32
摘要： A method of controlling a multi-phase power converter having a plurality of power stage circuits coupled in parallel, can include: obtaining a load current of the multi-phase power converter; enabling corresponding power stage circuits to operate in accordance with the load current, such that a switching frequency is maintained within a predetermined range when the load current changes; and controlling the power stage circuits to operate under different modes in accordance with the load current, such that the switching frequency is maintained within the predetermined range when the load current changes.
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